Commit 28e10a8f authored by Jon Medhurst (Tixy)'s avatar Jon Medhurst (Tixy) Committed by Olof Johansson

arm64: dts: juno: Add idle-states to device tree

This patch adds idle-states bindings data collected through a set of
benchmarking experiments (latency and energy consumption) on Juno
boards. Latencies data represents the worst case scenarios as required
by the DT idle-states bindings.
Signed-off-by: default avatarJon Medhurst <tixy@linaro.org>
Acked-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent c7a5675f
...@@ -60,6 +60,28 @@ core3 { ...@@ -60,6 +60,28 @@ core3 {
}; };
}; };
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2000>;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
};
A57_0: cpu@0 { A57_0: cpu@0 {
compatible = "arm,cortex-a57","arm,armv8"; compatible = "arm,cortex-a57","arm,armv8";
reg = <0x0 0x0>; reg = <0x0 0x0>;
...@@ -67,6 +89,7 @@ A57_0: cpu@0 { ...@@ -67,6 +89,7 @@ A57_0: cpu@0 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_1: cpu@1 { A57_1: cpu@1 {
...@@ -76,6 +99,7 @@ A57_1: cpu@1 { ...@@ -76,6 +99,7 @@ A57_1: cpu@1 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_0: cpu@100 { A53_0: cpu@100 {
...@@ -85,6 +109,7 @@ A53_0: cpu@100 { ...@@ -85,6 +109,7 @@ A53_0: cpu@100 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_1: cpu@101 { A53_1: cpu@101 {
...@@ -94,6 +119,7 @@ A53_1: cpu@101 { ...@@ -94,6 +119,7 @@ A53_1: cpu@101 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_2: cpu@102 { A53_2: cpu@102 {
...@@ -103,6 +129,7 @@ A53_2: cpu@102 { ...@@ -103,6 +129,7 @@ A53_2: cpu@102 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_3: cpu@103 { A53_3: cpu@103 {
...@@ -112,6 +139,7 @@ A53_3: cpu@103 { ...@@ -112,6 +139,7 @@ A53_3: cpu@103 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_L2: l2-cache0 { A57_L2: l2-cache0 {
......
...@@ -60,6 +60,28 @@ core3 { ...@@ -60,6 +60,28 @@ core3 {
}; };
}; };
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2000>;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
};
A57_0: cpu@0 { A57_0: cpu@0 {
compatible = "arm,cortex-a57","arm,armv8"; compatible = "arm,cortex-a57","arm,armv8";
reg = <0x0 0x0>; reg = <0x0 0x0>;
...@@ -67,6 +89,7 @@ A57_0: cpu@0 { ...@@ -67,6 +89,7 @@ A57_0: cpu@0 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_1: cpu@1 { A57_1: cpu@1 {
...@@ -76,6 +99,7 @@ A57_1: cpu@1 { ...@@ -76,6 +99,7 @@ A57_1: cpu@1 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A57_L2>; next-level-cache = <&A57_L2>;
clocks = <&scpi_dvfs 0>; clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_0: cpu@100 { A53_0: cpu@100 {
...@@ -85,6 +109,7 @@ A53_0: cpu@100 { ...@@ -85,6 +109,7 @@ A53_0: cpu@100 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_1: cpu@101 { A53_1: cpu@101 {
...@@ -94,6 +119,7 @@ A53_1: cpu@101 { ...@@ -94,6 +119,7 @@ A53_1: cpu@101 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_2: cpu@102 { A53_2: cpu@102 {
...@@ -103,6 +129,7 @@ A53_2: cpu@102 { ...@@ -103,6 +129,7 @@ A53_2: cpu@102 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A53_3: cpu@103 { A53_3: cpu@103 {
...@@ -112,6 +139,7 @@ A53_3: cpu@103 { ...@@ -112,6 +139,7 @@ A53_3: cpu@103 {
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&A53_L2>; next-level-cache = <&A53_L2>;
clocks = <&scpi_dvfs 1>; clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; };
A57_L2: l2-cache0 { A57_L2: l2-cache0 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment