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Commit 2995f0a1 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'mvebu-dt-4.4-2' of git://git.infradead.org/linux-mvebu into next/dt 

mvebu dt for 4.4 (part 2)

- Add support for severals Armada-370-based Seagate NAS
- Fix Ready NAS device tree
- Modify SDHCI binding for A388-GP allowing using it on old and new
  version of the board

* tag 'mvebu-dt-4.4-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: set SW polling as SDHCI card detection on A388-GP
  arm: mvebu: reorder nodes under internal-regs by address in RN2120 .dts file
  arm: mvebu: disable unused Armada RTC on ReadyNAS 102, 104 and 2120
  ARM: mvebu: add DT support for Seagate Personal Cloud
  ARM: mvebu: add DT support for Seagate NAS 2 and 4-Bay
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 64aa1fe1 6b61f249
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arch/arm/boot/dts/Makefile
View file @ 2995f0a1
...@@ -723,6 +723,10 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ ...@@ -723,6 +723,10 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
armada-370-netgear-rn102.dtb \ armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \ armada-370-netgear-rn104.dtb \
armada-370-rd.dtb \ armada-370-rd.dtb \
armada-370-seagate-nas-2bay.dtb \
armada-370-seagate-nas-4bay.dtb \
armada-370-seagate-personal-cloud.dtb \
armada-370-seagate-personal-cloud-2bay.dtb \
armada-370-synology-ds213j.dtb armada-370-synology-ds213j.dtb
dtb-$(CONFIG_MACH_ARMADA_375) += \ dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb armada-375-db.dtb
......
arch/arm/boot/dts/armada-370-netgear-rn102.dts
View file @ 2995f0a1
...@@ -83,6 +83,12 @@ pcie@2,0 { ...@@ -83,6 +83,12 @@ pcie@2,0 {
}; };
internal-regs { internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
rtc@10300 {
status = "disabled";
};
serial@12000 { serial@12000 {
status = "okay"; status = "okay";
}; };
......
arch/arm/boot/dts/armada-370-netgear-rn104.dts
View file @ 2995f0a1
...@@ -83,6 +83,12 @@ pcie@2,0 { ...@@ -83,6 +83,12 @@ pcie@2,0 {
}; };
internal-regs { internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
rtc@10300 {
status = "disabled";
};
serial@12000 { serial@12000 {
status = "okay"; status = "okay";
}; };
......
arch/arm/boot/dts/armada-370-seagate-nas-2bay.dts 0 → 100644
View file @ 2995f0a1
/*
* Device Tree file for Seagate NAS 2-Bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Vincent Donnefort <vdonnefort@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate NAS 2-Bay
* Code name (board/PCB) : Dart 2-Bay
* Model name (case sticker) : SRPD20
* Material desc (product spec) : STCTxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-nas-xbay.dtsi"
/ {
model = "Seagate NAS 2-Bay (Dart, SRPD20)";
compatible = "seagate,dart-2", "marvell,armada370", "marvell,armada-370-xp";
gpio-fan {
gpio-fan,speed-map =
< 0 3
950 2
1400 1
1800 0>;
};
};
arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts 0 → 100644
View file @ 2995f0a1
/*
* Device Tree file for Seagate NAS 4-Bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Vincent Donnefort <vdonnefort@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate NAS 4-Bay
* Code name (board/PCB) : Dart 4-Bay
* Model name (case sticker) : SRPD40
* Material desc (product spec) : STCUxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-nas-xbay.dtsi"
#include <dt-bindings/leds/leds-ns2.h>
/ {
model = "Seagate NAS 4-Bay (Dart, SRPD40)";
compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
soc {
pcie-controller {
/* SATA AHCI controller 88SE9170 */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
i2c@11000 {
/* I2C GPIO expander (PCA9554A) */
pca9554: pca9554@21 {
compatible = "nxp,pca9554";
reg = <0x21>;
#gpio-cells = <2>;
gpio-controller;
};
};
};
};
regulators {
regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "SATA2 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&pca9554 6 GPIO_ACTIVE_HIGH>;
};
regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "SATA3 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&pca9554 7 GPIO_ACTIVE_HIGH>;
};
};
gpio-leds {
red-sata2 {
label = "dart:red:sata2";
gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
};
red-sata3 {
label = "dart:red:sata3";
gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
};
};
leds-ns2 {
compatible = "lacie,ns2-leds";
white-sata2 {
label = "dart:white:sata2";
cmd-gpio = <&pca9554 1 GPIO_ACTIVE_HIGH>;
slow-gpio = <&pca9554 2 GPIO_ACTIVE_HIGH>;
num-modes = <4>;
modes-map = <NS_V2_LED_SATA 0 0
NS_V2_LED_OFF 0 1
NS_V2_LED_ON 1 0
NS_V2_LED_ON 1 1>;
};
white-sata3 {
label = "dart:white:sata3";
cmd-gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
slow-gpio = <&pca9554 5 GPIO_ACTIVE_HIGH>;
num-modes = <4>;
modes-map = <NS_V2_LED_SATA 0 0
NS_V2_LED_OFF 0 1
NS_V2_LED_ON 1 0
NS_V2_LED_ON 1 1>;
};
};
gpio-fan {
gpio-fan,speed-map =
< 0 3
800 2
1050 1
1300 0>;
};
};
arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi 0 → 100644
View file @ 2995f0a1
/*
* Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Vincent Donnefort <vdonnefort@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* TODO: add support for the white SATA LEDs associated with HDD 0 and 1.
*/
#include "armada-370.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 bridge ASM1042A */
pcie@2,0 {
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
};
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
i2c@11000 {
status = "okay";
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
/* RTC - NXP 8563T (second source) */
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
interrupts = <110>;
};
/* RTC - MCP7940NT */
rtc@6f {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
interrupts = <110>;
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0 0x300000>;
};
partition@300000 {
label = "device-tree";
reg = <0x300000 0x20000>;
};
partition@320000 {
label = "linux";
reg = <0x320000 0x2000000>;
};
partition@2320000 {
label = "rootfs";
reg = <0x2320000 0xdce0000>;
};
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA0 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA1 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
};
};
gpio-fan {
compatible = "gpio-fan";
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH
&gpio2 1 GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@2 {
label = "Backup button";
linux,code = <KEY_OPTION>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@3 {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
};
gpio-leds {
compatible = "gpio-leds";
white-power {
label = "dart:white:power";
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
red-power {
label = "dart:red:power";
gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
};
red-sata0 {
label = "dart:red:sata0";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
red-sata1 {
label = "dart:red:sata1";
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
pinctrl-names = "default";
hdd0_led_sata_pin: hdd0-led-sata-pin {
marvell,pins = "mpp48";
marvell,function = "sata1";
};
hdd0_led_gpio_pin: hdd0-led-gpio-pin {
marvell,pins = "mpp48";
marvell,function = "gpio";
};
hdd1_led_sata_pin: hdd1-led-sata-pin {
marvell,pins = "mpp57";
marvell,function = "sata0";
};
hdd1_led_gpio_pin: hdd1-led-gpio-pin {
marvell,pins = "mpp57";
marvell,function = "gpio";
};
};
arch/arm/boot/dts/armada-370-seagate-personal-cloud-2bay.dts 0 → 100644
View file @ 2995f0a1
/*
* Device Tree file for Seagate Personal Cloud NAS 2-Bay (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate Personal Cloud 2-Bay
* Code name (board/PCB) : Cumulus Max
* Model name (case sticker) : SRN22C
* Material desc (product spec) : STCSxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-personal-cloud.dtsi"
/ {
model = "Seagate Personal Cloud 2-Bay (Cumulus, SRN22C)";
compatible = "seagate,cumulus-max", "marvell,armada370", "marvell,armada-370-xp";
soc {
internal-regs {
sata@a0000 {
status = "okay";
nr-ports = <2>;
};
};
};
regulators {
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA1 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
};
};
};
arch/arm/boot/dts/armada-370-seagate-personal-cloud.dts 0 → 100644
View file @ 2995f0a1
/*
* Device Tree file for Seagate Personal Cloud NAS (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* Here are some information allowing to identify the device:
*
* Product name : Seagate Personal Cloud
* Code name (board/PCB) : Cumulus
* Model name (case sticker) : SRN21C
* Material desc (product spec) : STCRxxxxxxx
*/
/dts-v1/;
#include "armada-370-seagate-personal-cloud.dtsi"
/ {
model = "Seagate Personal Cloud (Cumulus, SRN21C)";
compatible = "seagate,cumulus", "marvell,armada370", "marvell,armada-370-xp";
soc {
internal-regs {
sata@a0000 {
status = "okay";
nr-ports = <1>;
};
};
};
};
arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi 0 → 100644
View file @ 2995f0a1
/*
* Device Tree common file for the Seagate Personal Cloud NAS 1 and 2-Bay
* (Armada 370 SoC).
*
* Copyright (C) 2015 Seagate
*
* Author: Simon Guinot <simon.guinot@sequanux.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/*
* TODO: add support for the white SATA LED.
*/
#include "armada-370.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 Bridge ASM1042A */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
coherency-fabric@20200 {
broken-idle;
};
serial@12000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
spi@10600 {
status = "okay";
pinctrl-0 = <&spi0_pins2>;
pinctrl-names = "default";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
/* MX25L8006E */
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
};
};
};
usb@50000 {
status = "okay";
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
};
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA0 power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
debounce-interval = <100>;
};
button@2 {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@3 {
label = "USB VBUS error";
linux,code = <KEY_UNKNOWN>;
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
};
gpio-leds {
compatible = "gpio-leds";
red-sata0 {
label = "cumulus:red:sata0";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
};
};
&pinctrl {
pinctrl-0 = <&sata_led_pin>;
pinctrl-names = "default";
sata_led_pin: sata-led-pin {
marvell,pins = "mpp60";
marvell,function = "sata0";
};
gpio_led_pin: gpio-led-pin {
marvell,pins = "mpp60";
marvell,function = "gpio";
};
};
arch/arm/boot/dts/armada-388-gp.dts
View file @ 2995f0a1
...@@ -207,8 +207,21 @@ sata3: sata-port@1 { ...@@ -207,8 +207,21 @@ sata3: sata-port@1 {
sdhci@d8000 { sdhci@d8000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sdhci_pins>; pinctrl-0 = <&sdhci_pins>;
cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
no-1-8-v; no-1-8-v;
/*
* A388-GP board v1.5 and higher replace
* hitherto card detection method based on GPIO
* with the one using DAT3 pin. As they are
* incompatible, software-based polling is
* enabled with 'broken-cd' property. For boards
* older than v1.5 it can be replaced with:
* 'cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;',
* whereas for the newer ones following can be
* used instead:
* 'dat3-cd;'
* 'cd-inverted;'
*/
broken-cd;
wp-inverted; wp-inverted;
bus-width = <8>; bus-width = <8>;
status = "okay"; status = "okay";
......
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
View file @ 2995f0a1
...@@ -90,41 +90,10 @@ pcie@5,0 { ...@@ -90,41 +90,10 @@ pcie@5,0 {
}; };
internal-regs { internal-regs {
/* Two rear eSATA ports */
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
serial@12000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 { /* RTC is provided by Intersil ISL12057 I2C RTC chip */
status = "okay"; rtc@10300 {
phy = <&phy1>; status = "disabled";
phy-mode = "rgmii-id";
};
/* Front USB 2.0 port */
usb@50000 {
status = "okay";
}; };
i2c@11000 { i2c@11000 {
...@@ -132,12 +101,6 @@ i2c@11000 { ...@@ -132,12 +101,6 @@ i2c@11000 {
clock-frequency = <400000>; clock-frequency = <400000>;
status = "okay"; status = "okay";
isl12057: isl12057@68 {
compatible = "isil,isl12057";
reg = <0x68>;
isil,irq2-can-wakeup-machine;
};
/* Controller for rear fan #1 of 3 (Protechnic /* Controller for rear fan #1 of 3 (Protechnic
* MGT4012XB-O20, 8000RPM) near eSATA port */ * MGT4012XB-O20, 8000RPM) near eSATA port */
g762_fan1: g762@3e { g762_fan1: g762@3e {
...@@ -174,6 +137,49 @@ g751: g751@4c { ...@@ -174,6 +137,49 @@ g751: g751@4c {
compatible = "gmt,g751"; compatible = "gmt,g751";
reg = <0x4c>; reg = <0x4c>;
}; };
isl12057: isl12057@68 {
compatible = "isil,isl12057";
reg = <0x68>;
isil,irq2-can-wakeup-machine;
};
};
serial@12000 {
status = "okay";
};
/* Front USB 2.0 port */
usb@50000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
/* Two rear eSATA ports */
sata@a0000 {
nr-ports = <2>;
status = "okay";
}; };
nand@d0000 { nand@d0000 {
......
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