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Commit 29f279c7 authored by Linus Torvalds's avatar Linus Torvalds
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v2.4.5.5 -> v2.4.5.6 

  - Jeff Garzik: net driver updates, PCI PM induced cleanups
  - Me: do ACPI first, so that it doesn't mess up existing device driver
  configurations.  Notably it used to completely destroy PCMCIA on some
  Sony VAIOs.
  - Paul Mackerras: powermac drivers and MAINTAINERS update
  - NIIBE Yutaka: SuperH update
  - Johannes Erdfelt: USB driver updates
  - Russell King: ARM update
  - Alan Cox: merging, merging, merging
parent 396a6123
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CREDITS
View file @ 29f279c7
......@@ -454,6 +454,11 @@ N: Gary Brubaker
E: xavyer@ix.netcom.com
D: USB Serial Empeg Empeg-car Mark I/II Driver
N: Matthias Bruestle
E: m@mbsks.franken.de
D: REINER SCT cyberJack pinpad/e-com USB chipcard reader driver
S: Germany
N: Ray Burr
E: ryb@nightmare.com
D: Original author of Amiga FFS filesystem
......@@ -1136,13 +1141,11 @@ S: Mountain View, California 94041
S: USA
N: Benjamin Herrenschmidt
E: bh40@calva.net
E: benh@kernel.crashing.org
E: benh@mipsys.com
D: PowerMac booter (BootX)
D: Additional PowerBook support
D: Apple "Core99" machines support (ibook,g4,...)
S: 22, rue des Marguettes
S: 75012 Paris
D: Various parts of PPC & PowerMac
S: 122, boulevard Baille
S: 13005 Marseille
S: France
N: Sebastian Hetze
......@@ -1755,6 +1758,8 @@ S: Czech Republic
N: Paul Mackerras
E: paulus@samba.org
D: PPP driver
D: Linux for PowerPC
D: Linux port for PCI Power Macintosh
N: Pat Mackinlay
......@@ -2896,6 +2901,14 @@ S: Kruislaan 419
S: 1098 VA Amsterdam
S: The Netherlands
N: Jeroen Vreeken
E: pe1rxq@amsat.org
W: http://www.chello.nl/~j.vreeken/
D: SE401 usb webcam driver
S: Maastrichterweg 63
S: 5554 GG Valkenswaard
S: The Netherlands
N: Peter Shaobo Wang
E: pwang@mmdcorp.com
W: http://www.mmdcorp.com/pw/linux
......
Documentation/Changes
View file @ 29f279c7
......@@ -347,7 +347,7 @@ Network
PPP
---
o <ftp://ftp.samba.org/ppp/ppp-2.4.0.tar.gz>
o <ftp://ftp.samba.org/pub/ppp/ppp-2.4.0.tar.gz>
Isdn4k-utils
------------
......
Documentation/Configure.help
View file @ 29f279c7
......@@ -11243,6 +11243,29 @@ CONFIG_USB_SERIAL_MCT_U232
The module will be called mct_u232.o. If you want to compile it as
a module, say M here and read Documentation/modules.txt.
USB Prolific 2303 Single Port Serial Driver
CONFIG_USB_SERIAL_PL2303
Say Y here if you want to use the PL2303 USB Serial single port
adapter from Prolific.
This code is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
The module will be called pl2303.o. If you want to compile it as
a module, say M here and read Documentation/modules.txt.
USB REINER SCT cyberJack pinpad/e-com chipcard reader
CONFIG_USB_SERIAL_CYBERJACK
Say Y here if you want to use a cyberJack pinpad/e-com USB chipcard
reader. This is an interface to ISO 7816 compatible contactbased
chipcards, e.g. GSM SIMs.
This code is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
The module will be called cyberjack.o. If you want to compile it as
a module, say M here and read Documentation/modules.txt.
If unsure, say N.
USB Edgeport Serial Driver
CONFIG_USB_SERIAL_EDGEPORT
Say Y here if you want to use any of the following devices from
......@@ -11348,6 +11371,22 @@ CONFIG_USB_PWC
module, say M here and read Documentation/modules.txt.
USB SE401 Camera support
CONFIG_USB_SE401
Say Y here if you want to connect this type of camera to your
computer's USB port. See Documentation/usb/se401.txt for more
information and for a list of supported cameras.
This driver uses the Video For Linux API. You must say Y or M to
"Video For Linux" (under Multimedia Devices) to use this driver.
Information on this API and pointers to "v4l" programs may be found
on the WWW at http://roadrunner.swansea.uk.linux.org/v4l.shtml .
This code is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
The module will be called se401.o. If you want to compile it as a
module, say M here and read Documentation/modules.txt.
USB ADMtek Pegasus-based ethernet device support
CONFIG_USB_PEGASUS
Say Y if you want to use your USB ethernet device. Supported
......
Documentation/java.txt
View file @ 29f279c7
Java(tm) Binary Kernel Support for Linux v1.02
Java(tm) Binary Kernel Support for Linux v1.03
----------------------------------------------
Linux beats them ALL! While all other OS's are TALKING about direct
......@@ -30,6 +30,8 @@ other program after you have done the following:
(you should really have read binfmt_misc.txt now):
support for Java applications:
':Java:M::\xca\xfe\xba\xbe::/usr/local/bin/javawrapper:'
support for executable Jar files:
':ExecutableJAR:E::jar::/usr/local/bin/jarwrapper:'
support for Java Applets:
':Applet:E::html::/usr/bin/appletviewer:'
or the following, if you want to be more selective:
......@@ -343,7 +345,15 @@ int main(int argc, char **argv)
====================== Cut here ===================
Now simply chmod +x the .class and/or .html files you want to execute.
====================== Cut here ===================
#!/bin/bash
# /usr/local/java/bin/jarwrapper - the wrapper for binfmt_misc/jar
java -jar $1
====================== Cut here ===================
Now simply chmod +x the .class, .jar and/or .html files you want to execute.
To add a Java program to your path best put a symbolic link to the main
.class file into /usr/bin (or another place you like) omitting the .class
extension. The directory containing the original .class file will be
......@@ -369,6 +379,11 @@ And then execute it:
./HelloWorld.class
To execute Java Jar files, simple chmod the *.jar files to include
the execution bit, then just do
./Application.jar
To execute Java Applets, simple chmod the *.html files to include
the execution bit, then just do
./Applet.html
......@@ -376,5 +391,6 @@ the execution bit, then just do
originally by Brian A. Lantz, brian@lantz.com
heavily edited for binfmt_misc by Richard Gnther
new scripts by Colin J. Watson <cjw44@cam.ac.uk>.
new scripts by Colin J. Watson <cjw44@cam.ac.uk>
added executable Jar file support by Kurt Huwig <kurt@iku-netz.de>
Documentation/usb/se401.txt 0 → 100644
View file @ 29f279c7
Linux driver for SE401 based USB cameras
Copyright, 2001, Jeroen Vreeken
INTRODUCTION:
The SE401 chip is the used in low-cost usb webcams.
It is produced by Endpoints Inc. (www.endpoints.com).
It interfaces directly to a cmos image sensor and USB. The only other major
part in a se401 based camera is a dram chip.
The following cameras are known to work with this driver:
Aox se401 (non-branded) cameras
Philips PVCV665 USB VGA webcam 'Vesta Fun'
Kensington VideoCAM PC Camera Model 67014
Kensington VideoCAM PC Camera Model 67015
Kensington VideoCAM PC Camera Model 67016
Kensington VideoCAM PC Camera Model 67017
WHAT YOU NEED:
- USB support
- VIDEO4LINUX support
More information about USB support for linux can be found at:
http://www.linux-usb.org
MODULE OPTIONS:
When the driver is compiled as a module you can also use the 'flickerless'
option. With it exposure is limited to values that do not interfere with the
net frequency. Valid options for this option are 0, 50 and 60. (0=disable,
50=50hz, 60=60hz)
KNOWN PROBLEMS:
The driver works fine with the usb-ohci and uhci host controller drivers,
the default settings also work with usb-uhci. But sending more then one bulk
transfer at a time with usb-uhci doesn't work yet.
Users of usb-ohci and uhci can safely enlarge SE401_NUMSBUF in se401.h in
order to increase the throughput (and thus framerate).
HELP:
The latest info on this driver can be found at:
http://www.chello.nl/~j.vreeken/se401/
And questions to me can be send to:
pe1rxq@amsat.org
Documentation/usb/usb-serial.txt
View file @ 29f279c7
......@@ -245,6 +245,17 @@ Inside Out Networks Edgeport Driver
Edgeport/16 Dual
REINER SCT cyberJack pinpad/e-com USB chipcard reader
Interface to ISO 7816 compatible contactbased chipcards, e.g. GSM SIMs.
Current status:
This is the kernel part of the driver for this USB card reader.
There is also a user part for a CT-API driver available. A site
for downloading is TBA. For now, you can request it from the
maintainer (linux-usb@sii.li).
Generic Serial driver
If your device is not one of the above listed devices, compatible with
......
MAINTAINERS
View file @ 29f279c7
......@@ -784,15 +784,21 @@ M: eis@baty.hanse.de
L: linux-x25@vger.kernel.org
S: Maintained
LINUX FOR IBM pSERIES (RS/6000)
P: Paul Mackerras
M: paulus@au.ibm.com
W: http://www.ibm.com/linux/ltc/projects/ppc
S: Supported
LINUX FOR POWERPC
P: Cort Dougan
M: cort@fsmlabs.com
P: Paul Mackerras
M: paulus@samba.org
W: http://www.fsmlabs.com/linuxppcbk.html
S: Maintained
S: Supported
LINUX FOR POWER MACINTOSH
P: Paul Mackerras
M: paulus@samba.org
P: Benjamin Herrenschmidt
M: benh@kernel.crashing.org
W: http://www.linuxppc.org/
L: linuxppc-dev@lists.linuxppc.org
S: Maintained
......@@ -1462,6 +1468,12 @@ L: linux-usb-users@lists.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
S: Maintained
USB SERIAL CYBERJACK PINPAD/E-COM DRIVER
M: linux-usb@sii.li
L: linux-usb-users@lists.sourceforge.net
L: linux-usb-devel@lists.sourceforge.net
S: Supported
USB MASS STORAGE DRIVER
P: Matthew Dharm
M: mdharm-usb@one-eyed-alien.net
......
Makefile
View file @ 29f279c7
VERSION = 2
PATCHLEVEL = 4
SUBLEVEL = 6
EXTRAVERSION =-pre5
EXTRAVERSION =-pre6
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
......@@ -128,6 +128,7 @@ DRIVERS-y :=
DRIVERS-m :=
DRIVERS- :=
DRIVERS-$(CONFIG_ACPI) += drivers/acpi/acpi.o
DRIVERS-$(CONFIG_PARPORT) += drivers/parport/driver.o
DRIVERS-y += drivers/char/char.o \
drivers/block/block.o \
......@@ -177,7 +178,6 @@ DRIVERS-$(CONFIG_I2O) += drivers/i2o/i2o.o
DRIVERS-$(CONFIG_IRDA) += drivers/net/irda/irda.o
DRIVERS-$(CONFIG_I2C) += drivers/i2c/i2c.o
DRIVERS-$(CONFIG_PHONE) += drivers/telephony/telephony.o
DRIVERS-$(CONFIG_ACPI) += drivers/acpi/acpi.o
DRIVERS-$(CONFIG_MD) += drivers/md/mddev.o
DRIVERS-$(CONFIG_BLUEZ) += drivers/bluetooth/bluetooth.o
......
arch/alpha/kernel/sys_alcor.c
View file @ 29f279c7
......@@ -15,6 +15,7 @@
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/reboot.h>
#include <asm/ptrace.h>
#include <asm/system.h>
......@@ -219,11 +220,21 @@ alcor_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
static void
alcor_kill_arch(int mode)
{
switch(mode) {
case LINUX_REBOOT_CMD_RESTART:
/* Who said DEC engineer's have no sense of humor? ;-) */
if (alpha_using_srm) {
*(vuip) GRU_RESET = 0x0000dead;
mb();
}
break;
case LINUX_REBOOT_CMD_HALT:
break;
case LINUX_REBOOT_CMD_POWER_OFF:
break;
}
halt();
}
......
arch/arm/Makefile
View file @ 29f279c7
......@@ -26,7 +26,7 @@ apcs-y :=
apcs-$(CONFIG_CPU_26) :=-mcpu=arm3 -Os
arch-y :=
arch-$(CONFIG_CPU_32v3) :=-march=armv3m
arch-$(CONFIG_CPU_32v3) :=-march=armv3
arch-$(CONFIG_CPU_32v4) :=-march=armv4
arch-$(CONFIG_CPU_32v5) :=-march=armv5
......@@ -123,6 +123,10 @@ TEXTADDR = 0xc0018000
MACHINE = clps711x
endif
ifeq ($(CONFIG_ARCH_ANAKIN),y)
MACHINE = anakin
endif
export LIBGCC MACHINE PROCESSOR TEXTADDR GZFLAGS
# Only set INCDIR if its not already defined above
......@@ -156,7 +160,7 @@ ifeq ($(CONFIG_FPE_FASTFPE),y)
LIBS := arch/arm/fastfpe/fast-math-emu.o $(LIBS)
endif
ifeq ($(CONFIG_ARCH_CLPS7500),y)
ifeq ($(findstring y,$(CONFIG_ARCH_CLPS7500) $(CONFIG_ARCH_L7200)),y)
SUBDIRS += drivers/acorn/char
DRIVERS += drivers/acorn/char/acorn-char.o
endif
......@@ -237,8 +241,8 @@ bp:; @$(MAKEBOOT) bootpImage
@( \
CFG=$(@:_config=); \
if [ -f arch/arm/def-configs/$$CFG ]; then \
$(RM) arch/arm/defconfig; \
cp arch/arm/def-configs/$$CFG arch/arm/defconfig; \
[ -f .config ] && $(MV) .config .config.old; \
cp arch/arm/def-configs/$$CFG .config; \
echo "*** Default configuration for $$CFG installed"; \
echo "*** Next, you may run 'make oldconfig'"; \
else \
......
arch/arm/boot/Makefile
View file @ 29f279c7
......@@ -90,11 +90,19 @@ endif
ifeq ($(CONFIG_SA1100_GRAPHICSCLIENT),y)
ZTEXTADDR = 0xC0200000
endif
ifeq ($(CONFIG_SA1100_YOPY),y)
ZTEXTADDR = 0x00080000
ZBSSADDR = 0xc0200000
endif
ifeq ($(CONFIG_SA1111),y)
ZRELADDR = 0xc0208000
endif
endif
ifeq ($(CONFIG_ARCH_ANAKIN),y)
ZTEXTADDR = 0x20008000
endif
#
# If you don't define ZRELADDR above,
# then it defaults to ZTEXTADDR
......
arch/arm/boot/compressed/Makefile
View file @ 29f279c7
......@@ -30,7 +30,7 @@ OBJS += head-shark.o ofw-shark.o
endif
ifeq ($(CONFIG_ARCH_INTEGRATOR),y)
OBJS += head-netwinder.o
OBJS += head-integrator.o
endif
ifeq ($(CONFIG_ARCH_FTVPCI),y)
......
arch/arm/boot/compressed/head-integrator.S 0 → 100644
View file @ 29f279c7
#include <asm/mach-types.h>
.section ".start", #alloc, #execinstr
mov r7, #MACH_TYPE_INTEGRATOR
arch/arm/boot/compressed/head.S
View file @ 29f279c7
......@@ -12,7 +12,39 @@
/*
* Debugging stuff
*
* Note that these macros must not contain any code which is not
* 100% relocatable. Any attempt to do so will result in a crash.
* Please select one of the following when turning on debugging.
*/
#ifdef DEBUG
#if 0 /* DC21285-type */
.macro loadsp, rb
mov \rb, #0x7c000000
.endm
.macro writeb, rb
strb \rb, [r3, #0x3f8]
.endm
#elif 0 /* RiscPC-type */
.macro loadsp, rb
mov \rb, #0x03000000
orr \rb, \rb, #0x00010000
.endm
.macro writeb, rb
strb \rb, [r3, #0x3f8 << 2]
.endm
#elif 0 /* integrator-type */
.macro loadsp, rb
mov \rb, #0x16000000
.endm
.macro writeb, rb
strb \rb, [r3, #0]
.endm
#else
#error no serial architecture defined
#endif
#endif
.macro kputc,val
mov r0, \val
bl putc
......@@ -27,53 +59,31 @@
.macro debug_reloc_start
#ifdef DEBUG
kputc #'\n'
kphex r6, 8
kphex r6, 8 /* processor id */
kputc #':'
kphex r5, 8
kphex r7, 8 /* architecture id */
kputc #':'
mrc p15, 0, r0, c1, c0
kphex r0, 8 /* control reg
kputc #'\n'
kphex r5, 8 /* decompressed kernel start */
kputc #'-'
kphex r8, 8
kphex r8, 8 /* decompressed kernel end */
kputc #'>'
kphex r4, 8
kphex r4, 8 /* kernel execution address */
kputc #'\n'
#endif
.endm
.macro debug_reloc_end
#ifdef DEBUG
mov r8, r0
kphex r5, 8
kputc #'-'
kphex r8, 8
kphex r5, 8 /* end of kernel */
kputc #'\n'
mov r0, r4
bl memdump
bl memdump /* dump 256 bytes at start of kernel */
#endif
.endm
/*
* Note that these macros must not contain any code which is not
* 100% relocatable. Any attempt to do so will result in a crash.
*/
#if 0
.macro loadsp, rb
mov \rb, #0x7c000000
.endm
.macro writeb, rb
strb \rb, [r3, #0x3f8]
.endm
#else
.macro loadsp, rb
mov \rb, #0x03000000
orr \rb, \rb, #0x00010000
.endm
.macro writeb, rb
strb \rb, [r3, #0x3f8 << 2]
.endm
#endif
.section ".start", #alloc, #execinstr
/*
* sort out different calling conventions
......@@ -91,14 +101,18 @@ start:
.word _edata @ zImage end address
1: mov r7, r1 @ save architecture ID
mov r8, #0 @ save r0
#ifdef CONFIG_ANGELBOOT
/*
* Booting from Angel - need to enter SVC mode and disable
* FIQs/IRQs (numeric definitions from angel arm.h source)
* FIQs/IRQs (numeric definitions from angel arm.h source).
* We only do this if we were in user mode on entry.
*/
mrs r0, cpsr @ get current mode
tst r0, #3 @ not user?
bne not_angel
mov r0, #0x17 @ angel_SWIreason_EnterSVC
swi 0x123456 @ angel_SWI_ARM
mrs r0, cpsr @ turn off interrupts to
not_angel: mrs r0, cpsr @ turn off interrupts to
orr r0, r0, #0xc0 @ prevent angel from running
msr cpsr_c, r0
......@@ -106,7 +120,7 @@ start:
* Note that some cache flushing and other stuff may
* be needed here - is there an Angel SWI call for this?
*/
#endif
/*
* some architecture specific code can be inserted
* by the linker here, but it should preserve r7 and r8.
......@@ -300,29 +314,45 @@ proc_sa1110_type:
.size proc_sa1110_type, . - proc_sa1110_type
/*
* Turn off StrongARM cache and MMU. It is safe to
* leave the I-cache on.
* Turn off the Cache and MMU. ARMv3 does not support
* reading the control register, but ARMv4 does.
*
* On entry,
* r6 = processor ID
* On exit,
* r0, r1 corrupted
* This routine must preserve:
* r4, r6, r7
* On entry, r6 = processor ID
* On exit, r0, r1 corrupted
* This routine must preserve: r4, r6, r7
*/
.align 5
cache_off: ldr r1, proc_sa110_type
eor r1, r1, r6
movs r1, r1, lsr #5 @ catch SA110 and SA1100
beq 1f
ldr r1, proc_sa1110_type
eor r1, r1, r6
movs r1, r1, lsr #4
movne pc, lr
1:
cache_off:
#ifdef CONFIG_CPU_ARM610
eor r1, r6, #0x41000000
eor r1, r1, #0x00560000
bic r1, r1, #0x0000001f
teq r1, #0x00000600
mov r0, #0x00000060 @ ARM6 control reg.
beq __armv3_cache_off
#endif
#ifdef CONFIG_CPU_ARM710
eor r1, r6, #0x41000000
bic r1, r1, #0x00070000
bic r1, r1, #0x000000ff
teq r1, #0x00007000 @ ARM7
teqne r1, #0x00007100 @ ARM710
mov r0, #0x00000070 @ ARM7 control reg.
beq __armv3_cache_off
#endif
mrc p15, 0, r0, c1, c0
bic r0, r0, #0x000d
mcr p15, 0, r0, c1, c0
mcr p15, 0, r0, c1, c0 @ turn MMU and cache off
mov r0, #0
mcr p15, 0, r0, c7, c7 @ invalidate whole cache v4
mcr p15, 0, r0, c8, c7 @ invalidate whole TLB v4
mov pc, lr
__armv3_cache_off:
mcr p15, 0, r0, c1, c0 @ turn MMU and cache off
mov r0, #0
mcr p15, 0, r0, c7, c0 @ invalidate whole cache v3
mcr p15, 0, r0, c5, c0 @ invalidate whole TLB v3
mov pc, lr
/*
......@@ -401,13 +431,10 @@ putc:
memdump: mov r12, r0
mov r10, lr
mov r1, #8
bl phex
mov r0, #'\n'
bl putc
mov r11, #0
2: mov r0, r11, lsl #2
mov r1, #4
add r0, r0, r12
mov r1, #8
bl phex
mov r0, #':'
bl putc
......
arch/arm/boot/compressed/setup-sa1100.S
View file @ 29f279c7
......@@ -95,7 +95,11 @@ skip_SCR:
@ Initialize UART (if bootloader has not done it yet)...
teq r3, #MACH_TYPE_BRUTUS
teqne r3, #MACH_TYPE_ASSABET
teqne r3, #MACH_TYPE_ITSY
teqne r3, #MACH_TYPE_OMNIMETER
teqne r3, #MACH_TYPE_JORNADA720
teqne r3, #MACH_TYPE_GRAPHICSCLIENT
teqne r3, #MACH_TYPE_FLEXANET
bne skip_uart
@ UART3 if Assabet is used with Neponset
......
arch/arm/kernel/calls.S
View file @ 29f279c7
......@@ -13,6 +13,7 @@
#define NR_syscalls 256
#else
__syscall_start:
/* 0 */ .long SYMBOL_NAME(sys_ni_syscall)
.long SYMBOL_NAME(sys_exit)
.long SYMBOL_NAME(sys_fork_wrapper)
......@@ -176,7 +177,7 @@
/* 160 */ .long SYMBOL_NAME(sys_sched_get_priority_min)
.long SYMBOL_NAME(sys_sched_rr_get_interval)
.long SYMBOL_NAME(sys_nanosleep)
.long SYMBOL_NAME(sys_mremap)
.long SYMBOL_NAME(sys_arm_mremap)
.long SYMBOL_NAME(sys_setresuid16)
/* 165 */ .long SYMBOL_NAME(sys_getresuid16)
.long SYMBOL_NAME(sys_ni_syscall)
......@@ -231,8 +232,13 @@
/* 215 */ .long SYMBOL_NAME(sys_setfsuid)
.long SYMBOL_NAME(sys_setfsgid)
.long SYMBOL_NAME(sys_getdents64)
.long SYMBOL_NAME(sys_pivot_root)
.long SYMBOL_NAME(sys_mincore)
/* 220 */ .long SYMBOL_NAME(sys_madvise)
.long SYMBOL_NAME(sys_fcntl64)
__syscall_end:
.rept NR_syscalls-217
.rept NR_syscalls - (__syscall_end - __syscall_start) / 4
.long SYMBOL_NAME(sys_ni_syscall)
.endr
#endif
arch/arm/kernel/ecard.c
View file @ 29f279c7
/*
* linux/arch/arm/kernel/ecard.c
*
* Copyright 1995-1998 Russell King
* Copyright 1995-2001 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -26,7 +26,6 @@
* 17-Apr-1999 RMK Support for EASI Type C cycles.
*/
#define ECARD_C
#define __KERNEL_SYSCALLS__
#include <linux/config.h>
#include <linux/module.h>
......@@ -34,6 +33,7 @@
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/proc_fs.h>
......@@ -382,12 +382,12 @@ ecard_call(struct ecard_request *req)
* We ignore all calls, unless it is a SYS_RESTART call - power down/halts
* will be followed by a SYS_RESTART if ctrl-alt-del is pressed again.
*/
static void ecard_reboot(struct notifier_block *me, unsigned long val, void *v)
static int ecard_reboot(struct notifier_block *me, unsigned long val, void *v)
{
struct ecard_request req;
if (val != SYS_RESTART)
return;
return 0;
/*
* Disable the expansion card interrupt
......@@ -414,6 +414,7 @@ static void ecard_reboot(struct notifier_block *me, unsigned long val, void *v)
have_expmask = ~0;
__raw_writeb(have_expmask, EXPMASK_ENABLE);
#endif
return 0;
}
static struct notifier_block ecard_reboot_notifier = {
......
arch/arm/kernel/entry-armv.S
View file @ 29f279c7
......@@ -1179,7 +1179,6 @@ ENTRY(__trap_init)
stmfd sp!, {r4 - r6, lr}
adr r1, .LCvectors @ set up the vectors
mov r0, #0
ldmia r1, {r1, r2, r3, r4, r5, r6, ip, lr}
stmia r0, {r1, r2, r3, r4, r5, r6, ip, lr}
......
arch/arm/kernel/fiq.c
View file @ 29f279c7
......@@ -48,7 +48,7 @@
#include <asm/system.h>
#include <asm/uaccess.h>
#define FIQ_VECTOR 0x1c
#define FIQ_VECTOR (vectors_base() + 0x1c)
static unsigned long no_fiq_insn;
......
arch/arm/kernel/sys_arm.c
View file @ 29f279c7
......@@ -55,10 +55,19 @@ inline long do_mmap2(
unsigned long prot, unsigned long flags,
unsigned long fd, unsigned long pgoff)
{
int error = -EBADF;
int error = -EINVAL;
struct file * file = NULL;
flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
/*
* If we are doing a fixed mapping, and address < PAGE_SIZE,
* then deny it.
*/
if (flags & MAP_FIXED && addr < PAGE_SIZE && vectors_base() == 0)
goto out;
error = -EBADF;
if (!(flags & MAP_ANONYMOUS)) {
file = fget(fd);
if (!file)
......@@ -101,6 +110,29 @@ asmlinkage int old_mmap(struct mmap_arg_struct *arg)
return error;
}
asmlinkage unsigned long
sys_arm_mremap(unsigned long addr, unsigned long old_len,
unsigned long new_len, unsigned long flags,
unsigned long new_addr)
{
unsigned long ret = -EINVAL;
/*
* If we are doing a fixed mapping, and address < PAGE_SIZE,
* then deny it.
*/
if (flags & MREMAP_FIXED && new_addr < PAGE_SIZE &&
vectors_base() == 0)
goto out;
down_write(&current->mm->mmap_sem);
ret = do_mremap(addr, old_len, new_len, flags, new_addr);
up_write(&current->mm->mmap_sem);
out:
return ret;
}
/*
* Perform the select(nd, in, out, ex, tv) and mmap() system
* calls.
......
arch/arm/kernel/traps.c
View file @ 29f279c7
......@@ -20,6 +20,7 @@
#include <linux/mm.h>
#include <linux/spinlock.h>
#include <linux/ptrace.h>
#include <linux/elf.h>
#include <linux/init.h>
#include <asm/atomic.h>
......@@ -27,6 +28,7 @@
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
#include "ptrace.h"
......@@ -143,12 +145,24 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
c_backtrace(fp, processor_mode(regs));
}
/*
* This is called from SysRq-T (show_task) to display the current
* call trace for each process. Very useful.
*/
void show_trace_task(struct task_struct *tsk)
{
if (tsk != current) {
unsigned int fp = tsk->thread.save->fp;
c_backtrace(fp, 0x10);
}
}
spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
/*
* This function is protected against re-entrancy.
*/
void die(const char *str, struct pt_regs *regs, int err)
NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
{
struct task_struct *tsk = current;
......@@ -173,9 +187,9 @@ void die(const char *str, struct pt_regs *regs, int err)
fs = get_fs();
set_fs(KERNEL_DS);
dump_instr(regs);
dump_stack(tsk, (unsigned long)(regs + 1));
dump_backtrace(regs, tsk);
dump_instr(regs);
set_fs(fs);
}
......@@ -448,9 +462,12 @@ void abort(void)
void __init trap_init(void)
{
extern void __trap_init(void);
extern void __trap_init(void *);
__trap_init();
__trap_init((void *)vectors_base());
if (vectors_base() != 0)
printk("Relocating machine vectors to 0x%08x\n",
vectors_base());
#ifdef CONFIG_CPU_32
modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
#endif
......
arch/arm/mach-ebsa110/arch.c
View file @ 29f279c7
/*
* linux/arch/arm/mach-ebsa110/arch.c
*
* Architecture specific fixups. This is where any
* parameters in the params struct are fixed up, or
* any additional architecture specific information
* is pulled from the params struct.
* Architecture specific fixups.
*/
#include <linux/tty.h>
#include <linux/delay.h>
......
arch/arm/mach-ebsa110/hardware.h 0 → 100644
View file @ 29f279c7
/*
* linux/arch/arm/mach-ebsa110/hardware.h
*
* Copyright (C) 2001 Russell King
*
* Local hardware definitions.
*/
#ifndef HARDWARE_H
#define HARDWARE_H
#define IRQ_MASK 0xfe000000 /* read */
#define IRQ_MSET 0xfe000000 /* write */
#define IRQ_STAT 0xff000000 /* read */
#define IRQ_MCLR 0xff000000 /* write */
#endif
arch/arm/mach-ebsa110/io.c
View file @ 29f279c7
......@@ -188,6 +188,7 @@ u16 __inw(int port)
u32 __inl(int port)
{
BUG();
return 0;
}
EXPORT_SYMBOL(__inb);
......
arch/arm/mm/consistent.c
View file @ 29f279c7
......@@ -67,18 +67,21 @@ void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
#endif
/*
* free wasted pages. We skip the first page since
* we know that it will have count = 1 and won't
* require freeing.
* free wasted pages. We skip the first page since we know
* that it will have count = 1 and won't require freeing.
* We also mark the pages in use as reserved so that
* remap_page_range works.
*/
page = virt_to_page(virt);
free = page + (size >> PAGE_SHIFT);
end = page + (1 << order);
while (++page < end) {
for (; page < end; page++) {
set_page_count(page, 1);
if (page >= free)
__free_page(page);
else
SetPageReserved(page);
}
return ret;
......@@ -108,11 +111,27 @@ void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *handl
* free a page as defined by the above mapping. We expressly forbid
* calling this from interrupt context.
*/
void consistent_free(void *vaddr)
void consistent_free(void *vaddr, size_t size, dma_addr_t handle)
{
struct page *page, *end;
void *virt;
if (in_interrupt())
BUG();
virt = bus_to_virt(handle);
/*
* More messing around with the MM internals. This is
* sick, but then so is remap_page_range().
*/
size = PAGE_ALIGN(size);
page = virt_to_page(virt);
end = page + (size >> PAGE_SHIFT);
for (; page < end; page++)
ClearPageReserved(page);
__iounmap(vaddr);
}
......
arch/arm/mm/fault-armv.c
View file @ 29f279c7
......@@ -24,6 +24,7 @@
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/unaligned.h>
......@@ -45,9 +46,8 @@ extern void do_bad_area(struct task_struct *tsk, struct mm_struct *mm,
*
* Speed optimisations and better fault handling by Russell King.
*
* NOTE!!! This is not portable onto the ARM6/ARM7 processors yet. Also,
* it seems to give a severe performance impact (1 abort/ms - NW runs at
* ARM6 speeds) with GCC 2.7.2.2 - needs checking with a later GCC/EGCS.
* *** NOTE ***
* This code is not portable to processors with late data abort handling.
*/
#define CODING_BITS(i) (i & 0x0e000000)
......@@ -57,6 +57,8 @@ extern void do_bad_area(struct task_struct *tsk, struct mm_struct *mm,
#define LDST_W_BIT(i) (i & (1 << 21)) /* Writeback */
#define LDST_L_BIT(i) (i & (1 << 20)) /* Load */
#define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
#define LDSTH_I_BIT(i) (i & (1 << 22)) /* half-word immed */
#define LDM_S_BIT(i) (i & (1 << 22)) /* write CPSR from SPSR */
......@@ -336,29 +338,48 @@ do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *reg
return TYPE_FAULT;
}
/*
* LDM/STM alignment handler.
*
* There are 4 variants of this instruction:
*
* B = rn pointer before instruction, A = rn pointer after instruction
* ------ increasing address ----->
* | | r0 | r1 | ... | rx | |
* PU = 01 B A
* PU = 11 B A
* PU = 00 A B
* PU = 10 A B
*/
static int
do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs)
{
unsigned int rd, rn, correction, nr_regs, regbits;
unsigned long eaddr;
correction = 4; /* sometimes 8 on ARMv3 */
regs->ARM_pc += correction;
rd = RD_BITS(instr);
rn = RN_BITS(instr);
eaddr = regs->uregs[rn];
unsigned long eaddr, newaddr;
if (LDM_S_BIT(instr))
goto bad;
correction = 4; /* processor implementation defined */
regs->ARM_pc += correction;
ai_multi += 1;
/* count the number of registers in the mask to be transferred */
for (regbits = REGMASK_BITS(instr), nr_regs = 0; regbits; regbits >>= 1)
nr_regs += 4;
rn = RN_BITS(instr);
newaddr = eaddr = regs->uregs[rn];
if (!LDST_U_BIT(instr))
nr_regs = -nr_regs;
newaddr += nr_regs;
if (!LDST_U_BIT(instr))
eaddr -= nr_regs;
eaddr = newaddr;
if (LDST_P_EQ_U(instr)) /* U = P */
eaddr += 4;
/*
* This is a "hint" - we already have eaddr worked out by the
......@@ -369,34 +390,23 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
"addr = %08lx, eaddr = %08lx\n",
instruction_pointer(regs), instr, addr, eaddr);
if ((LDST_U_BIT(instr) == 0 && LDST_P_BIT(instr) == 0) ||
(LDST_U_BIT(instr) && LDST_P_BIT(instr)))
eaddr += 4;
for (regbits = REGMASK_BITS(instr), rd = 0; regbits; regbits >>= 1, rd += 1)
if (regbits & 1) {
if (LDST_L_BIT(instr)) {
if (LDST_L_BIT(instr))
get32_unaligned_check(regs->uregs[rd], eaddr);
if (rd == 15)
correction = 0;
} else
else
put32_unaligned_check(regs->uregs[rd], eaddr);
eaddr += 4;
}
if (LDST_W_BIT(instr)) {
if (LDST_P_BIT(instr) && !LDST_U_BIT(instr))
eaddr -= nr_regs;
else if (LDST_P_BIT(instr))
eaddr -= 4;
else if (!LDST_U_BIT(instr))
eaddr -= 4 + nr_regs;
regs->uregs[rn] = eaddr;
}
if (LDST_W_BIT(instr))
regs->uregs[rn] = newaddr;
if (!LDST_L_BIT(instr) || !(REGMASK_BITS(instr) & (1 << 15)))
regs->ARM_pc -= correction;
return TYPE_DONE;
fault:
regs->ARM_pc -= correction;
return TYPE_FAULT;
bad:
......
arch/arm/mm/mm-armv.c
View file @ 29f279c7
......@@ -79,14 +79,20 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
memzero(new_pgd, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
init_pgd = pgd_offset_k(0);
if (vectors_base() == 0) {
init_pmd = pmd_offset(init_pgd, 0);
init_pte = pte_offset(init_pmd, 0);
/*
* This lock is here just to satisfy pmd_alloc and pte_lock
*/
spin_lock(&mm->page_table_lock);
/*
* On ARM, first page must always be allocated since it contains
* the machine vectors.
* On ARM, first page must always be allocated since it
* contains the machine vectors.
*/
new_pmd = pmd_alloc(mm, new_pgd, 0);
if (!new_pmd)
......@@ -96,20 +102,17 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
if (!new_pte)
goto no_pte;
init_pgd = pgd_offset_k(0);
init_pmd = pmd_offset(init_pgd, 0);
init_pte = pte_offset(init_pmd, 0);
set_pte(new_pte, *init_pte);
spin_unlock(&mm->page_table_lock);
}
/*
* Copy over the kernel and IO PGD entries
*/
memcpy(new_pgd + FIRST_KERNEL_PGD_NR, init_pgd + FIRST_KERNEL_PGD_NR,
(PTRS_PER_PGD - FIRST_KERNEL_PGD_NR) * sizeof(pgd_t));
spin_unlock(&mm->page_table_lock);
/*
* FIXME: this should not be necessary
*/
......@@ -134,10 +137,12 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
void free_pgd_slow(pgd_t *pgd)
{
if (pgd) { /* can pgd be NULL? */
pmd_t *pmd;
pte_t *pte;
if (!pgd)
return;
/* pgd is always present and good */
pmd = (pmd_t *)pgd;
if (pmd_none(*pmd))
......@@ -152,7 +157,6 @@ void free_pgd_slow(pgd_t *pgd)
pmd_clear(pmd);
pte_free(pte);
pmd_free(pmd);
}
free:
free_pages((unsigned long) pgd, 2);
}
......@@ -296,17 +300,6 @@ void __init memtable_init(struct meminfo *mi)
init_maps = p = alloc_bootmem_low_pages(PAGE_SIZE);
p->physical = virt_to_phys(init_maps);
p->virtual = 0;
p->length = PAGE_SIZE;
p->domain = DOMAIN_USER;
p->prot_read = 0;
p->prot_write = 0;
p->cacheable = 1;
p->bufferable = 0;
p ++;
for (i = 0; i < mi->nr_banks; i++) {
if (mi->bank[i].size == 0)
continue;
......@@ -349,17 +342,10 @@ void __init memtable_init(struct meminfo *mi)
p ++;
#endif
/*
* We may have a mapping in virtual address 0.
* Clear it out.
*/
clear_mapping(0);
/*
* Go through the initial mappings, but clear out any
* pgdir entries that are not in the description.
*/
i = 0;
q = init_maps;
do {
if (address < q->virtual || q == p) {
......@@ -375,6 +361,21 @@ void __init memtable_init(struct meminfo *mi)
}
} while (address != 0);
/*
* Create a mapping for the machine vectors at virtual address 0
* or 0xffff0000. We should always try the high mapping.
*/
init_maps->physical = virt_to_phys(init_maps);
init_maps->virtual = vectors_base();
init_maps->length = PAGE_SIZE;
init_maps->domain = DOMAIN_USER;
init_maps->prot_read = 0;
init_maps->prot_write = 0;
init_maps->cacheable = 1;
init_maps->bufferable = 0;
create_mapping(init_maps);
flush_cache_all();
}
......
arch/arm/mm/mm-l7200.c
View file @ 29f279c7
......@@ -10,7 +10,6 @@
#include <asm/hardware.h>
#include <asm/page.h>
#include <asm/proc/domain.h>
#include <asm/setup.h>
#include <asm/mach/map.h>
......
arch/arm/tools/Makefile
View file @ 29f279c7
......@@ -16,7 +16,7 @@ $(TOPDIR)/include/asm-arm/mach-types.h: mach-types gen-mach-types
$(TOPDIR)/include/asm-arm/constants.h: constants-hdr getconstants.c
$(CC) $(CFLAGS) -S -o - getconstants.c | \
sed 's/^\(#define .* \)#\(.*\)/\1\2/;/^#define/!d' | \
sed 's/^\(#define .* \)[#$$]\(.*\)/\1\2/;/^#define/!d' | \
cat constants-hdr - > $@.tmp
cmp $@.tmp $@ >/dev/null 2>&1 || mv $@.tmp $@; $(RM) $@.tmp
......
arch/arm/tools/getconstants.c
View file @ 29f279c7
......@@ -60,7 +60,5 @@ DEFN("PAGE_CLEAN", _PAGE_CLEAN);
DEFN("PAGE_SZ", PAGE_SIZE);
DEFN("KSWI_BASE", 0x900000);
DEFN("KSWI_SYS_BASE", 0x9f0000);
DEFN("SYS_ERROR0", 0x9f0000);
}
arch/arm/tools/mach-types
View file @ 29f279c7
......@@ -6,7 +6,7 @@
# To add an entry into this database, please see Documentation/arm/README,
# or contact rmk@arm.linux.org.uk
#
# Last update: Sat Apr 7 09:45:09 2001
# Last update: Sun Jun 17 00:53:17 2001
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
......@@ -63,7 +63,7 @@ edb7211 ARCH_EDB7211 EDB7211 50
citygo SA1100_CITYGO CITYGO 51
pfs168 SA1100_PFS168 PFS168 52
spot SA1100_SPOT SPOT 53
flexanet ARCH_FLEXANET FLEXANET 54
flexanet SA1100_FLEXANET FLEXANET 54
webpal ARCH_WEBPAL WEBPAL 55
linpda SA1100_LINPDA LINPDA 56
anakin ARCH_ANAKIN ANAKIN 57
......@@ -77,6 +77,26 @@ psion_series7 SA1100_PSION_SERIES7 PSION_SERIES7 64
xfile SA1100_XFILE XFILE 65
accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66
ic200 ARCH_IC200 IC200 67
creditlart SA1100_CREDITLART CREDITLART 68
htm SA1100_HTM HTM 69
iq80310 ARCH_IQ80310 IQ80310 70
freebot SA1100_FREEBOT FREEBOT 71
entel ARCH_ENTEL ENTEL 72
enp3510 ARCH_ENP3510 ENP3510 73
trizeps SA1100_TRIZEPS TRIZEPS 74
nesa SA1100_NESA NESA 75
venus ARCH_VENUS VENUS 76
tardis ARCH_TARDIS TARDIS 77
mercury ARCH_MERCURY MERCURY 78
empeg SA1100_EMPEG EMPEG 79
adi_eb ARCH_I80200FCC I80200FCC 80
itt_cpb SA1100_ITT_CPB ITT_CPB 81
sa1110_svc ARCH_SA1110_SVC SA1110_SVC 82
alpha2 SA1100_ALPHA2 ALPHA2 84
alpha1 SA1100_ALPHA1 ALPHA1 85
netarm ARCH_NETARM NETARM 86
simpad SA1100_SIMPAD SIMPAD 87
pda1 ARCH_PDA1 PDA1 88
lubbock ARCH_LUBBOCK LUBBOCK 89
# The following are unallocated
empeg SA1100_EMPEG EMPEG
arch/i386/defconfig
View file @ 29f279c7
......@@ -102,64 +102,6 @@ CONFIG_PM=y
#
# CONFIG_MTD is not set
#
# RAM/ROM/Flash chip drivers
#
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_AMDSTD is not set
# CONFIG_MTD_SHARP is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_JEDEC is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_SUN_UFLASH is not set
# CONFIG_MTD_NORA is not set
# CONFIG_MTD_PNC2000 is not set
# CONFIG_MTD_RPXLITE is not set
# CONFIG_MTD_SC520CDP is not set
# CONFIG_MTD_NETSC520 is not set
# CONFIG_MTD_SBC_GXX is not set
# CONFIG_MTD_ELAN_104NC is not set
# CONFIG_MTD_SA1100 is not set
# CONFIG_MTD_SA1100_REDBOOT_PARTITIONS is not set
# CONFIG_MTD_SA1100_BOOTLDR_PARTITIONS is not set
# CONFIG_MTD_DC21285 is not set
# CONFIG_MTD_IQ80310 is not set
# CONFIG_MTD_DBOX2 is not set
# CONFIG_MTD_CSTM_MIPS_IXX is not set
# CONFIG_MTD_CFI_FLAGADM is not set
# CONFIG_MTD_MIXMEM is not set
# CONFIG_MTD_OCTAGON is not set
# CONFIG_MTD_VMAX is not set
# CONFIG_MTD_OCELOT is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_MTDRAM is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC1000 is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOCPROBE is not set
#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_NAND_SPIA is not set
#
# Parallel port support
#
......@@ -421,6 +363,13 @@ CONFIG_DUMMY=m
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_ARM_AM79C961A is not set
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
......@@ -439,7 +388,6 @@ CONFIG_NET_PCI=y
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
CONFIG_EEPRO100=y
# CONFIG_EEPRO100_PM is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
......@@ -456,16 +404,18 @@ CONFIG_EEPRO100=y
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_NET_POCKET is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
......@@ -761,6 +711,7 @@ CONFIG_USB_STORAGE=y
# CONFIG_USB_IBMCAM is not set
# CONFIG_USB_OV511 is not set
# CONFIG_USB_PWC is not set
# CONFIG_USB_SE401 is not set
# CONFIG_USB_DSBR is not set
# CONFIG_USB_DABUSB is not set
......@@ -769,6 +720,7 @@ CONFIG_USB_STORAGE=y
#
# CONFIG_USB_PLUSB is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_NET1080 is not set
#
......
arch/i386/kernel/bluesmoke.c
View file @ 29f279c7
......@@ -182,7 +182,7 @@ void __init intel_mcheck_init(struct cpuinfo_x86 *c)
* Set up machine check reporting on the Winchip C6 series
*/
static void winchip_mcheck_init(struct cpuinfo_x86 *c)
static void __init winchip_mcheck_init(struct cpuinfo_x86 *c)
{
u32 lo, hi;
/* Not supported on C3 */
......@@ -207,8 +207,14 @@ static void winchip_mcheck_init(struct cpuinfo_x86 *c)
* This has to be run for each processor
*/
static int mce_disabled = 0;
void __init mcheck_init(struct cpuinfo_x86 *c)
{
if(mce_disabled)
return;
switch(c->x86_vendor)
{
case X86_VENDOR_AMD:
......@@ -226,3 +232,9 @@ void __init mcheck_init(struct cpuinfo_x86 *c)
break;
}
}
static void __init mcheck_disable(char *str, int *unused)
{
mce_disabled = 1;
}
__setup("nomce", mcheck_disable);
arch/sh/config.in
View file @ 29f279c7
......@@ -29,7 +29,9 @@ comment 'Processor type and features'
choice 'SuperH system type' \
"Generic CONFIG_SH_GENERIC \
SolutionEngine CONFIG_SH_SOLUTION_ENGINE \
Overdrive CONFIG_SH_OVERDRIVE \
SolutionEngine7751 CONFIG_SH_7751_SOLUTION_ENGINE \
STB1_Harp CONFIG_SH_STB1_HARP \
STB1_Overdrive CONFIG_SH_STB1_OVERDRIVE \
HP620 CONFIG_SH_HP620 \
HP680 CONFIG_SH_HP680 \
HP690 CONFIG_SH_HP690 \
......@@ -37,9 +39,17 @@ choice 'SuperH system type' \
DMIDA CONFIG_SH_DMIDA \
EC3104 CONFIG_SH_EC3104 \
Dreamcast CONFIG_SH_DREAMCAST \
CAT68701 CONFIG_SH_CAT68701 \
BigSur CONFIG_SH_BIGSUR \
SH2000 CONFIG_SH_SH2000 \
BareCPU CONFIG_SH_UNKNOWN" Generic
define_bool CONFIG_SH_RTC y
# The SH7750 RTC module is disabled in the Dreamcast
if [ "$CONFIG_SH_DREAMCAST" = "y" ]; then
define_bool CONFIG_SH_RTC n
else
define_bool CONFIG_SH_RTC y
fi
if [ "$CONFIG_SH_HP620" = "y" -o "$CONFIG_SH_HP680" = "y" -o \
"$CONFIG_SH_HP690" = "y" ]; then
......@@ -50,7 +60,9 @@ choice 'Processor type' \
"SH7707 CONFIG_CPU_SUBTYPE_SH7707 \
SH7708 CONFIG_CPU_SUBTYPE_SH7708 \
SH7709 CONFIG_CPU_SUBTYPE_SH7709 \
SH7750 CONFIG_CPU_SUBTYPE_SH7750" SH7708
SH7750 CONFIG_CPU_SUBTYPE_SH7750 \
SH7751 CONFIG_CPU_SUBTYPE_SH7751 \
ST40STB1 CONFIG_CPU_SUBTYPE_ST40STB1" SH7708
if [ "$CONFIG_CPU_SUBTYPE_SH7707" = "y" ]; then
define_bool CONFIG_CPU_SH3 y
define_bool CONFIG_CPU_SH4 n
......@@ -67,12 +79,30 @@ if [ "$CONFIG_CPU_SUBTYPE_SH7750" = "y" ]; then
define_bool CONFIG_CPU_SH3 n
define_bool CONFIG_CPU_SH4 y
fi
if [ "$CONFIG_CPU_SUBTYPE_SH7751" = "y" ]; then
define_bool CONFIG_CPU_SH3 n
define_bool CONFIG_CPU_SH4 y
fi
if [ "$CONFIG_CPU_SUBTYPE_ST40STB1" = "y" ]; then
define_bool CONFIG_CPU_SH3 n
define_bool CONFIG_CPU_SH4 y
fi
bool 'Little Endian' CONFIG_CPU_LITTLE_ENDIAN
if [ "$CONFIG_SH_SOLUTION_ENGINE" = "y" -o "$CONFIG_SH_HP600" = "y" -o \
"$CONFIG_SH_OVERDRIVE" = "y" ]; then
"$CONFIG_SH_BIGSUR" = "y" -o "$CONFIG_SH_7751_SOLUTION_ENGINE" = "y" -o \
"$CONFIG_SH_DREAMCAST" = "y" -o "$CONFIG_SH_SH2000" = "y" ]; then
define_hex CONFIG_MEMORY_START 0c000000
else
if [ "$CONFIG_CPU_SUBTYPE_ST40STB1" = "y" ]; then
bool 'Memory on LMI' CONFIG_ST40_LMI_MEMORY
if [ "$CONFIG_ST40_LMI_MEMORY" = "y" ] ; then
define_hex CONFIG_MEMORY_START 08000000
else
hex 'EMI physical memory start address' CONFIG_MEMORY_START 08000000
fi
else
hex 'Physical memory start address' CONFIG_MEMORY_START 08000000
fi
fi
endmenu
......@@ -89,7 +119,8 @@ define_bool CONFIG_SBUS n
bool 'Networking support' CONFIG_NET
if [ "$CONFIG_SH_GENERIC" = "y" -o "$CONFIG_SH_SOLUTION_ENGINE" = "y" -o "$CONFIG_SH_UNKNOWN" = "y" ]; then
if [ "$CONFIG_SH_GENERIC" = "y" -o "$CONFIG_SH_SOLUTION_ENGINE" = "y" -o \
"$CONFIG_SH_UNKNOWN" = "y" -o "$CONFIG_SH_CAT68701" = "y" ]; then
bool 'Compact Flash Enabler support' CONFIG_CF_ENABLER
fi
......@@ -101,6 +132,7 @@ fi
bool 'Hitachi HD64465 companion chip support' CONFIG_HD64465
if [ "$CONFIG_HD64465" = "y" ]; then
hex 'HD64465 start address' CONFIG_HD64465_IOBASE b0000000
int 'HD64465 IRQ' CONFIG_HD64465_IRQ 5
fi
......@@ -197,6 +229,10 @@ fi
#
source drivers/input/Config.in
if [ "$CONFIG_SH_DREAMCAST" = "y" ]; then
source drivers/maple/Config.in
fi
mainmenu_option next_comment
comment 'Character devices'
......@@ -217,10 +253,29 @@ if [ "$CONFIG_UNIX98_PTYS" = "y" ]; then
fi
if [ "$CONFIG_SH_GENERIC" = "y" -o \
"$CONFIG_SH_OVERDRIVE" = "y" -o "$CONFIG_SH_SOLUTION_ENGINE" = "y" ]; then
"$CONFIG_SH_CAT68701" = "y" -o \
"$CONFIG_SH_STB1_HARP" = "y" -o \
"$CONFIG_SH_STB1_OVERDRIVE" = "y" -o \
"$CONFIG_SH_BIGSUR" = "y" -o \
"$CONFIG_SH_7751_SOLUTION_ENGINE" = "y" -o \
"$CONFIG_SH_SOLUTION_ENGINE" = "y" ]; then
bool 'Heartbeat LED' CONFIG_HEARTBEAT
fi
if [ "$CONFIG_SH_DREAMCAST" = "y" -a "$CONFIG_MAPLE" != "n" ]; then
mainmenu_option next_comment
comment 'Maple Bus input peripherals'
if [ "$CONFIG_INPUT" != "n" ]; then
dep_tristate ' Maple Bus keyboard support' CONFIG_MAPLE_KEYBOARD $CONFIG_INPUT
dep_tristate ' Maple Bus mouse support' CONFIG_MAPLE_MOUSE $CONFIG_INPUT
else
comment 'Input core support is required for Maple input peripherals'
fi
endmenu
fi
source drivers/char/joystick/Config.in
if [ "$CONFIG_PARPORT" != "n" ]; then
dep_tristate 'Parallel printer support' CONFIG_PRINTER $CONFIG_PARPORT
if [ "$CONFIG_PRINTER" != "n" ]; then
......@@ -228,14 +283,17 @@ if [ "$CONFIG_PARPORT" != "n" ]; then
fi
dep_tristate 'Support for user-space parallel port device drivers' CONFIG_PPDEV $CONFIG_PARPORT
fi
endmenu
bool 'PS/2 mouse (aka "auxiliary device") support' CONFIG_PSMOUSE
tristate 'Enhanced Real Time Clock Support' CONFIG_RTC
if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
source drivers/char/pcmcia/Config.in
fi
endmenu
source fs/Config.in
source drivers/media/Config.in
if [ "$CONFIG_VT" = "y" ]; then
mainmenu_option next_comment
comment 'Console drivers'
......
arch/sh/kernel/Makefile
View file @ 29f279c7
......@@ -24,8 +24,15 @@ obj-$(CONFIG_SH_RTC) += rtc.o
obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
ifeq ($(CONFIG_PCI),y)
obj-y += pci-sh.o
ifeq ($(CONFIG_SH_DREAMCAST),y)
obj-y += pci-dc.o
else
obj-y += pci-dma.o
obj-$(CONFIG_CPU_SUBTYPE_ST40STB1)+= pci_st40.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751)+= pci-sh7751.o
obj-$(CONFIG_SH_BIGSUR)+= pci-bigsur.o
obj-$(CONFIG_SH_7751_SOLUTION_ENGINE)+= pci-7751se.o
endif
endif
obj-$(CONFIG_SH_HP600) += mach_hp600.o
......@@ -34,6 +41,15 @@ machine-specific-objs += mach_hp600.o
obj-$(CONFIG_SH_SOLUTION_ENGINE)+= mach_se.o setup_se.o io_se.o led_se.o
machine-specific-objs += mach_se.o setup_se.o io_se.o led_se.o
obj-$(CONFIG_SH_7751_SOLUTION_ENGINE)+= mach_se.o setup_se.o io_se.o led_se.o pci-7751se.o
machine-specific-objs += mach_se.o setup_se.o io_se.o led_se.o pci-7751se.o
obj-$(CONFIG_SH_BIGSUR) += mach_bigsur.o setup_bigsur.o io_bigsur.o led_bigsur.o
machine-specific-objs += mach_bigsur.o setup_bigsur.o io_bigsur.o led_bigsur.o
obj-$(CONFIG_SH_SH2000) += setup_sh2000.o io_sh2000.o
machine-specific-objs += setup_sh2000.o io_sh2000.o
obj-$(CONFIG_SH_CAT68701) += mach_cat68701.o io_cat68701.o
machine-specific-objs += mach_cat68701.o io_cat68701.o
......
arch/sh/kernel/entry.S
View file @ 29f279c7
......@@ -489,8 +489,9 @@ __sct: .long SYMBOL_NAME(sys_call_table)
__syscall_ret_trace:
.long syscall_ret_trace
__syscall_ret:
.long SYMBOL_NAME(syscall_ret)
.long syscall_ret
__INV_IMASK:
.long 0xffffff0f ! ~(IMASK)
.align 2
......@@ -502,30 +503,16 @@ reschedule:
.align 2
1: .long SYMBOL_NAME(schedule)
ENTRY(ret_from_irq)
ret_from_irq:
ret_from_exception:
mov #OFF_SR, r0
mov.l @(r0,r15), r0 ! get status register
shll r0
shll r0 ! kernel space?
bt restore_all ! Yes, it's from kernel, go back soon
!
STI()
bra ret_with_reschedule
nop
ENTRY(ret_from_exception)
mov #OFF_SR, r0
mov.l @(r0,r15), r0 ! get status register
shll r0
shll r0 ! kernel space?
bt restore_all ! Yes, it's from kernel, go back soon
!
STI()
bra ret_from_syscall
nop
.align 2
__INV_IMASK:
.long 0xffffff0f ! ~(IMASK)
.align 2
#ifdef COMPAT_OLD_SYSCALL_ABI
......@@ -538,16 +525,11 @@ syscall_ret:
/* fall through */
ENTRY(ret_from_syscall)
mov.l __irq_stat, r0 ! softirq_active
mov.l @r0, r1
mov.l @(4,r0), r2 ! softirq_mask
tst r2, r1
bt ret_with_reschedule
handle_softirq:
mov.l __do_softirq, r0
jsr @r0
nop
ret_with_reschedule:
/* CLI */
stc sr, r0
or #0xf0, r0
ldc r0, sr
!
stc k_current, r1
mov.l @(need_resched,r1), r0
tst r0, r0
......@@ -567,8 +549,6 @@ __do_signal:
.long SYMBOL_NAME(do_signal)
__irq_stat:
.long SYMBOL_NAME(irq_stat)
__do_softirq:
.long SYMBOL_NAME(do_softirq)
.align 2
restore_all:
......@@ -707,7 +687,7 @@ general_exception:
bra handle_exception
mov.l @k2, k2
.align 2
2: .long SYMBOL_NAME(ret_from_exception)
2: .long ret_from_exception
1: .long EXPEVT
!
!
......@@ -728,8 +708,8 @@ interrupt:
.align 2
1: .long EXPEVT
2: .long INTEVT
3: .long SYMBOL_NAME(ret_from_irq)
4: .long SYMBOL_NAME(ret_from_exception)
3: .long ret_from_irq
4: .long ret_from_exception
!
!
......@@ -941,24 +921,143 @@ ENTRY(interrupt_table)
.long SYMBOL_NAME(do_IRQ) ! 63 pcc1i
#endif
#elif defined(__SH4__)
.long SYMBOL_NAME(do_IRQ) ! Hitachi UDI
.long SYMBOL_NAME(do_IRQ) ! GPIO
.long SYMBOL_NAME(do_IRQ) ! DMAC dmte0
.long SYMBOL_NAME(do_IRQ) ! dmte1
.long SYMBOL_NAME(do_IRQ) ! dmte2
.long SYMBOL_NAME(do_IRQ) ! dmte3
.long SYMBOL_NAME(do_IRQ) ! dmae
.long SYMBOL_NAME(do_IRQ)
.long SYMBOL_NAME(do_IRQ) ! SCIF eri
.long SYMBOL_NAME(do_IRQ) ! rxi
.long SYMBOL_NAME(do_IRQ) ! bri
.long SYMBOL_NAME(do_IRQ) ! txi
.long SYMBOL_NAME(do_IRQ) ! 32 Hitachi UDI
.long SYMBOL_NAME(do_IRQ) ! 33 GPIO
.long SYMBOL_NAME(do_IRQ) ! 34 DMAC dmte0
.long SYMBOL_NAME(do_IRQ) ! 35 dmte1
.long SYMBOL_NAME(do_IRQ) ! 36 dmte2
.long SYMBOL_NAME(do_IRQ) ! 37 dmte3
.long SYMBOL_NAME(do_IRQ) ! 38 dmae
.long error ! 39
.long SYMBOL_NAME(do_IRQ) ! 40 SCIF eri
.long SYMBOL_NAME(do_IRQ) ! 41 rxi
.long SYMBOL_NAME(do_IRQ) ! 42 bri
.long SYMBOL_NAME(do_IRQ) ! 43 txi
.long error ! 44
.long error ! 45
.long error ! 46
.long error ! 47
.long SYMBOL_NAME(do_fpu_state_restore) ! 48
.long SYMBOL_NAME(do_fpu_state_restore) ! 49
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7751)
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long error
.long SYMBOL_NAME(do_fpu_state_restore)
.long SYMBOL_NAME(do_fpu_state_restore)
.long SYMBOL_NAME(do_IRQ) ! PCI serr
.long SYMBOL_NAME(do_IRQ) ! dma3
.long SYMBOL_NAME(do_IRQ) ! dma2
.long SYMBOL_NAME(do_IRQ) ! dma1
.long SYMBOL_NAME(do_IRQ) ! dma0
.long SYMBOL_NAME(do_IRQ) ! pwon
.long SYMBOL_NAME(do_IRQ) ! pwdwn
.long SYMBOL_NAME(do_IRQ) ! err
#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
.long error ! 50 0x840
.long error ! 51 0x860
.long error ! 52 0x880
.long error ! 53 0x8a0
.long error ! 54 0x8c0
.long error ! 55 0x8e0
.long error ! 56 0x900
.long error ! 57 0x920
.long error ! 58 0x940
.long error ! 59 0x960
.long error ! 60 0x980
.long error ! 61 0x9a0
.long error ! 62 0x9c0
.long error ! 63 0x9e0
.long SYMBOL_NAME(do_IRQ) ! 64 0xa00 PCI serr
.long SYMBOL_NAME(do_IRQ) ! 65 0xa20 err
.long SYMBOL_NAME(do_IRQ) ! 66 0xa40 ad
.long SYMBOL_NAME(do_IRQ) ! 67 0xa60 pwr_dwn
.long error ! 68 0xa80
.long error ! 69 0xaa0
.long error ! 70 0xac0
.long error ! 71 0xae0
.long SYMBOL_NAME(do_IRQ) ! 72 0xb00 DMA INT0
.long SYMBOL_NAME(do_IRQ) ! 73 0xb20 INT1
.long SYMBOL_NAME(do_IRQ) ! 74 0xb40 INT2
.long SYMBOL_NAME(do_IRQ) ! 75 0xb60 INT3
.long SYMBOL_NAME(do_IRQ) ! 76 0xb80 INT4
.long error ! 77 0xba0
.long SYMBOL_NAME(do_IRQ) ! 78 0xbc0 DMA ERR
.long error ! 79 0xbe0
.long SYMBOL_NAME(do_IRQ) ! 80 0xc00 PIO0
.long SYMBOL_NAME(do_IRQ) ! 81 0xc20 PIO1
.long SYMBOL_NAME(do_IRQ) ! 82 0xc40 PIO2
.long error ! 83 0xc60
.long error ! 84 0xc80
.long error ! 85 0xca0
.long error ! 86 0xcc0
.long error ! 87 0xce0
.long error ! 88 0xd00
.long error ! 89 0xd20
.long error ! 90 0xd40
.long error ! 91 0xd60
.long error ! 92 0xd80
.long error ! 93 0xda0
.long error ! 94 0xdc0
.long error ! 95 0xde0
.long error ! 96 0xe00
.long error ! 97 0xe20
.long error ! 98 0xe40
.long error ! 99 0xe60
.long error ! 100 0xe80
.long error ! 101 0xea0
.long error ! 102 0xec0
.long error ! 103 0xee0
.long error ! 104 0xf00
.long error ! 105 0xf20
.long error ! 106 0xf40
.long error ! 107 0xf60
.long error ! 108 0xf80
.long error ! 109 0xfa0
.long error ! 110 0xfc0
.long error ! 111 0xfe0
.long SYMBOL_NAME(do_IRQ) ! 112 0x1000 Mailbox
.long error ! 113 0x1020
.long error ! 114 0x1040
.long error ! 115 0x1060
.long error ! 116 0x1080
.long error ! 117 0x10a0
.long error ! 118 0x10c0
.long error ! 119 0x10e0
.long error ! 120 0x1100
.long error ! 121 0x1120
.long error ! 122 0x1140
.long error ! 123 0x1160
.long error ! 124 0x1180
.long error ! 125 0x11a0
.long error ! 126 0x11c0
.long error ! 127 0x11e0
.long error ! 128 0x1200
.long error ! 129 0x1220
.long error ! 130 0x1240
.long error ! 131 0x1260
.long error ! 132 0x1280
.long error ! 133 0x12a0
.long error ! 134 0x12c0
.long error ! 135 0x12e0
.long error ! 136 0x1300
.long error ! 137 0x1320
.long error ! 138 0x1340
.long error ! 139 0x1360
.long SYMBOL_NAME(do_IRQ) ! 140 0x1380 EMPI INV_ADDR
.long error ! 141 0x13a0
.long error ! 142 0x13c0
.long error ! 143 0x13e0
#endif
ENTRY(sys_call_table)
......
arch/sh/kernel/hd64465_gpio.c
View file @ 29f279c7
/*
* $Id: hd64465_gpio.c,v 1.1 2001/01/02 15:35:22 mjd Exp $
* $Id: hd64465_gpio.c,v 1.2 2001/05/24 00:13:47 gniibe Exp $
* by Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc
*
......
arch/sh/kernel/io_bigsur.c 0 → 100644
View file @ 29f279c7
/*
* include/asm-sh/io_bigsur.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
* Derived from io_hd64465.h, which bore the message:
* By Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc.
* and from io_hd64461.h, which bore the message:
* Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* IO functions for a Hitachi Big Sur Evaluation Board.
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/bigsur.h>
//#define BIGSUR_DEBUG 2
#undef BIGSUR_DEBUG
#ifdef BIGSUR_DEBUG
#define DPRINTK(args...) printk(args)
#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
#else
#define DPRINTK(args...)
#define DIPRINTK(n, args...)
#endif
/* Low iomap maps port 0-1K to addresses in 8byte chunks */
#define BIGSUR_IOMAP_LO_THRESH 0x400
#define BIGSUR_IOMAP_LO_SHIFT 3
#define BIGSUR_IOMAP_LO_MASK ((1<<BIGSUR_IOMAP_LO_SHIFT)-1)
#define BIGSUR_IOMAP_LO_NMAP (BIGSUR_IOMAP_LO_THRESH>>BIGSUR_IOMAP_LO_SHIFT)
static u32 bigsur_iomap_lo[BIGSUR_IOMAP_LO_NMAP];
static u8 bigsur_iomap_lo_shift[BIGSUR_IOMAP_LO_NMAP];
/* High iomap maps port 1K-64K to addresses in 1K chunks */
#define BIGSUR_IOMAP_HI_THRESH 0x10000
#define BIGSUR_IOMAP_HI_SHIFT 10
#define BIGSUR_IOMAP_HI_MASK ((1<<BIGSUR_IOMAP_HI_SHIFT)-1)
#define BIGSUR_IOMAP_HI_NMAP (BIGSUR_IOMAP_HI_THRESH>>BIGSUR_IOMAP_HI_SHIFT)
static u32 bigsur_iomap_hi[BIGSUR_IOMAP_HI_NMAP];
static u8 bigsur_iomap_hi_shift[BIGSUR_IOMAP_HI_NMAP];
#ifndef MAX
#define MAX(a,b) ((a)>(b)?(a):(b))
#endif
#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift)
{
u32 port, endport = baseport + nports;
DPRINTK("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n",
baseport, nports, addr);
for (port = baseport ;
port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
DPRINTK(" maplo[0x%x] = 0x%08x\n", port, addr);
bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = addr;
bigsur_iomap_lo_shift[port>>BIGSUR_IOMAP_LO_SHIFT] = shift;
addr += (1<<(BIGSUR_IOMAP_LO_SHIFT));
}
for (port = MAX(baseport, BIGSUR_IOMAP_LO_THRESH) ;
port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
DPRINTK(" maphi[0x%x] = 0x%08x\n", port, addr);
bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = addr;
bigsur_iomap_hi_shift[port>>BIGSUR_IOMAP_HI_SHIFT] = shift;
addr += (1<<(BIGSUR_IOMAP_HI_SHIFT));
}
}
EXPORT_SYMBOL(bigsur_port_map);
void bigsur_port_unmap(u32 baseport, u32 nports)
{
u32 port, endport = baseport + nports;
DPRINTK("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports);
for (port = baseport ;
port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = 0;
}
for (port = MAX(baseport, BIGSUR_IOMAP_LO_THRESH) ;
port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = 0;
}
}
EXPORT_SYMBOL(bigsur_port_unmap);
unsigned long bigsur_isa_port2addr(unsigned long port)
{
unsigned long addr = 0;
unsigned char shift;
/* Physical address not in P0, do nothing */
if (PXSEG(port)) addr = port;
/* physical address in P0, map to P2 */
else if (port >= 0x30000)
addr = P2SEGADDR(port);
/* Big Sur I/O + HD64465 registers 0x10000-0x30000 */
else if (port >= BIGSUR_IOMAP_HI_THRESH)
addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH);
/* Handle remapping of high IO/PCI IO ports */
else if (port >= BIGSUR_IOMAP_LO_THRESH) {
addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT];
shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT];
if (addr != 0)
addr += (port & BIGSUR_IOMAP_HI_MASK) << shift;
}
/* Handle remapping of low IO ports */
else {
addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT];
shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT];
if (addr != 0)
addr += (port & BIGSUR_IOMAP_LO_MASK) << shift;
}
DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr);
return addr;
}
static inline void delay(void)
{
ctrl_inw(0xa0000000);
}
unsigned char bigsur_inb(unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b);
return b;
}
unsigned char bigsur_inb_p(unsigned long port)
{
unsigned long v;
unsigned long addr = PORT2ADDR(port);
v = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
delay();
DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v);
return v;
}
unsigned short bigsur_inw(unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr);
DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b);
return b;
}
unsigned int bigsur_inl(unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr);
DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b);
return b;
}
void bigsur_insb(unsigned long port, void *buffer, unsigned long count)
{
unsigned char *buf=buffer;
while(count--) *buf++=inb(port);
}
void bigsur_insw(unsigned long port, void *buffer, unsigned long count)
{
unsigned short *buf=buffer;
while(count--) *buf++=inw(port);
}
void bigsur_insl(unsigned long port, void *buffer, unsigned long count)
{
unsigned long *buf=buffer;
while(count--) *buf++=inl(port);
}
void bigsur_outb(unsigned char b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr);
if (addr != 0)
*(volatile unsigned char*)addr = b;
}
void bigsur_outb_p(unsigned char b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr);
if (addr != 0)
*(volatile unsigned char*)addr = b;
delay();
}
void bigsur_outw(unsigned short b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr);
if (addr != 0)
*(volatile unsigned short*)addr = b;
}
void bigsur_outl(unsigned int b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr);
if (addr != 0)
*(volatile unsigned long*)addr = b;
}
void bigsur_outsb(unsigned long port, const void *buffer, unsigned long count)
{
const unsigned char *buf=buffer;
while(count--) outb(*buf++, port);
}
void bigsur_outsw(unsigned long port, const void *buffer, unsigned long count)
{
const unsigned short *buf=buffer;
while(count--) outw(*buf++, port);
}
void bigsur_outsl(unsigned long port, const void *buffer, unsigned long count)
{
const unsigned long *buf=buffer;
while(count--) outl(*buf++, port);
}
arch/sh/kernel/io_dc.c
View file @ 29f279c7
/*
* $Id: io_dc.c,v 1.1 2001/04/01 15:02:00 yaegashi Exp $
* $Id: io_dc.c,v 1.2 2001/05/24 00:13:47 gniibe Exp $
* I/O routines for SEGA Dreamcast
*/
......
arch/sh/kernel/io_hd64465.c
View file @ 29f279c7
/*
* $Id: io_hd64465.c,v 1.6 2001/02/15 09:13:51 dave_mckay Exp $
* $Id: io_hd64465.c,v 1.7 2001/05/09 07:39:36 gniibe Exp $
* by Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc
*
......@@ -52,6 +52,8 @@ static unsigned char hd64465_iomap_hi_shift[HD64465_IOMAP_HI_NMAP];
#define MAX(a,b) ((a)>(b)?(a):(b))
#endif
#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
void hd64465_port_map(unsigned short baseport, unsigned int nports,
unsigned long addr, unsigned char shift)
{
......@@ -101,7 +103,7 @@ void hd64465_port_unmap(unsigned short baseport, unsigned int nports)
}
EXPORT_SYMBOL(hd64465_port_unmap);
static /*__inline__*/ unsigned long PORT2ADDR(unsigned long port)
unsigned long hd64465_isa_port2addr(unsigned long port)
{
unsigned long addr = 0;
unsigned char shift;
......
arch/sh/kernel/io_sh2000.c 0 → 100644
View file @ 29f279c7
/*
* I/O routine for SH-2000
*/
#include <linux/config.h>
#include <asm/io.h>
#include <asm/machvec.h>
#define IDE_OFFSET 0xb6200000
#define NIC_OFFSET 0xb6000000
#define EXTBUS_OFFSET 0xba000000
unsigned long sh2000_isa_port2addr(unsigned long offset)
{
if((offset & ~7) == 0x1f0 || offset == 0x3f6)
return IDE_OFFSET + offset;
else if((offset & ~0x1f) == 0x300)
return NIC_OFFSET + offset;
return EXTBUS_OFFSET + offset;
}
arch/sh/kernel/irq.c
View file @ 29f279c7
......@@ -37,12 +37,6 @@
#include <asm/irq.h>
#include <linux/irq.h>
/*
* Micro-access to controllers is serialized over the whole
* system. We never hold this lock when we call the actual
* IRQ handler.
*/
spinlock_t irq_controller_lock = SPIN_LOCK_UNLOCKED;
/*
* Controller mappings for all interrupt sources:
*/
......@@ -160,14 +154,15 @@ int handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqaction *
*/
void disable_irq_nosync(unsigned int irq)
{
irq_desc_t *desc = irq_desc + irq;
unsigned long flags;
spin_lock_irqsave(&irq_controller_lock, flags);
if (!irq_desc[irq].depth++) {
irq_desc[irq].status |= IRQ_DISABLED;
irq_desc[irq].handler->disable(irq);
spin_lock_irqsave(&desc->lock, flags);
if (!desc->depth++) {
desc->status |= IRQ_DISABLED;
desc->handler->disable(irq);
}
spin_unlock_irqrestore(&irq_controller_lock, flags);
spin_unlock_irqrestore(&desc->lock, flags);
}
/*
......@@ -187,28 +182,29 @@ void disable_irq(unsigned int irq)
void enable_irq(unsigned int irq)
{
irq_desc_t *desc = irq_desc + irq;
unsigned long flags;
spin_lock_irqsave(&irq_controller_lock, flags);
switch (irq_desc[irq].depth) {
spin_lock_irqsave(&desc->lock, flags);
switch (desc->depth) {
case 1: {
unsigned int status = irq_desc[irq].status & ~IRQ_DISABLED;
irq_desc[irq].status = status;
unsigned int status = desc->status & ~IRQ_DISABLED;
desc->status = status;
if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
irq_desc[irq].status = status | IRQ_REPLAY;
hw_resend_irq(irq_desc[irq].handler,irq);
desc->status = status | IRQ_REPLAY;
hw_resend_irq(desc->handler,irq);
}
irq_desc[irq].handler->enable(irq);
desc->handler->enable(irq);
/* fall-through */
}
default:
irq_desc[irq].depth--;
desc->depth--;
break;
case 0:
printk("enable_irq() unbalanced from %p\n",
__builtin_return_address(0));
}
spin_unlock_irqrestore(&irq_controller_lock, flags);
spin_unlock_irqrestore(&desc->lock, flags);
}
/*
......@@ -245,7 +241,7 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
kstat.irqs[cpu][irq]++;
desc = irq_desc + irq;
spin_lock(&irq_controller_lock);
spin_lock(&desc->lock);
desc->handler->ack(irq);
/*
REPLAY is when Linux resends an IRQ that was dropped earlier
......@@ -265,7 +261,6 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
status |= IRQ_INPROGRESS; /* we are handling it */
}
desc->status = status;
spin_unlock(&irq_controller_lock);
/*
* If there is no IRQ handler or it was disabled, exit early.
......@@ -274,7 +269,7 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
will take care of it.
*/
if (!action)
return 1;
goto out;
/*
* Edge triggered interrupts need to remember
......@@ -287,23 +282,24 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
* SMP environment.
*/
for (;;) {
spin_unlock(&desc->lock);
handle_IRQ_event(irq, &regs, action);
spin_lock(&irq_controller_lock);
spin_lock(&desc->lock);
if (!(desc->status & IRQ_PENDING))
break;
desc->status &= ~IRQ_PENDING;
spin_unlock(&irq_controller_lock);
}
desc->status &= ~IRQ_INPROGRESS;
if (!(desc->status & IRQ_DISABLED))
out:
/*
* The ->end() handler has to deal with interrupts which got
* disabled while the handler was running.
*/
desc->handler->end(irq);
spin_unlock(&irq_controller_lock);
spin_unlock(&desc->lock);
#if 0
__sti();
#endif
if (softirq_active(cpu)&softirq_mask(cpu))
if (softirq_pending(cpu))
do_softirq();
return 1;
}
......@@ -342,14 +338,16 @@ int request_irq(unsigned int irq,
void free_irq(unsigned int irq, void *dev_id)
{
irq_desc_t *desc;
struct irqaction **p;
unsigned long flags;
if (irq >= ACTUAL_NR_IRQS)
return;
spin_lock_irqsave(&irq_controller_lock,flags);
p = &irq_desc[irq].action;
desc = irq_desc + irq;
spin_lock_irqsave(&desc->lock,flags);
p = &desc->action;
for (;;) {
struct irqaction * action = *p;
if (action) {
......@@ -360,20 +358,22 @@ void free_irq(unsigned int irq, void *dev_id)
/* Found it - now remove it from the list of entries */
*pp = action->next;
if (!irq_desc[irq].action) {
irq_desc[irq].status |= IRQ_DISABLED;
irq_desc[irq].handler->shutdown(irq);
if (!desc->action) {
desc->status |= IRQ_DISABLED;
desc->handler->shutdown(irq);
}
spin_unlock_irqrestore(&irq_controller_lock,flags);
spin_unlock_irqrestore(&desc->lock,flags);
kfree(action);
return;
}
printk("Trying to free free IRQ%d\n",irq);
spin_unlock_irqrestore(&irq_controller_lock,flags);
spin_unlock_irqrestore(&desc->lock,flags);
return;
}
}
static DECLARE_MUTEX(probe_sem);
/*
* IRQ autodetection code..
*
......@@ -385,21 +385,44 @@ void free_irq(unsigned int irq, void *dev_id)
unsigned long probe_irq_on(void)
{
unsigned int i;
unsigned long delay;
irq_desc_t *desc;
unsigned long val;
unsigned long delay;
down(&probe_sem);
/*
* something may have generated an irq long ago and we want to
* flush such a longstanding irq before considering it as spurious.
*/
for (i = NR_IRQS-1; i > 0; i--) {
desc = irq_desc + i;
spin_lock_irq(&desc->lock);
if (!desc->action)
desc->handler->startup(i);
spin_unlock_irq(&desc->lock);
}
/* Wait for longstanding interrupts to trigger. */
for (delay = jiffies + HZ/50; time_after(delay, jiffies); )
/* about 20ms delay */ synchronize_irq();
/*
* first, enable any unassigned irqs
* enable any unassigned irqs
* (we must startup again here because if a longstanding irq
* happened in the previous stage, it may have masked itself)
*/
spin_lock_irq(&irq_controller_lock);
for (i = NR_IRQS-1; i > 0; i--) {
if (!irq_desc[i].action) {
irq_desc[i].status |= IRQ_AUTODETECT | IRQ_WAITING;
if (irq_desc[i].handler->startup(i))
irq_desc[i].status |= IRQ_PENDING;
desc = irq_desc + i;
spin_lock_irq(&desc->lock);
if (!desc->action) {
desc->status |= IRQ_AUTODETECT | IRQ_WAITING;
if (desc->handler->startup(i))
desc->status |= IRQ_PENDING;
}
spin_unlock_irq(&desc->lock);
}
spin_unlock_irq(&irq_controller_lock);
/*
* Wait for spurious interrupts to trigger
......@@ -411,23 +434,25 @@ unsigned long probe_irq_on(void)
* Now filter out any obviously spurious interrupts
*/
val = 0;
spin_lock_irq(&irq_controller_lock);
for (i=0; i<NR_IRQS; i++) {
unsigned int status = irq_desc[i].status;
desc = irq_desc + i;
unsigned int status;
if (!(status & IRQ_AUTODETECT))
continue;
spin_lock_irq(&desc->lock);
status = desc->status;
if (status & IRQ_AUTODETECT) {
/* It triggered already - consider it spurious. */
if (!(status & IRQ_WAITING)) {
irq_desc[i].status = status & ~IRQ_AUTODETECT;
irq_desc[i].handler->shutdown(i);
}
desc->status = status & ~IRQ_AUTODETECT;
desc->handler->shutdown(i);
} else
if (i < 32)
val |= 1 << i;
}
spin_unlock_irq(&irq_controller_lock);
spin_unlock_irq(&desc->lock);
}
spin_unlock_irq(&desc->lock);
return val;
}
......@@ -438,22 +463,25 @@ int probe_irq_off(unsigned long val)
nr_irqs = 0;
irq_found = 0;
spin_lock_irq(&irq_controller_lock);
for (i=0; i<NR_IRQS; i++) {
unsigned int status = irq_desc[i].status;
irq_desc_t *desc = irq_desc + i;
unsigned int status;
if (!(status & IRQ_AUTODETECT))
continue;
spin_lock_irq(&desc->lock);
status = desc->status;
if (status & IRQ_AUTODETECT) {
if (!(status & IRQ_WAITING)) {
if (!nr_irqs)
irq_found = i;
nr_irqs++;
}
irq_desc[i].status = status & ~IRQ_AUTODETECT;
irq_desc[i].handler->shutdown(i);
desc->status = status & ~IRQ_AUTODETECT;
desc->handler->shutdown(i);
}
spin_unlock_irq(&desc->lock);
}
spin_unlock_irq(&irq_controller_lock);
up(&probe_sem);
if (nr_irqs > 1)
irq_found = -irq_found;
......@@ -465,6 +493,7 @@ int setup_irq(unsigned int irq, struct irqaction * new)
int shared = 0;
struct irqaction *old, **p;
unsigned long flags;
irq_desc_t *desc = irq_desc + irq;
/*
* Some drivers like serial.c use request_irq() heavily,
......@@ -486,12 +515,12 @@ int setup_irq(unsigned int irq, struct irqaction * new)
/*
* The following block of code has to be executed atomically
*/
spin_lock_irqsave(&irq_controller_lock,flags);
p = &irq_desc[irq].action;
spin_lock_irqsave(&desc->lock,flags);
p = &desc->action;
if ((old = *p) != NULL) {
/* Can't share interrupts unless both agree to */
if (!(old->flags & new->flags & SA_SHIRQ)) {
spin_unlock_irqrestore(&irq_controller_lock,flags);
spin_unlock_irqrestore(&desc->lock,flags);
return -EBUSY;
}
......@@ -506,11 +535,11 @@ int setup_irq(unsigned int irq, struct irqaction * new)
*p = new;
if (!shared) {
irq_desc[irq].depth = 0;
irq_desc[irq].status &= ~IRQ_DISABLED;
irq_desc[irq].handler->startup(irq);
desc->depth = 0;
desc->status &= ~IRQ_DISABLED;
desc->handler->startup(irq);
}
spin_unlock_irqrestore(&irq_controller_lock,flags);
spin_unlock_irqrestore(&desc->lock,flags);
return 0;
}
......
arch/sh/kernel/irq_intc2.c
View file @ 29f279c7
......@@ -45,7 +45,7 @@ static unsigned int startup_intc2_irq(unsigned int irq)
}
static struct hw_interrupt_type intc2_irq_type = {
"INTC2-based-IRQ",
"INTC2-IRQ",
startup_intc2_irq,
shutdown_intc2_irq,
enable_intc2_irq,
......
arch/sh/kernel/irq_ipr.c
View file @ 29f279c7
......@@ -46,7 +46,7 @@ static unsigned int startup_ipr_irq(unsigned int irq)
}
static struct hw_interrupt_type ipr_irq_type = {
"IPR-based-IRQ",
"IPR-IRQ",
startup_ipr_irq,
shutdown_ipr_irq,
enable_ipr_irq,
......@@ -189,7 +189,9 @@ void make_pint_irq(unsigned int irq)
void __init init_IRQ(void)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
int i;
#endif
make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
......@@ -226,27 +228,6 @@ void __init init_IRQ(void)
* Initialize the Interrupt Controller (INTC)
* registers to their power on values
*/
#if 0
/*
* XXX: I think that this is the job of boot loader. -- gniibe
*
* When Takeshi released new boot loader following setting
* will be removed shortly.
*/
ctrl_outb(0, INTC_IRR0);
ctrl_outb(0, INTC_IRR1);
ctrl_outb(0, INTC_IRR2);
ctrl_outw(0, INTC_ICR0);
ctrl_outw(0, INTC_ICR1);/* Really? 0x4000?*/
ctrl_outw(0, INTC_ICR2);
ctrl_outw(0, INTC_INTER);
ctrl_outw(0, INTC_IPRA);
ctrl_outw(0, INTC_IPRB);
ctrl_outw(0, INTC_IPRC);
ctrl_outw(0, INTC_IPRD);
ctrl_outw(0, INTC_IPRE);
#endif
/*
* Enable external irq (INTC IRQ mode).
......
arch/sh/kernel/led_bigsur.c 0 → 100644
View file @ 29f279c7
/*
* linux/arch/sh/kernel/led_bigsur.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
* Derived from led_se.c and led.c, which bore the message:
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Big Sur specific LED code.
*/
#include <linux/config.h>
#include <asm/io.h>
#include <asm/bigsur.h>
static void mach_led(int position, int value)
{
int word;
word = bigsur_inl(BIGSUR_CSLR);
if (value) {
bigsur_outl(word & ~BIGSUR_LED, BIGSUR_CSLR);
} else {
bigsur_outl(word | BIGSUR_LED, BIGSUR_CSLR);
}
}
#ifdef CONFIG_HEARTBEAT
#include <linux/sched.h>
/* Cycle the LED on/off */
void heartbeat_bigsur(void)
{
static unsigned cnt = 0, period = 0, dist = 0;
if (cnt == 0 || cnt == dist)
mach_led( -1, 1);
else if (cnt == 7 || cnt == dist+7)
mach_led( -1, 0);
if (++cnt > period) {
cnt = 0;
/* The hyperbolic function below modifies the heartbeat period
* length in dependency of the current (5min) load. It goes
* through the points f(0)=126, f(1)=86, f(5)=51,
* f(inf)->30. */
period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
dist = period / 4;
}
}
#endif /* CONFIG_HEARTBEAT */
arch/sh/kernel/mach_bigsur.c 0 → 100644
View file @ 29f279c7
/*
* linux/arch/sh/kernel/mach_bigsur.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
* Derived from mach_se.h, which bore the message:
* Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Machine vector for the Hitachi Big Sur Evaluation Board
*/
#include <linux/config.h>
#include <linux/init.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
#include <asm/machvec_init.h>
#include <asm/io.h>
#include <asm/io_bigsur.h>
#include <asm/irq.h>
/*
* The Machine Vector
*/
extern void heartbeat_bigsur(void);
extern void setup_bigsur(void);
extern void init_bigsur_IRQ(void);
struct sh_machine_vector mv_bigsur __initmv = {
mv_name: "Big Sur",
mv_nr_irqs: NR_IRQS, // Defined in <asm/irq.h>
mv_inb: bigsur_inb,
mv_inw: bigsur_inw,
mv_inl: bigsur_inl,
mv_outb: bigsur_outb,
mv_outw: bigsur_outw,
mv_outl: bigsur_outl,
mv_inb_p: bigsur_inb_p,
mv_inw_p: bigsur_inw,
mv_inl_p: bigsur_inl,
mv_outb_p: bigsur_outb_p,
mv_outw_p: bigsur_outw,
mv_outl_p: bigsur_outl,
mv_insb: bigsur_insb,
mv_insw: bigsur_insw,
mv_insl: bigsur_insl,
mv_outsb: bigsur_outsb,
mv_outsw: bigsur_outsw,
mv_outsl: bigsur_outsl,
mv_readb: generic_readb,
mv_readw: generic_readw,
mv_readl: generic_readl,
mv_writeb: generic_writeb,
mv_writew: generic_writew,
mv_writel: generic_writel,
mv_ioremap: generic_ioremap,
mv_iounmap: generic_iounmap,
mv_isa_port2addr: bigsur_isa_port2addr,
mv_irq_demux: bigsur_irq_demux,
mv_init_arch: setup_bigsur,
mv_init_irq: init_bigsur_IRQ,
#ifdef CONFIG_HEARTBEAT
mv_heartbeat: heartbeat_bigsur,
#endif
mv_rtc_gettimeofday: sh_rtc_gettimeofday,
mv_rtc_settimeofday: sh_rtc_settimeofday,
};
ALIAS_MV(bigsur)
arch/sh/kernel/mach_dc.c
View file @ 29f279c7
/*
* $Id: mach_dc.c,v 1.1 2001/04/01 15:02:00 yaegashi Exp $
* $Id: mach_dc.c,v 1.4 2001/05/24 05:09:16 mrbrown Exp $
* SEGA Dreamcast machine vector
*/
......@@ -23,7 +23,7 @@ void __init dreamcast_pcibios_init(void);
struct sh_machine_vector mv_dreamcast __initmv = {
mv_name: "dreamcast",
mv_nr_irqs: 48,
mv_nr_irqs: NR_IRQS,
mv_inb: generic_inb,
mv_inw: generic_inw,
......@@ -57,10 +57,8 @@ struct sh_machine_vector mv_dreamcast __initmv = {
mv_iounmap: generic_iounmap,
mv_init_arch: setup_dreamcast,
#ifdef CONFIG_PCI
mv_init_pci: dreamcast_pcibios_init,
#endif
mv_isa_port2addr: dreamcast_isa_port2addr,
mv_irq_demux: systemasic_irq_demux,
mv_hw_dreamcast: 1,
};
......
arch/sh/kernel/pci-7751se.c 0 → 100644
View file @ 29f279c7
/*
* linux/arch/sh/kernel/pci-7751se.c
*
* Author: Ian DaSilva (idasilva@mvista.com)
*
* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* PCI initialization for the Hitachi SH7751 Solution Engine board (MS7751SE01)
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/pci-sh7751.h>
#define PCIMCR_MRSET_OFF 0xBFFFFFFF
#define PCIMCR_RFSH_OFF 0xFFFFFFFB
/*
* Only long word accesses of the PCIC's internal local registers and the
* configuration registers from the CPU is supported.
*/
#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
#define PCIC_READ(x) readl(PCI_REG(x))
/*
* Description: This function sets up and initializes the pcic, sets
* up the BARS, maps the DRAM into the address space etc, etc.
*/
int __init pcibios_init_platform(void)
{
unsigned long data;
unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
unsigned short bcr2;
//
// Initialize the slave bus controller on the pcic. The values used
// here should not be hardcoded, but they should be taken from the bsc
// on the processor, to make this function as generic as possible.
// (i.e. Another sbc may usr different SDRAM timing settings -- in order
// for the pcic to work, its settings need to be exactly the same.)
//
bcr1 = (*(volatile unsigned long*)(SH7751_BCR1));
bcr2 = (*(volatile unsigned short*)(SH7751_BCR2));
wcr1 = (*(volatile unsigned long*)(SH7751_WCR1));
wcr2 = (*(volatile unsigned long*)(SH7751_WCR2));
wcr3 = (*(volatile unsigned long*)(SH7751_WCR3));
mcr = (*(volatile unsigned long*)(SH7751_MCR));
bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */
(*(volatile unsigned long*)(SH7751_BCR1)) = bcr1;
bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */
PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */
PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */
PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */
PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */
mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */
PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
PCIC_WRITE(SH7751_PCIAINTM, 0x0000980f);
PCIC_WRITE(SH7751_PCICONF1, 0xF39000C7); /* FB9000C7 */
PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O */
PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM0 old val: 0xb0000000 */
PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM1 */
PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Sub system ID & Sub system vendor ID */
PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* PCI MEM0 */
PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* PCI MEM1 */
PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM0 */
PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM1 */
PCIC_WRITE(SH7751_PCICR, 0xa5000001);
printk("SH7751 PCI: Finished initialization of the PCI controller\n");
return 1;
}
int __init pcibios_map_platform_irq(u8 slot, u8 pin)
{
switch (slot) {
case 0: return 13;
case 1: return 13; /* AMD Ethernet controller */
case 2: return -1;
case 3: return -1;
case 4: return -1;
default:
printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
return -1;
}
}
arch/sh/kernel/pci-bigsur.c 0 → 100644
View file @ 29f279c7
/*
* linux/arch/sh/kernel/pci-bigsur.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* PCI initialization for the Hitachi Big Sur Evaluation Board
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/pci-sh7751.h>
#include <asm/bigsur.h>
#define PCI_REG(reg) (SH7751_PCIREG_BASE+reg)
/*
* Initialize the Big Sur PCI interface
* Setup hardware to be Central Funtion
* Copy the BSR regs to the PCI interface
* Setup PCI windows into local RAM
*/
int __init pcibios_init_platform(void) {
u32 reg;
u32 word;
PCIDBG(1,"PCI: bigsur_pci_init called\n");
/* Set the BCR's to enable PCI access */
reg = inl(SH7751_BCR1);
reg |= 0x80000;
outl(reg, SH7751_BCR1);
/* Setup the host hardware */
if(inl(PCI_REG(SH7751_PCICONF0)) !=
(u32)((SH7751_DEVICE_ID <<16) | (SH7751_VENDOR_ID))) {
printk("PCI: Unkown PCI host bridge.\n");
return 0;
}
printk("PCI: SH7751 PCI host bridge found.\n");
/* Turn the clocks back on (not done in reset)*/
outl(0, PCI_REG(SH7751_PCICLKR));
/* Clear Powerdown IRQ's (not done in reset) */
word = SH7751_PCIPINT_D3 | SH7751_PCIPINT_D0;
outl(word, PCI_REG(SH7751_PCICLKR));
/* toggle PCI reset pin */
word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST;
outl(word,PCI_REG(SH7751_PCICR));
/* Wait for a long time... not 1 sec. but long enough */
mdelay(100);
word = SH7751_PCICR_PREFIX;
outl(word,PCI_REG(SH7751_PCICR));
/* set the command/status bits to:
* Wait Cycle Control + Parity Enable + Bus Master +
* Mem space enable
*/
word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES;
outl(word, PCI_REG(SH7751_PCICONF1));
/* define this host as the host bridge */
word = SH7751_PCI_HOST_BRIDGE << 24;
outl(word, PCI_REG(SH7751_PCICONF2));
/* Set IO and Mem windows to local address
* Make PCI and local address the same for easy 1 to 1 mapping
* Window0 = BIGSUR_LSR0_SIZE @ non-cached CS3 base = SDRAM
* Window1 = BIGSUR_LSR1_SIZE @ cached CS3 base = SDRAM
*/
word = BIGSUR_LSR0_SIZE - 1;
outl(word, PCI_REG(SH7751_PCILSR0));
word = BIGSUR_LSR1_SIZE - 1;
outl(word, PCI_REG(SH7751_PCILSR1));
/* Set the values on window 0 PCI config registers */
word = P2SEGADDR(SH7751_CS3_BASE_ADDR);
outl(word, PCI_REG(SH7751_PCILAR0));
outl(word, PCI_REG(SH7751_PCICONF5));
/* Set the values on window 1 PCI config registers */
word = PHYSADDR(SH7751_CS3_BASE_ADDR);
outl(word, PCI_REG(SH7751_PCILAR1));
outl(word, PCI_REG(SH7751_PCICONF6));
/* Set the local 16MB PCI memory space window to
* the lowest PCI mapped address
*/
word = PCIBIOS_MIN_MEM & SH7751_PCIMBR_MASK;
PCIDBG(2,"PCI: Setting upper bits of Memory window to 0x%x\n", word);
outl(word , PCI_REG(SH7751_PCIMBR));
/* Map IO space into PCI IO window
* The IO window is 64K-PCIBIOS_MIN_IO in size
* IO addresses will be translated to the
* PCI IO window base address
*/
PCIDBG(3,"PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n", PCIBIOS_MIN_IO,
(64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO);
bigsur_port_map(PCIBIOS_MIN_IO, (64*1024), SH7751_PCI_IO_BASE+PCIBIOS_MIN_IO,0);
/* Make sure the MSB's of IO window are set to access PCI space correctly */
word = PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK;
PCIDBG(2,"PCI: Setting upper bits of IO window to 0x%x\n", word);
outl(word, PCI_REG(SH7751_PCIIOBR));
/* Set PCI WCRx, BCRx's, copy from BSC locations */
word = inl(SH7751_BCR1);
/* check BCR for SDRAM in area 3 */
if(((word >> 3) & 1) == 0) {
printk("PCI: Area 3 is not configured for SDRAM. BCR1=0x%x\n", word);
return 0;
}
outl(word, PCI_REG(SH7751_PCIBCR1));
word = (u16)inw(SH7751_BCR2);
/* check BCR2 for 32bit SDRAM interface*/
if(((word >> 6) & 0x3) != 0x3) {
printk("PCI: Area 3 is not 32 bit SDRAM. BCR2=0x%x\n", word);
return 0;
}
outl(word, PCI_REG(SH7751_PCIBCR2));
/* configure the wait control registers */
word = inl(SH7751_WCR1);
outl(word, PCI_REG(SH7751_PCIWCR1));
word = inl(SH7751_WCR2);
outl(word, PCI_REG(SH7751_PCIWCR2));
word = inl(SH7751_WCR3);
outl(word, PCI_REG(SH7751_PCIWCR3));
word = inl(SH7751_MCR);
outl(word, PCI_REG(SH7751_PCIMCR));
/* NOTE: I'm ignoring the PCI error IRQs for now..
* TODO: add support for the internal error interrupts and
* DMA interrupts...
*/
/* SH7751 init done, set central function init complete */
word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN;
outl(word,PCI_REG(SH7751_PCICR));
PCIDBG(2,"PCI: bigsur_pci_init finished\n");
return 1;
}
int pcibios_map_platform_irq(u8 slot, u8 pin)
{
/* The Big Sur can be used in a CPCI chassis, but the SH7751 PCI interface is on the
* wrong end of the board so that it can also support a V320 CPI interface chip...
* Therefor the IRQ mapping is somewhat use dependent... I'l assume a linear map for
* now, i.e. INTA=slot0,pin0... INTD=slot3,pin0...
*/
int irq = (slot + pin-1)%4 + BIGSUR_SH7751_PCI_IRQ_BASE;
PCIDBG(2,"PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n", slot, pin-1+'A', irq);
return irq;
}
arch/sh/kernel/pci-dc.c 0 → 100644
View file @ 29f279c7
/*
$ $Id: pci-dc.c,v 1.2 2001/05/24 05:09:16 mrbrown Exp $
* Dreamcast PCI: Supports SEGA Broadband Adaptor only.
*/
#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/dc_sysasic.h>
#define GAPSPCI_REGS 0x01001400
#define GAPSPCI_DMA_BASE 0x01840000
#define GAPSPCI_DMA_SIZE 32768
#define GAPSPCI_BBA_CONFIG 0x01001600
#define GAPSPCI_IRQ HW_EVENT_EXTERNAL
static int gapspci_dma_used;
static struct pci_bus *pci_root_bus;
struct pci_fixup pcibios_fixups[] = {
{0, 0, 0, NULL}
};
#define BBA_SELECTED(dev) (dev->bus->number==0 && dev->devfn==0)
static int gapspci_read_config_byte(struct pci_dev *dev, int where,
u8 * val)
{
if (BBA_SELECTED(dev))
*val = inb(GAPSPCI_BBA_CONFIG+where);
else
*val = 0xff;
return PCIBIOS_SUCCESSFUL;
}
static int gapspci_read_config_word(struct pci_dev *dev, int where,
u16 * val)
{
if (BBA_SELECTED(dev))
*val = inw(GAPSPCI_BBA_CONFIG+where);
else
*val = 0xffff;
return PCIBIOS_SUCCESSFUL;
}
static int gapspci_read_config_dword(struct pci_dev *dev, int where,
u32 * val)
{
if (BBA_SELECTED(dev))
*val = inl(GAPSPCI_BBA_CONFIG+where);
else
*val = 0xffffffff;
return PCIBIOS_SUCCESSFUL;
}
static int gapspci_write_config_byte(struct pci_dev *dev, int where,
u8 val)
{
if (BBA_SELECTED(dev))
outb(val, GAPSPCI_BBA_CONFIG+where);
return PCIBIOS_SUCCESSFUL;
}
static int gapspci_write_config_word(struct pci_dev *dev, int where,
u16 val)
{
if (BBA_SELECTED(dev))
outw(val, GAPSPCI_BBA_CONFIG+where);
return PCIBIOS_SUCCESSFUL;
}
static int gapspci_write_config_dword(struct pci_dev *dev, int where,
u32 val)
{
if (BBA_SELECTED(dev))
outl(val, GAPSPCI_BBA_CONFIG+where);
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops pci_config_ops = {
gapspci_read_config_byte,
gapspci_read_config_word,
gapspci_read_config_dword,
gapspci_write_config_byte,
gapspci_write_config_word,
gapspci_write_config_dword
};
void pcibios_align_resource(void *data, struct resource *res,
unsigned long size)
{
}
void __init pcibios_update_irq(struct pci_dev *dev, int irq)
{
}
void __init pcibios_update_resource(struct pci_dev *dev, struct resource *root,
struct resource *res, int resource)
{
}
void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling */
}
int pcibios_enable_device(struct pci_dev *dev)
{
u16 cmd, old_cmd;
int idx;
struct resource *r;
pci_read_config_word(dev, PCI_COMMAND, &cmd);
old_cmd = cmd;
for (idx = 0; idx < 6; idx++) {
r = dev->resource + idx;
if (!r->start && r->end) {
printk(KERN_ERR
"PCI: Device %s not available because"
" of resource collisions\n",
dev->slot_name);
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
cmd |= PCI_COMMAND_IO;
if (r->flags & IORESOURCE_MEM)
cmd |= PCI_COMMAND_MEMORY;
}
if (cmd != old_cmd) {
printk("PCI: enabling device %s (%04x -> %04x)\n",
dev->slot_name, old_cmd, cmd);
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
}
void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
dma_addr_t * dma_handle)
{
unsigned long buf;
if (gapspci_dma_used+size > GAPSPCI_DMA_SIZE)
return NULL;
buf = GAPSPCI_DMA_BASE+gapspci_dma_used;
gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size);
printk("pci_alloc_consistent: %ld bytes at 0x%p\n", size, buf);
*dma_handle = (dma_addr_t)buf;
return (void *)P2SEGADDR(buf);
}
void pci_free_consistent(struct pci_dev *hwdev, size_t size,
void *vaddr, dma_addr_t dma_handle)
{
/* XXX */
}
void __init pcibios_fixup_pbus_ranges(struct pci_bus *bus, struct pbus_set_ranges_data *ranges)
{
}
void __init pcibios_fixup_bus(struct pci_bus *bus)
{
struct list_head *ln;
struct pci_dev *dev;
for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) {
dev = pci_dev_b(ln);
if (!BBA_SELECTED(dev)) continue;
printk("PCI: MMIO fixup to %s\n", dev->name);
dev->resource[1].start=0x01001700;
dev->resource[1].end=0x010017ff;
}
}
static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
{
return PCI_SLOT(dev->devfn);
}
static int __init map_dc_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
return GAPSPCI_IRQ;
}
void __init pcibios_init(void)
{
pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
/* pci_assign_unassigned_resources(); */
pci_fixup_irqs(no_swizzle, map_dc_irq);
}
/* Haven't done anything here as yet */
char * __init pcibios_setup(char *str)
{
return str;
}
int __init gapspci_init(void)
{
int i;
char idbuf[16];
for(i=0; i<16; i++)
idbuf[i]=inb(GAPSPCI_REGS+i);
if(strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
return -1;
outl(0x5a14a501, GAPSPCI_REGS+0x18);
for(i=0; i<1000000; i++);
if(inl(GAPSPCI_REGS+0x18)!=1)
return -1;
outl(0x01000000, GAPSPCI_REGS+0x20);
outl(0x01000000, GAPSPCI_REGS+0x24);
outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28);
outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c);
outl(1, GAPSPCI_REGS+0x14);
outl(1, GAPSPCI_REGS+0x34);
gapspci_dma_used=0;
/* Setting Broadband Adapter */
outw(0xf900, GAPSPCI_BBA_CONFIG+0x06);
outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30);
outb(0x00, GAPSPCI_BBA_CONFIG+0x3c);
outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d);
outw(0x0006, GAPSPCI_BBA_CONFIG+0x04);
outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
return 0;
}
arch/sh/kernel/pci-dma.c 0 → 100644
View file @ 29f279c7
/*
* Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Dynamic DMA mapping support.
*/
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/addrspace.h>
void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
dma_addr_t * dma_handle)
{
void *ret;
int gfp = GFP_ATOMIC;
ret = (void *) __get_free_pages(gfp, get_order(size));
if (ret != NULL) {
/* Is it neccessary to do the memset? */
memset(ret, 0, size);
*dma_handle = virt_to_bus(ret);
}
/* We must flush the cache before we pass it on to the device */
flush_cache_all();
return P2SEGADDR(ret);
}
void pci_free_consistent(struct pci_dev *hwdev, size_t size,
void *vaddr, dma_addr_t dma_handle)
{
unsigned long p1addr=P1SEGADDR((unsigned long)vaddr);
free_pages(p1addr, get_order(size));
}
arch/sh/kernel/pci-sh.c deleted 100644 → 0
View file @ 396a6123
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/errno.h>
#include <asm/machvec.h>
void __init pcibios_init(void)
{
if (sh_mv.mv_init_pci != NULL) {
sh_mv.mv_init_pci();
}
}
/* Haven't done anything here as yet */
char * __init pcibios_setup(char *str)
{
return str;
}
/* We don't have anything here to fixup */
struct pci_fixup pcibios_fixups[] = {
{0, 0, 0, NULL}
};
arch/sh/kernel/pci-sh7751.c 0 → 100644
View file @ 29f279c7
This diff is collapsed.
arch/sh/kernel/pci_st40.c
View file @ 29f279c7
......@@ -141,6 +141,31 @@ static u32 __init r2p2(u32 num)
return tmp;
}
static void __init pci_fixup_ide_bases(struct pci_dev *d)
{
int i;
/*
* PCI IDE controllers use non-standard I/O port decoding, respect it.
*/
if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
return;
printk("PCI: IDE base address fixup for %s\n", d->slot_name);
for(i=0; i<4; i++) {
struct resource *r = &d->resource[i];
if ((r->start & ~0x80) == 0x374) {
r->start |= 2;
r->end = r->start;
}
}
}
/* Add future fixups here... */
struct pci_fixup pcibios_fixups[] = {
{ PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases },
{ 0 }
};
int __init st40pci_init(unsigned memStart, unsigned memSize)
{
......@@ -234,6 +259,11 @@ int __init st40pci_init(unsigned memStart, unsigned memSize)
return 1;
}
char * __init pcibios_setup(char *str)
{
return str;
}
#define SET_CONFIG_BITS(bus,devfn,where)\
(((bus) << 16) | ((devfn) << 8) | ((where) & ~3) | (bus!=0))
......@@ -390,10 +420,14 @@ pcibios_fixup_pbus_ranges(struct pci_bus *bus,
ranges->mem_end -= bus->resource[1]->start;
}
void __init st40_pcibios_init(void)
void __init pcibios_init(void)
{
extern unsigned long memory_start, memory_end;
if (sh_mv.mv_init_pci != NULL) {
sh_mv.mv_init_pci();
}
/* The pci subsytem needs to know where memory is and how much
* of it there is. I've simply made these globals. A better mechanism
* is probably needed.
......@@ -492,3 +526,23 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
printk("PCI: Assigning IRQ %02d to %s\n", irq, dev->name);
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}
/*
* If we set up a device for bus mastering, we need to check the latency
* timer as certain crappy BIOSes forget to set it properly.
*/
unsigned int pcibios_max_latency = 255;
void pcibios_set_master(struct pci_dev *dev)
{
u8 lat;
pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
if (lat < 16)
lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
else if (lat > pcibios_max_latency)
lat = pcibios_max_latency;
else
return;
printk("PCI: Setting latency timer of device %s to %d\n", dev->slot_name, lat);
pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
}
arch/sh/kernel/rtc.c
View file @ 29f279c7
......@@ -13,62 +13,6 @@
#include <asm/io.h>
#include <asm/rtc.h>
/* RCR1 Bits */
#define RCR1_CF 0x80 /* Carry Flag */
#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
#define RCR1_AF 0x01 /* Alarm Flag */
/* RCR2 Bits */
#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
#define RCR2_RTCEN 0x08 /* ENable RTC */
#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
#define RCR2_RESET 0x02 /* Reset bit */
#define RCR2_START 0x01 /* Start bit */
#if defined(__sh3__)
/* SH-3 RTC */
#define R64CNT 0xfffffec0
#define RSECCNT 0xfffffec2
#define RMINCNT 0xfffffec4
#define RHRCNT 0xfffffec6
#define RWKCNT 0xfffffec8
#define RDAYCNT 0xfffffeca
#define RMONCNT 0xfffffecc
#define RYRCNT 0xfffffece
#define RSECAR 0xfffffed0
#define RMINAR 0xfffffed2
#define RHRAR 0xfffffed4
#define RWKAR 0xfffffed6
#define RDAYAR 0xfffffed8
#define RMONAR 0xfffffeda
#define RCR1 0xfffffedc
#define RCR2 0xfffffede
#define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */
#elif defined(__SH4__)
/* SH-4 RTC */
#define R64CNT 0xffc80000
#define RSECCNT 0xffc80004
#define RMINCNT 0xffc80008
#define RHRCNT 0xffc8000c
#define RWKCNT 0xffc80010
#define RDAYCNT 0xffc80014
#define RMONCNT 0xffc80018
#define RYRCNT 0xffc8001c /* 16bit */
#define RSECAR 0xffc80020
#define RMINAR 0xffc80024
#define RHRAR 0xffc80028
#define RWKAR 0xffc8002c
#define RDAYAR 0xffc80030
#define RMONAR 0xffc80034
#define RCR1 0xffc80038
#define RCR2 0xffc8003c
#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
#endif
#ifndef BCD_TO_BIN
#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
#endif
......
arch/sh/kernel/setup.c
View file @ 29f279c7
......@@ -521,6 +521,9 @@ int get_cpuinfo(char *buffer)
PRINT_CLOCK("CPU", boot_cpu_data.cpu_clock);
PRINT_CLOCK("Bus", boot_cpu_data.bus_clock);
#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
PRINT_CLOCK("Memory", boot_cpu_data.memory_clock);
#endif
PRINT_CLOCK("Peripheral module", boot_cpu_data.module_clock);
return p - buffer;
......
arch/sh/kernel/setup_bigsur.c 0 → 100644
View file @ 29f279c7
This diff is collapsed.
arch/sh/kernel/setup_dc.c
View file @ 29f279c7
This diff is collapsed.
arch/sh/kernel/setup_od.c deleted 100644 → 0
View file @ 396a6123
/* $Id: setup_od.c,v 1.1 2000/06/14 09:35:59 stuart_menefy Exp $
*
* arch/sh/kernel/setup_od.c
*
* Copyright (C) 2000 Stuart Menefy
*
* STMicroelectronics Overdrive Support.
*
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
/*
* Initialize the board
*/
int __init setup_od(void)
{
/* Enable RS232 receive buffers */
volatile int* p = (volatile int*)0xa3000000;
#if defined(CONFIG_SH_ORION)
*p=1;
#elif defined(CONFIG_SH_OVERDRIVE)
*p=0x1e;
#else
#error Illegal configuration
#endif
printk(KERN_INFO "STMicroelectronics Overdrive Setup...done\n");
return 0;
}
module_init(setup_od);
arch/sh/kernel/setup_sh2000.c 0 → 100644
View file @ 29f279c7
This diff is collapsed.
arch/sh/kernel/sh_ksyms.c
View file @ 29f279c7
......@@ -18,6 +18,7 @@
#include <asm/hardirq.h>
#include <asm/delay.h>
#include <asm/pgalloc.h>
#include <asm/pci.h>
#include <linux/irq.h>
extern void dump_thread(struct pt_regs *, struct user *);
......@@ -44,14 +45,25 @@ EXPORT_SYMBOL(strtok);
EXPORT_SYMBOL(strpbrk);
EXPORT_SYMBOL(strstr);
EXPORT_SYMBOL(strlen);
EXPORT_SYMBOL(strnlen);
EXPORT_SYMBOL(strchr);
EXPORT_SYMBOL(strcat);
EXPORT_SYMBOL(strncat);
/* PCI exports */
#ifdef CONFIG_PCI
EXPORT_SYMBOL(pci_alloc_consistent);
EXPORT_SYMBOL(pci_free_consistent);
EXPORT_SYMBOL(pcibios_penalize_isa_irq);
#endif
/* mem exports */
EXPORT_SYMBOL(memchr);
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(memcpy_fromio);
EXPORT_SYMBOL(memcpy_toio);
EXPORT_SYMBOL(memset);
EXPORT_SYMBOL(memset_io);
EXPORT_SYMBOL(memmove);
EXPORT_SYMBOL(memcmp);
......@@ -63,20 +75,32 @@ EXPORT_SYMBOL(boot_cpu_data);
EXPORT_SYMBOL(get_vm_area);
/* semaphore exports */
EXPORT_SYMBOL(__up);
EXPORT_SYMBOL(__down);
EXPORT_SYMBOL(__down_interruptible);
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__const_udelay);
#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL_NOVERS(name)
/* These symbols are generated by the compiler itself */
DECLARE_EXPORT(__udivsi3);
DECLARE_EXPORT(__sdivsi3);
DECLARE_EXPORT(__ashrdi3);
DECLARE_EXPORT(__ashldi3);
DECLARE_EXPORT(__lshrdi3);
DECLARE_EXPORT(__movstr);
#ifdef __SH4__
DECLARE_EXPORT(__movstr_i4_even);
DECLARE_EXPORT(__movstr_i4_odd);
DECLARE_EXPORT(__ashrdi3);
DECLARE_EXPORT(__ashldi3);
/* needed by some modules */
EXPORT_SYMBOL(flush_cache_all);
EXPORT_SYMBOL(flush_cache_range);
EXPORT_SYMBOL(flush_dcache_page);
#endif
EXPORT_SYMBOL(flush_tlb_page);
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