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Commit 2ae203fa authored by Michał Mirosław's avatar Michał Mirosław Committed by Martin K. Petersen
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scsi: aic7xxx: regenerate firmware files 

Regenerate firmware files to make cleaner base for following fix.
This removes some unused definitions and reorders some #defines, but
the code remains the same.
Signed-off-by: default avatarMichał Mirosław <mirq-linux@rere.qmqm.pl>
Reviewed-by: default avatarHannes Reinecke <hare@suse.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 3ee25e8f
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Showing with 336 additions and 1211 deletions
drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
View file @ 2ae203fa
...@@ -12,13 +12,6 @@ typedef struct ahd_reg_parse_entry { ...@@ -12,13 +12,6 @@ typedef struct ahd_reg_parse_entry {
uint8_t mask; uint8_t mask;
} ahd_reg_parse_entry_t; } ahd_reg_parse_entry_t;
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_mode_ptr_print;
#else
#define ahd_mode_ptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MODE_PTR", 0x00, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intstat_print; ahd_reg_print_t ahd_intstat_print;
#else #else
...@@ -26,27 +19,6 @@ ahd_reg_print_t ahd_intstat_print; ...@@ -26,27 +19,6 @@ ahd_reg_print_t ahd_intstat_print;
ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqintcode_print;
#else
#define ahd_seqintcode_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQINTCODE", 0x02, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_error_print;
#else
#define ahd_error_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ERROR", 0x04, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_hescb_qoff_print;
#else
#define ahd_hescb_qoff_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "HESCB_QOFF", 0x08, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_hs_mailbox_print; ahd_reg_print_t ahd_hs_mailbox_print;
#else #else
...@@ -61,27 +33,6 @@ ahd_reg_print_t ahd_seqintstat_print; ...@@ -61,27 +33,6 @@ ahd_reg_print_t ahd_seqintstat_print;
ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrseqintstat_print;
#else
#define ahd_clrseqintstat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRSEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_swtimer_print;
#else
#define ahd_swtimer_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SWTIMER", 0x0e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sescb_qoff_print;
#else
#define ahd_sescb_qoff_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SESCB_QOFF", 0x12, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intctl_print; ahd_reg_print_t ahd_intctl_print;
#else #else
...@@ -110,111 +61,6 @@ ahd_reg_print_t ahd_sg_cache_shadow_print; ...@@ -110,111 +61,6 @@ ahd_reg_print_t ahd_sg_cache_shadow_print;
ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqin_print;
#else
#define ahd_lqin_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQIN", 0x20, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lunptr_print;
#else
#define ahd_lunptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LUNPTR", 0x22, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmdlenptr_print;
#else
#define ahd_cmdlenptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CMDLENPTR", 0x25, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_attrptr_print;
#else
#define ahd_attrptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ATTRPTR", 0x26, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_flagptr_print;
#else
#define ahd_flagptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "FLAGPTR", 0x27, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmdptr_print;
#else
#define ahd_cmdptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CMDPTR", 0x28, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qnextptr_print;
#else
#define ahd_qnextptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "QNEXTPTR", 0x29, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_abrtbyteptr_print;
#else
#define ahd_abrtbyteptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ABRTBYTEPTR", 0x2b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_abrtbitptr_print;
#else
#define ahd_abrtbitptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ABRTBITPTR", 0x2c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lunlen_print;
#else
#define ahd_lunlen_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LUNLEN", 0x30, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cdblimit_print;
#else
#define ahd_cdblimit_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CDBLIMIT", 0x31, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_maxcmd_print;
#else
#define ahd_maxcmd_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MAXCMD", 0x32, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_maxcmdcnt_print;
#else
#define ahd_maxcmdcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MAXCMDCNT", 0x33, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqctl1_print;
#else
#define ahd_lqctl1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQCTL1", 0x38, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqctl2_print;
#else
#define ahd_lqctl2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQCTL2", 0x39, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsiseq0_print; ahd_reg_print_t ahd_scsiseq0_print;
#else #else
...@@ -229,13 +75,6 @@ ahd_reg_print_t ahd_scsiseq1_print; ...@@ -229,13 +75,6 @@ ahd_reg_print_t ahd_scsiseq1_print;
ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sxfrctl0_print;
#else
#define ahd_sxfrctl0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SXFRCTL0", 0x3c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dffstat_print; ahd_reg_print_t ahd_dffstat_print;
#else #else
...@@ -243,13 +82,6 @@ ahd_reg_print_t ahd_dffstat_print; ...@@ -243,13 +82,6 @@ ahd_reg_print_t ahd_dffstat_print;
ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_multargid_print;
#else
#define ahd_multargid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MULTARGID", 0x40, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsisigi_print; ahd_reg_print_t ahd_scsisigi_print;
#else #else
...@@ -264,977 +96,270 @@ ahd_reg_print_t ahd_scsiphase_print; ...@@ -264,977 +96,270 @@ ahd_reg_print_t ahd_scsiphase_print;
ahd_print_register(NULL, 0, "SCSIPHASE", 0x42, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SCSIPHASE", 0x42, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsidat_print;
#else
#define ahd_scsidat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSIDAT", 0x44, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsibus_print; ahd_reg_print_t ahd_scsibus_print;
#else #else
#define ahd_scsibus_print(regvalue, cur_col, wrap) \ #define ahd_scsibus_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSIBUS", 0x46, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SCSIBUS", 0x46, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_targidin_print;
#else
#define ahd_targidin_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "TARGIDIN", 0x48, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_selid_print;
#else
#define ahd_selid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SELID", 0x49, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sblkctl_print;
#else
#define ahd_sblkctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SBLKCTL", 0x4a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat0_print;
#else
#define ahd_sstat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SSTAT0", 0x4b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_simode0_print;
#else
#define ahd_simode0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SIMODE0", 0x4b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat1_print;
#else
#define ahd_sstat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SSTAT1", 0x4c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat2_print;
#else
#define ahd_sstat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SSTAT2", 0x4d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrsint2_print;
#else
#define ahd_clrsint2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRSINT2", 0x4d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_perrdiag_print;
#else
#define ahd_perrdiag_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "PERRDIAG", 0x4e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistate_print;
#else
#define ahd_lqistate_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTATE", 0x4e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_soffcnt_print;
#else
#define ahd_soffcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SOFFCNT", 0x4f, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostate_print;
#else
#define ahd_lqostate_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTATE", 0x4f, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistat0_print;
#else
#define ahd_lqistat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTAT0", 0x50, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrlqiint0_print;
#else
#define ahd_clrlqiint0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRLQIINT0", 0x50, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqimode0_print;
#else
#define ahd_lqimode0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQIMODE0", 0x50, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqimode1_print;
#else
#define ahd_lqimode1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQIMODE1", 0x51, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistat1_print;
#else
#define ahd_lqistat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTAT1", 0x51, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrlqiint1_print;
#else
#define ahd_clrlqiint1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRLQIINT1", 0x51, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqistat2_print;
#else
#define ahd_lqistat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQISTAT2", 0x52, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sstat3_print;
#else
#define ahd_sstat3_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SSTAT3", 0x53, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_simode3_print;
#else
#define ahd_simode3_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SIMODE3", 0x53, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrsint3_print;
#else
#define ahd_clrsint3_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRSINT3", 0x53, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostat0_print;
#else
#define ahd_lqostat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTAT0", 0x54, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrlqoint0_print;
#else
#define ahd_clrlqoint0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRLQOINT0", 0x54, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqomode0_print;
#else
#define ahd_lqomode0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOMODE0", 0x54, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqomode1_print;
#else
#define ahd_lqomode1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOMODE1", 0x55, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostat1_print;
#else
#define ahd_lqostat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTAT1", 0x55, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrlqoint1_print;
#else
#define ahd_clrlqoint1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRLQOINT1", 0x55, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqostat2_print;
#else
#define ahd_lqostat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSTAT2", 0x56, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_os_space_cnt_print;
#else
#define ahd_os_space_cnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "OS_SPACE_CNT", 0x56, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_simode1_print;
#else
#define ahd_simode1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SIMODE1", 0x57, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_gsfifo_print;
#else
#define ahd_gsfifo_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "GSFIFO", 0x58, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dffsxfrctl_print;
#else
#define ahd_dffsxfrctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DFFSXFRCTL", 0x5a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lqoscsctl_print;
#else
#define ahd_lqoscsctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LQOSCSCTL", 0x5a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_nextscb_print;
#else
#define ahd_nextscb_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEXTSCB", 0x5a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_clrseqintsrc_print;
#else
#define ahd_clrseqintsrc_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CLRSEQINTSRC", 0x5b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqintsrc_print;
#else
#define ahd_seqintsrc_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQINTSRC", 0x5b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_currscb_print;
#else
#define ahd_currscb_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CURRSCB", 0x5c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqimode_print;
#else
#define ahd_seqimode_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQIMODE", 0x5c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_mdffstat_print;
#else
#define ahd_mdffstat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MDFFSTAT", 0x5d, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lastscb_print;
#else
#define ahd_lastscb_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LASTSCB", 0x5e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negoaddr_print;
#else
#define ahd_negoaddr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEGOADDR", 0x60, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negperiod_print;
#else
#define ahd_negperiod_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEGPERIOD", 0x61, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negoffset_print;
#else
#define ahd_negoffset_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEGOFFSET", 0x62, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negppropts_print;
#else
#define ahd_negppropts_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEGPPROPTS", 0x63, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_negconopts_print;
#else
#define ahd_negconopts_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEGCONOPTS", 0x64, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_annexcol_print;
#else
#define ahd_annexcol_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ANNEXCOL", 0x65, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_annexdat_print;
#else
#define ahd_annexdat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ANNEXDAT", 0x66, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scschkn_print;
#else
#define ahd_scschkn_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSCHKN", 0x66, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_iownid_print;
#else
#define ahd_iownid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "IOWNID", 0x67, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_shcnt_print;
#else
#define ahd_shcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SHCNT", 0x68, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_townid_print;
#else
#define ahd_townid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "TOWNID", 0x69, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seloid_print;
#else
#define ahd_seloid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SELOID", 0x6b, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scbhaddr_print;
#else
#define ahd_scbhaddr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCBHADDR", 0x7c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sghaddr_print;
#else
#define ahd_sghaddr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scbhcnt_print;
#else
#define ahd_scbhcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCBHCNT", 0x84, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sghcnt_print;
#else
#define ahd_sghcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_pcixctl_print;
#else
#define ahd_pcixctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "PCIXCTL", 0x93, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dchspltstat0_print;
#else
#define ahd_dchspltstat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DCHSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dchspltstat1_print;
#else
#define ahd_dchspltstat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DCHSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sgspltstat0_print;
#else
#define ahd_sgspltstat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SGSPLTSTAT0", 0x9e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sgspltstat1_print;
#else
#define ahd_sgspltstat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SGSPLTSTAT1", 0x9f, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_df0pcistat_print;
#else
#define ahd_df0pcistat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DF0PCISTAT", 0xa0, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_reg0_print;
#else
#define ahd_reg0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "REG0", 0xa0, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_reg_isr_print;
#else
#define ahd_reg_isr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "REG_ISR", 0xa4, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sg_state_print;
#else
#define ahd_sg_state_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SG_STATE", 0xa6, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_targpcistat_print;
#else
#define ahd_targpcistat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "TARGPCISTAT", 0xa7, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scbautoptr_print;
#else
#define ahd_scbautoptr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCBAUTOPTR", 0xab, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbaddr_print;
#else
#define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CCSCBADDR", 0xac, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbctl_print;
#else
#define ahd_ccscbctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CCSCBCTL", 0xad, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccsgctl_print;
#else
#define ahd_ccsgctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CCSGCTL", 0xad, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ccscbram_print;
#else
#define ahd_ccscbram_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CCSCBRAM", 0xb0, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_brddat_print;
#else
#define ahd_brddat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "BRDDAT", 0xb8, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seeadr_print;
#else
#define ahd_seeadr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEEADR", 0xba, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seedat_print;
#else
#define ahd_seedat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEEDAT", 0xbc, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seectl_print;
#else
#define ahd_seectl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEECTL", 0xbe, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seestat_print;
#else
#define ahd_seestat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEESTAT", 0xbe, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dspdatactl_print;
#else
#define ahd_dspdatactl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DSPDATACTL", 0xc1, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dspselect_print;
#else
#define ahd_dspselect_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "DSPSELECT", 0xc4, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_wrtbiasctl_print;
#else
#define ahd_wrtbiasctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "WRTBIASCTL", 0xc5, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqctl0_print;
#else
#define ahd_seqctl0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQCTL0", 0xd6, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqintctl_print;
#else
#define ahd_seqintctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQINTCTL", 0xd9, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_prgmcnt_print;
#else
#define ahd_prgmcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "PRGMCNT", 0xde, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_none_print;
#else
#define ahd_none_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NONE", 0xea, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intvec1_addr_print;
#else
#define ahd_intvec1_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INTVEC1_ADDR", 0xf4, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_curaddr_print;
#else
#define ahd_curaddr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CURADDR", 0xf4, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intvec2_addr_print;
#else
#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INTVEC2_ADDR", 0xf6, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_longjmp_addr_print;
#else
#define ahd_longjmp_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LONGJMP_ADDR", 0xf8, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_accum_save_print;
#else
#define ahd_accum_save_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ACCUM_SAVE", 0xfa, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_waiting_scb_tails_print;
#else
#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sram_base_print;
#else
#define ahd_sram_base_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_waiting_tid_head_print;
#else
#define ahd_waiting_tid_head_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "WAITING_TID_HEAD", 0x120, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_waiting_tid_tail_print;
#else
#define ahd_waiting_tid_tail_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "WAITING_TID_TAIL", 0x122, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_next_queued_scb_addr_print;
#else
#define ahd_next_queued_scb_addr_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR", 0x124, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_scb_head_print;
#else
#define ahd_complete_scb_head_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD", 0x128, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_scb_dmainprog_head_print;
#else
#define ahd_complete_scb_dmainprog_head_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD", 0x12a, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_dma_scb_head_print;
#else
#define ahd_complete_dma_scb_head_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD", 0x12c, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_dma_scb_tail_print;
#else
#define ahd_complete_dma_scb_tail_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL", 0x12e, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_on_qfreeze_head_print;
#else
#define ahd_complete_on_qfreeze_head_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD", 0x130, regvalue, cur_col, wrap)
#endif
#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qfreeze_count_print;
#else
#define ahd_qfreeze_count_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "QFREEZE_COUNT", 0x132, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_kernel_qfreeze_count_print; ahd_reg_print_t ahd_selid_print;
#else #else
#define ahd_kernel_qfreeze_count_print(regvalue, cur_col, wrap) \ #define ahd_selid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT", 0x134, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SELID", 0x49, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_saved_mode_print; ahd_reg_print_t ahd_simode0_print;
#else #else
#define ahd_saved_mode_print(regvalue, cur_col, wrap) \ #define ahd_simode0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SAVED_MODE", 0x136, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SIMODE0", 0x4b, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_msg_out_print; ahd_reg_print_t ahd_sstat0_print;
#else #else
#define ahd_msg_out_print(regvalue, cur_col, wrap) \ #define ahd_sstat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MSG_OUT", 0x137, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SSTAT0", 0x4b, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seq_flags_print; ahd_reg_print_t ahd_sstat1_print;
#else #else
#define ahd_seq_flags_print(regvalue, cur_col, wrap) \ #define ahd_sstat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQ_FLAGS", 0x139, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SSTAT1", 0x4c, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lastphase_print; ahd_reg_print_t ahd_sstat2_print;
#else #else
#define ahd_lastphase_print(regvalue, cur_col, wrap) \ #define ahd_sstat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LASTPHASE", 0x13c, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SSTAT2", 0x4d, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qoutfifo_entry_valid_tag_print; ahd_reg_print_t ahd_perrdiag_print;
#else #else
#define ahd_qoutfifo_entry_valid_tag_print(regvalue, cur_col, wrap) \ #define ahd_perrdiag_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x13d, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "PERRDIAG", 0x4e, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_kernel_tqinpos_print; ahd_reg_print_t ahd_soffcnt_print;
#else #else
#define ahd_kernel_tqinpos_print(regvalue, cur_col, wrap) \ #define ahd_soffcnt_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "KERNEL_TQINPOS", 0x13e, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SOFFCNT", 0x4f, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qoutfifo_next_addr_print; ahd_reg_print_t ahd_lqistat0_print;
#else #else
#define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \ #define ahd_lqistat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x144, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LQISTAT0", 0x50, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_last_msg_print; ahd_reg_print_t ahd_lqistat1_print;
#else #else
#define ahd_last_msg_print(regvalue, cur_col, wrap) \ #define ahd_lqistat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LAST_MSG", 0x14a, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LQISTAT1", 0x51, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsiseq_template_print; ahd_reg_print_t ahd_lqistat2_print;
#else #else
#define ahd_scsiseq_template_print(regvalue, cur_col, wrap) \ #define ahd_lqistat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x14b, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LQISTAT2", 0x52, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_initiator_tag_print; ahd_reg_print_t ahd_sstat3_print;
#else #else
#define ahd_initiator_tag_print(regvalue, cur_col, wrap) \ #define ahd_sstat3_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INITIATOR_TAG", 0x14c, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SSTAT3", 0x53, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seq_flags2_print; ahd_reg_print_t ahd_lqostat0_print;
#else #else
#define ahd_seq_flags2_print(regvalue, cur_col, wrap) \ #define ahd_lqostat0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SEQ_FLAGS2", 0x14d, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LQOSTAT0", 0x54, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_allocfifo_scbptr_print; ahd_reg_print_t ahd_lqostat1_print;
#else #else
#define ahd_allocfifo_scbptr_print(regvalue, cur_col, wrap) \ #define ahd_lqostat1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR", 0x14e, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LQOSTAT1", 0x55, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_timer_print; ahd_reg_print_t ahd_lqostat2_print;
#else #else
#define ahd_int_coalescing_timer_print(regvalue, cur_col, wrap) \ #define ahd_lqostat2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INT_COALESCING_TIMER", 0x150, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LQOSTAT2", 0x56, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_maxcmds_print; ahd_reg_print_t ahd_simode1_print;
#else #else
#define ahd_int_coalescing_maxcmds_print(regvalue, cur_col, wrap) \ #define ahd_simode1_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS", 0x152, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SIMODE1", 0x57, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_mincmds_print; ahd_reg_print_t ahd_dffsxfrctl_print;
#else #else
#define ahd_int_coalescing_mincmds_print(regvalue, cur_col, wrap) \ #define ahd_dffsxfrctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS", 0x153, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "DFFSXFRCTL", 0x5a, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmds_pending_print; ahd_reg_print_t ahd_seqintsrc_print;
#else #else
#define ahd_cmds_pending_print(regvalue, cur_col, wrap) \ #define ahd_seqintsrc_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CMDS_PENDING", 0x154, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQINTSRC", 0x5b, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_cmdcount_print; ahd_reg_print_t ahd_seqimode_print;
#else #else
#define ahd_int_coalescing_cmdcount_print(regvalue, cur_col, wrap) \ #define ahd_seqimode_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT", 0x156, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQIMODE", 0x5c, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_local_hs_mailbox_print; ahd_reg_print_t ahd_mdffstat_print;
#else #else
#define ahd_local_hs_mailbox_print(regvalue, cur_col, wrap) \ #define ahd_mdffstat_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX", 0x157, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "MDFFSTAT", 0x5d, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmdsize_table_print; ahd_reg_print_t ahd_seloid_print;
#else #else
#define ahd_cmdsize_table_print(regvalue, cur_col, wrap) \ #define ahd_seloid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "CMDSIZE_TABLE", 0x158, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SELOID", 0x6b, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_mk_message_scb_print; ahd_reg_print_t ahd_sg_state_print;
#else #else
#define ahd_mk_message_scb_print(regvalue, cur_col, wrap) \ #define ahd_sg_state_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MK_MESSAGE_SCB", 0x160, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SG_STATE", 0xa6, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_mk_message_scsiid_print; ahd_reg_print_t ahd_ccscbctl_print;
#else #else
#define ahd_mk_message_scsiid_print(regvalue, cur_col, wrap) \ #define ahd_ccscbctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID", 0x162, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "CCSCBCTL", 0xad, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_base_print; ahd_reg_print_t ahd_ccsgctl_print;
#else #else
#define ahd_scb_base_print(regvalue, cur_col, wrap) \ #define ahd_ccsgctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_BASE", 0x180, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "CCSGCTL", 0xad, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_residual_datacnt_print; ahd_reg_print_t ahd_seqctl0_print;
#else #else
#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \ #define ahd_seqctl0_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQCTL0", 0xd6, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_sense_busaddr_print; ahd_reg_print_t ahd_seqintctl_print;
#else #else
#define ahd_scb_sense_busaddr_print(regvalue, cur_col, wrap) \ #define ahd_seqintctl_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR", 0x18c, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQINTCTL", 0xd9, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_tag_print; ahd_reg_print_t ahd_sram_base_print;
#else #else
#define ahd_scb_tag_print(regvalue, cur_col, wrap) \ #define ahd_sram_base_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_TAG", 0x190, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_control_print; ahd_reg_print_t ahd_qfreeze_count_print;
#else #else
#define ahd_scb_control_print(regvalue, cur_col, wrap) \ #define ahd_qfreeze_count_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_CONTROL", 0x192, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "QFREEZE_COUNT", 0x132, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_scsiid_print; ahd_reg_print_t ahd_kernel_qfreeze_count_print;
#else #else
#define ahd_scb_scsiid_print(regvalue, cur_col, wrap) \ #define ahd_kernel_qfreeze_count_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_SCSIID", 0x193, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT", 0x134, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_lun_print; ahd_reg_print_t ahd_saved_mode_print;
#else #else
#define ahd_scb_lun_print(regvalue, cur_col, wrap) \ #define ahd_saved_mode_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_LUN", 0x194, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SAVED_MODE", 0x136, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_task_attribute_print; ahd_reg_print_t ahd_seq_flags_print;
#else #else
#define ahd_scb_task_attribute_print(regvalue, cur_col, wrap) \ #define ahd_seq_flags_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_TASK_ATTRIBUTE", 0x195, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQ_FLAGS", 0x139, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_task_management_print; ahd_reg_print_t ahd_lastphase_print;
#else #else
#define ahd_scb_task_management_print(regvalue, cur_col, wrap) \ #define ahd_lastphase_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_TASK_MANAGEMENT", 0x197, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "LASTPHASE", 0x13c, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_dataptr_print; ahd_reg_print_t ahd_seq_flags2_print;
#else #else
#define ahd_scb_dataptr_print(regvalue, cur_col, wrap) \ #define ahd_seq_flags2_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_DATAPTR", 0x198, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SEQ_FLAGS2", 0x14d, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_datacnt_print; ahd_reg_print_t ahd_mk_message_scb_print;
#else #else
#define ahd_scb_datacnt_print(regvalue, cur_col, wrap) \ #define ahd_mk_message_scb_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_DATACNT", 0x1a0, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "MK_MESSAGE_SCB", 0x160, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_sgptr_print; ahd_reg_print_t ahd_mk_message_scsiid_print;
#else #else
#define ahd_scb_sgptr_print(regvalue, cur_col, wrap) \ #define ahd_mk_message_scsiid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_SGPTR", 0x1a4, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID", 0x162, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_busaddr_print; ahd_reg_print_t ahd_scb_base_print;
#else #else
#define ahd_scb_busaddr_print(regvalue, cur_col, wrap) \ #define ahd_scb_base_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_BUSADDR", 0x1a8, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SCB_BASE", 0x180, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_next2_print; ahd_reg_print_t ahd_scb_control_print;
#else #else
#define ahd_scb_next2_print(regvalue, cur_col, wrap) \ #define ahd_scb_control_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_NEXT2", 0x1ae, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SCB_CONTROL", 0x192, regvalue, cur_col, wrap)
#endif #endif
#if AIC_DEBUG_REGISTERS #if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_disconnected_lists_print; ahd_reg_print_t ahd_scb_scsiid_print;
#else #else
#define ahd_scb_disconnected_lists_print(regvalue, cur_col, wrap) \ #define ahd_scb_scsiid_print(regvalue, cur_col, wrap) \
ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS", 0x1b8, regvalue, cur_col, wrap) ahd_print_register(NULL, 0, "SCB_SCSIID", 0x193, regvalue, cur_col, wrap)
#endif #endif
...@@ -1292,15 +417,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1292,15 +417,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CLRCMDINT 0x02 #define CLRCMDINT 0x02
#define CLRSPLTINT 0x01 #define CLRSPLTINT 0x01
#define ERROR 0x04
#define CIOPARERR 0x80
#define CIOACCESFAIL 0x40
#define MPARERR 0x20
#define DPARERR 0x10
#define SQPARERR 0x08
#define ILLOPCODE 0x04
#define DSCTMOUT 0x02
#define CLRERR 0x04 #define CLRERR 0x04
#define CLRCIOPARERR 0x80 #define CLRCIOPARERR 0x80
#define CLRCIOACCESFAIL 0x40 #define CLRCIOACCESFAIL 0x40
...@@ -1310,6 +426,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1310,6 +426,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CLRILLOPCODE 0x04 #define CLRILLOPCODE 0x04
#define CLRDSCTMOUT 0x02 #define CLRDSCTMOUT 0x02
#define ERROR 0x04
#define CIOPARERR 0x80
#define CIOACCESFAIL 0x40
#define MPARERR 0x20
#define DPARERR 0x10
#define SQPARERR 0x08
#define ILLOPCODE 0x04
#define DSCTMOUT 0x02
#define HCNTRL 0x05 #define HCNTRL 0x05
#define SEQ_RESET 0x80 #define SEQ_RESET 0x80
#define POWRDN 0x40 #define POWRDN 0x40
...@@ -1404,22 +529,22 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1404,22 +529,22 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define FIFOFULL 0x02 #define FIFOFULL 0x02
#define FIFOEMP 0x01 #define FIFOEMP 0x01
#define SG_CACHE_SHADOW 0x1b
#define ODD_SEG 0x04
#define LAST_SEG 0x02
#define LAST_SEG_DONE 0x01
#define ARBCTL 0x1b #define ARBCTL 0x1b
#define RESET_HARB 0x80 #define RESET_HARB 0x80
#define RETRY_SWEN 0x08 #define RETRY_SWEN 0x08
#define USE_TIME 0x07 #define USE_TIME 0x07
#define SG_CACHE_PRE 0x1b #define SG_CACHE_SHADOW 0x1b
#define ODD_SEG 0x04
#define LAST_SEG 0x02
#define LAST_SEG_DONE 0x01
#define LQIN 0x20 #define SG_CACHE_PRE 0x1b
#define TYPEPTR 0x20 #define TYPEPTR 0x20
#define LQIN 0x20
#define TAGPTR 0x21 #define TAGPTR 0x21
#define LUNPTR 0x22 #define LUNPTR 0x22
...@@ -1479,14 +604,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1479,14 +604,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SINGLECMD 0x02 #define SINGLECMD 0x02
#define ABORTPENDING 0x01 #define ABORTPENDING 0x01
#define SCSBIST0 0x39
#define GSBISTERR 0x40
#define GSBISTDONE 0x20
#define GSBISTRUN 0x10
#define OSBISTERR 0x04
#define OSBISTDONE 0x02
#define OSBISTRUN 0x01
#define LQCTL2 0x39 #define LQCTL2 0x39
#define LQIRETRY 0x80 #define LQIRETRY 0x80
#define LQICONTINUE 0x40 #define LQICONTINUE 0x40
...@@ -1497,10 +614,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1497,10 +614,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQOTOIDLE 0x02 #define LQOTOIDLE 0x02
#define LQOPAUSE 0x01 #define LQOPAUSE 0x01
#define SCSBIST1 0x3a #define SCSBIST0 0x39
#define NTBISTERR 0x04 #define GSBISTERR 0x40
#define NTBISTDONE 0x02 #define GSBISTDONE 0x20
#define NTBISTRUN 0x01 #define GSBISTRUN 0x10
#define OSBISTERR 0x04
#define OSBISTDONE 0x02
#define OSBISTRUN 0x01
#define SCSISEQ0 0x3a #define SCSISEQ0 0x3a
#define TEMODEO 0x80 #define TEMODEO 0x80
...@@ -1509,8 +629,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1509,8 +629,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define FORCEBUSFREE 0x10 #define FORCEBUSFREE 0x10
#define SCSIRSTO 0x01 #define SCSIRSTO 0x01
#define SCSBIST1 0x3a
#define NTBISTERR 0x04
#define NTBISTDONE 0x02
#define NTBISTRUN 0x01
#define SCSISEQ1 0x3b #define SCSISEQ1 0x3b
#define BUSINITID 0x3c
#define SXFRCTL0 0x3c #define SXFRCTL0 0x3c
#define DFON 0x80 #define DFON 0x80
#define DFPEXP 0x40 #define DFPEXP 0x40
...@@ -1519,8 +646,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1519,8 +646,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DLCOUNT 0x3c #define DLCOUNT 0x3c
#define BUSINITID 0x3c
#define SXFRCTL1 0x3d #define SXFRCTL1 0x3d
#define BITBUCKET 0x80 #define BITBUCKET 0x80
#define ENSACHK 0x40 #define ENSACHK 0x40
...@@ -1545,6 +670,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1545,6 +670,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CURRFIFO_1 0x01 #define CURRFIFO_1 0x01
#define CURRFIFO_0 0x00 #define CURRFIFO_0 0x00
#define MULTARGID 0x40
#define SCSISIGO 0x40 #define SCSISIGO 0x40
#define CDO 0x80 #define CDO 0x80
#define IOO 0x40 #define IOO 0x40
...@@ -1555,8 +682,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1555,8 +682,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define REQO 0x02 #define REQO 0x02
#define ACKO 0x01 #define ACKO 0x01
#define MULTARGID 0x40
#define SCSISIGI 0x41 #define SCSISIGI 0x41
#define ATNI 0x10 #define ATNI 0x10
#define SELI 0x08 #define SELI 0x08
...@@ -1603,14 +728,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1603,14 +728,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENAB20 0x04 #define ENAB20 0x04
#define SELWIDE 0x02 #define SELWIDE 0x02
#define CLRSINT0 0x4b #define SIMODE0 0x4b
#define CLRSELDO 0x40 #define ENSELDO 0x40
#define CLRSELDI 0x20 #define ENSELDI 0x20
#define CLRSELINGO 0x10 #define ENSELINGO 0x10
#define CLRIOERR 0x08 #define ENIOERR 0x08
#define CLROVERRUN 0x04 #define ENOVERRUN 0x04
#define CLRSPIORDY 0x02 #define ENSPIORDY 0x02
#define CLRARBDO 0x01 #define ENARBDO 0x01
#define SSTAT0 0x4b #define SSTAT0 0x4b
#define TARGET 0x80 #define TARGET 0x80
...@@ -1622,23 +747,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1622,23 +747,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SPIORDY 0x02 #define SPIORDY 0x02
#define ARBDO 0x01 #define ARBDO 0x01
#define SIMODE0 0x4b #define CLRSINT0 0x4b
#define ENSELDO 0x40 #define CLRSELDO 0x40
#define ENSELDI 0x20 #define CLRSELDI 0x20
#define ENSELINGO 0x10 #define CLRSELINGO 0x10
#define ENIOERR 0x08 #define CLRIOERR 0x08
#define ENOVERRUN 0x04 #define CLROVERRUN 0x04
#define ENSPIORDY 0x02 #define CLRSPIORDY 0x02
#define ENARBDO 0x01 #define CLRARBDO 0x01
#define CLRSINT1 0x4c
#define CLRSELTIMEO 0x80
#define CLRATNO 0x40
#define CLRSCSIRSTI 0x20
#define CLRBUSFREE 0x08
#define CLRSCSIPERR 0x04
#define CLRSTRB2FAST 0x02
#define CLRREQINIT 0x01
#define SSTAT1 0x4c #define SSTAT1 0x4c
#define SELTO 0x80 #define SELTO 0x80
...@@ -1650,6 +766,20 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1650,6 +766,20 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define STRB2FAST 0x02 #define STRB2FAST 0x02
#define REQINIT 0x01 #define REQINIT 0x01
#define CLRSINT1 0x4c
#define CLRSELTIMEO 0x80
#define CLRATNO 0x40
#define CLRSCSIRSTI 0x20
#define CLRBUSFREE 0x08
#define CLRSCSIPERR 0x04
#define CLRSTRB2FAST 0x02
#define CLRREQINIT 0x01
#define SIMODE2 0x4d
#define ENWIDE_RES 0x04
#define ENSDONE 0x02
#define ENDMADONE 0x01
#define SSTAT2 0x4d #define SSTAT2 0x4d
#define BUSFREETIME 0xc0 #define BUSFREETIME 0xc0
#define NONPACKREQ 0x20 #define NONPACKREQ 0x20
...@@ -1662,11 +792,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1662,11 +792,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define BUSFREE_DFF0 0x80 #define BUSFREE_DFF0 0x80
#define BUSFREE_LQO 0x40 #define BUSFREE_LQO 0x40
#define SIMODE2 0x4d
#define ENWIDE_RES 0x04
#define ENSDONE 0x02
#define ENDMADONE 0x01
#define CLRSINT2 0x4d #define CLRSINT2 0x4d
#define CLRNONPACKREQ 0x20 #define CLRNONPACKREQ 0x20
#define CLRWIDE_RES 0x04 #define CLRWIDE_RES 0x04
...@@ -1685,10 +810,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1685,10 +810,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQISTATE 0x4e #define LQISTATE 0x4e
#define SOFFCNT 0x4f
#define LQOSTATE 0x4f #define LQOSTATE 0x4f
#define SOFFCNT 0x4f
#define LQISTAT0 0x50 #define LQISTAT0 0x50
#define LQIATNQAS 0x20 #define LQIATNQAS 0x20
#define LQICRCT1 0x10 #define LQICRCT1 0x10
...@@ -1697,14 +822,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1697,14 +822,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQIATNLQ 0x02 #define LQIATNLQ 0x02
#define LQIATNCMD 0x01 #define LQIATNCMD 0x01
#define CLRLQIINT0 0x50
#define CLRLQIATNQAS 0x20
#define CLRLQICRCT1 0x10
#define CLRLQICRCT2 0x08
#define CLRLQIBADLQT 0x04
#define CLRLQIATNLQ 0x02
#define CLRLQIATNCMD 0x01
#define LQIMODE0 0x50 #define LQIMODE0 0x50
#define ENLQIATNQASK 0x20 #define ENLQIATNQASK 0x20
#define ENLQICRCT1 0x10 #define ENLQICRCT1 0x10
...@@ -1713,6 +830,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1713,6 +830,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENLQIATNLQ 0x02 #define ENLQIATNLQ 0x02
#define ENLQIATNCMD 0x01 #define ENLQIATNCMD 0x01
#define CLRLQIINT0 0x50
#define CLRLQIATNQAS 0x20
#define CLRLQICRCT1 0x10
#define CLRLQICRCT2 0x08
#define CLRLQIBADLQT 0x04
#define CLRLQIATNLQ 0x02
#define CLRLQIATNCMD 0x01
#define LQIMODE1 0x51 #define LQIMODE1 0x51
#define ENLQIPHASE_LQ 0x80 #define ENLQIPHASE_LQ 0x80
#define ENLQIPHASE_NLQ 0x40 #define ENLQIPHASE_NLQ 0x40
...@@ -1753,25 +878,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1753,25 +878,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define LQISTOPCMD 0x02 #define LQISTOPCMD 0x02
#define LQIGSAVAIL 0x01 #define LQIGSAVAIL 0x01
#define SSTAT3 0x53
#define NTRAMPERR 0x02
#define OSRAMPERR 0x01
#define SIMODE3 0x53 #define SIMODE3 0x53
#define ENNTRAMPERR 0x02 #define ENNTRAMPERR 0x02
#define ENOSRAMPERR 0x01 #define ENOSRAMPERR 0x01
#define SSTAT3 0x53
#define NTRAMPERR 0x02
#define OSRAMPERR 0x01
#define CLRSINT3 0x53 #define CLRSINT3 0x53
#define CLRNTRAMPERR 0x02 #define CLRNTRAMPERR 0x02
#define CLROSRAMPERR 0x01 #define CLROSRAMPERR 0x01
#define LQOSTAT0 0x54
#define LQOTARGSCBPERR 0x10
#define LQOSTOPT2 0x08
#define LQOATNLQ 0x04
#define LQOATNPKT 0x02
#define LQOTCRC 0x01
#define CLRLQOINT0 0x54 #define CLRLQOINT0 0x54
#define CLRLQOTARGSCBPERR 0x10 #define CLRLQOTARGSCBPERR 0x10
#define CLRLQOSTOPT2 0x08 #define CLRLQOSTOPT2 0x08
...@@ -1779,6 +897,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1779,6 +897,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CLRLQOATNPKT 0x02 #define CLRLQOATNPKT 0x02
#define CLRLQOTCRC 0x01 #define CLRLQOTCRC 0x01
#define LQOSTAT0 0x54
#define LQOTARGSCBPERR 0x10
#define LQOSTOPT2 0x08
#define LQOATNLQ 0x04
#define LQOATNPKT 0x02
#define LQOTCRC 0x01
#define LQOMODE0 0x54 #define LQOMODE0 0x54
#define ENLQOTARGSCBPERR 0x10 #define ENLQOTARGSCBPERR 0x10
#define ENLQOSTOPT2 0x08 #define ENLQOSTOPT2 0x08
...@@ -1793,13 +918,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1793,13 +918,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENLQOBUSFREE 0x02 #define ENLQOBUSFREE 0x02
#define ENLQOPHACHGINPKT 0x01 #define ENLQOPHACHGINPKT 0x01
#define LQOSTAT1 0x55
#define LQOINITSCBPERR 0x10
#define LQOSTOPI2 0x08
#define LQOBADQAS 0x04
#define LQOBUSFREE 0x02
#define LQOPHACHGINPKT 0x01
#define CLRLQOINT1 0x55 #define CLRLQOINT1 0x55
#define CLRLQOINITSCBPERR 0x10 #define CLRLQOINITSCBPERR 0x10
#define CLRLQOSTOPI2 0x08 #define CLRLQOSTOPI2 0x08
...@@ -1807,6 +925,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1807,6 +925,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CLRLQOBUSFREE 0x02 #define CLRLQOBUSFREE 0x02
#define CLRLQOPHACHGINPKT 0x01 #define CLRLQOPHACHGINPKT 0x01
#define LQOSTAT1 0x55
#define LQOINITSCBPERR 0x10
#define LQOSTOPI2 0x08
#define LQOBADQAS 0x04
#define LQOBUSFREE 0x02
#define LQOPHACHGINPKT 0x01
#define LQOSTAT2 0x56 #define LQOSTAT2 0x56
#define LQOPKT 0xe0 #define LQOPKT 0xe0
#define LQOWAITFIFO 0x10 #define LQOWAITFIFO 0x10
...@@ -1859,8 +984,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1859,8 +984,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CFG4ICMD 0x02 #define CFG4ICMD 0x02
#define CFG4TCMD 0x01 #define CFG4TCMD 0x01
#define CURRSCB 0x5c
#define SEQIMODE 0x5c #define SEQIMODE 0x5c
#define ENCTXTDONE 0x40 #define ENCTXTDONE 0x40
#define ENSAVEPTRS 0x20 #define ENSAVEPTRS 0x20
...@@ -1870,6 +993,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1870,6 +993,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ENCFG4ICMD 0x02 #define ENCFG4ICMD 0x02
#define ENCFG4TCMD 0x01 #define ENCFG4TCMD 0x01
#define CURRSCB 0x5c
#define CRCCONTROL 0x5d
#define CRCVALCHKEN 0x40
#define MDFFSTAT 0x5d #define MDFFSTAT 0x5d
#define SHCNTNEGATIVE 0x40 #define SHCNTNEGATIVE 0x40
#define SHCNTMINUS1 0x20 #define SHCNTMINUS1 0x20
...@@ -1879,34 +1007,31 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1879,34 +1007,31 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DATAINFIFO 0x02 #define DATAINFIFO 0x02
#define FIFOFREE 0x01 #define FIFOFREE 0x01
#define CRCCONTROL 0x5d
#define CRCVALCHKEN 0x40
#define DFFTAG 0x5e #define DFFTAG 0x5e
#define LASTSCB 0x5e
#define SCSITEST 0x5e #define SCSITEST 0x5e
#define CNTRTEST 0x08 #define CNTRTEST 0x08
#define SEL_TXPLL_DEBUG 0x04 #define SEL_TXPLL_DEBUG 0x04
#define LASTSCB 0x5e
#define IOPDNCTL 0x5f #define IOPDNCTL 0x5f
#define DISABLE_OE 0x80 #define DISABLE_OE 0x80
#define PDN_IDIST 0x04 #define PDN_IDIST 0x04
#define PDN_DIFFSENSE 0x01 #define PDN_DIFFSENSE 0x01
#define SHADDR 0x60 #define DGRPCRCI 0x60
#define NEGOADDR 0x60 #define NEGOADDR 0x60
#define DGRPCRCI 0x60 #define SHADDR 0x60
#define NEGPERIOD 0x61 #define NEGPERIOD 0x61
#define PACKCRCI 0x62
#define NEGOFFSET 0x62 #define NEGOFFSET 0x62
#define PACKCRCI 0x62
#define NEGPPROPTS 0x63 #define NEGPPROPTS 0x63
#define PPROPT_PACE 0x08 #define PPROPT_PACE 0x08
#define PPROPT_QAS 0x04 #define PPROPT_QAS 0x04
...@@ -1942,16 +1067,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1942,16 +1067,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SHCNT 0x68 #define SHCNT 0x68
#define TOWNID 0x69
#define PLL960CTL1 0x69 #define PLL960CTL1 0x69
#define TOWNID 0x69
#define PLL960CNT0 0x6a #define PLL960CNT0 0x6a
#define XSIG 0x6a #define XSIG 0x6a
#define SELOID 0x6b #define SELOID 0x6b
#define FAIRNESS 0x6c
#define PLL400CTL0 0x6c #define PLL400CTL0 0x6c
#define PLL_VCOSEL 0x80 #define PLL_VCOSEL 0x80
#define PLL_PWDN 0x40 #define PLL_PWDN 0x40
...@@ -1961,8 +1088,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1961,8 +1088,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define PLL_DLPF 0x02 #define PLL_DLPF 0x02
#define PLL_ENFBM 0x01 #define PLL_ENFBM 0x01
#define FAIRNESS 0x6c
#define PLL400CTL1 0x6d #define PLL400CTL1 0x6d
#define PLL_CNTEN 0x80 #define PLL_CNTEN 0x80
#define PLL_CNTCLR 0x40 #define PLL_CNTCLR 0x40
...@@ -1974,25 +1099,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -1974,25 +1099,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define HADDR 0x70 #define HADDR 0x70
#define HODMAADR 0x70
#define PLLDELAY 0x70 #define PLLDELAY 0x70
#define SPLIT_DROP_REQ 0x80 #define SPLIT_DROP_REQ 0x80
#define HODMAADR 0x70 #define HCNT 0x78
#define HODMACNT 0x78 #define HODMACNT 0x78
#define HCNT 0x78
#define HODMAEN 0x7a #define HODMAEN 0x7a
#define SCBHADDR 0x7c
#define SGHADDR 0x7c #define SGHADDR 0x7c
#define SCBHCNT 0x84 #define SCBHADDR 0x7c
#define SGHCNT 0x84 #define SGHCNT 0x84
#define SCBHCNT 0x84
#define DFF_THRSH 0x88 #define DFF_THRSH 0x88
#define WR_DFTHRSH 0x70 #define WR_DFTHRSH 0x70
#define RD_DFTHRSH 0x07 #define RD_DFTHRSH 0x07
...@@ -2025,6 +1150,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2025,6 +1150,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CMCRXMSG0 0x90 #define CMCRXMSG0 0x90
#define OVLYRXMSG0 0x90
#define DCHRXMSG0 0x90
#define ROENABLE 0x90 #define ROENABLE 0x90
#define MSIROEN 0x20 #define MSIROEN 0x20
#define OVLYROEN 0x10 #define OVLYROEN 0x10
...@@ -2033,11 +1162,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2033,11 +1162,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DCH1ROEN 0x02 #define DCH1ROEN 0x02
#define DCH0ROEN 0x01 #define DCH0ROEN 0x01
#define OVLYRXMSG0 0x90 #define OVLYRXMSG1 0x91
#define DCHRXMSG0 0x90 #define CMCRXMSG1 0x91
#define OVLYRXMSG1 0x91 #define DCHRXMSG1 0x91
#define NSENABLE 0x91 #define NSENABLE 0x91
#define MSINSEN 0x20 #define MSINSEN 0x20
...@@ -2047,10 +1176,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2047,10 +1176,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define DCH1NSEN 0x02 #define DCH1NSEN 0x02
#define DCH0NSEN 0x01 #define DCH0NSEN 0x01
#define CMCRXMSG1 0x91
#define DCHRXMSG1 0x91
#define DCHRXMSG2 0x92 #define DCHRXMSG2 0x92
#define CMCRXMSG2 0x92 #define CMCRXMSG2 0x92
...@@ -2074,24 +1199,24 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2074,24 +1199,24 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define TSCSERREN 0x02 #define TSCSERREN 0x02
#define CMPABCDIS 0x01 #define CMPABCDIS 0x01
#define CMCSEQBCNT 0x94
#define OVLYSEQBCNT 0x94 #define OVLYSEQBCNT 0x94
#define DCHSEQBCNT 0x94 #define DCHSEQBCNT 0x94
#define CMCSEQBCNT 0x94
#define CMCSPLTSTAT0 0x96
#define DCHSPLTSTAT0 0x96 #define DCHSPLTSTAT0 0x96
#define OVLYSPLTSTAT0 0x96 #define OVLYSPLTSTAT0 0x96
#define CMCSPLTSTAT1 0x97 #define CMCSPLTSTAT0 0x96
#define OVLYSPLTSTAT1 0x97 #define OVLYSPLTSTAT1 0x97
#define DCHSPLTSTAT1 0x97 #define DCHSPLTSTAT1 0x97
#define CMCSPLTSTAT1 0x97
#define SGRXMSG0 0x98 #define SGRXMSG0 0x98
#define CDNUM 0xf8 #define CDNUM 0xf8
#define CFNUM 0x07 #define CFNUM 0x07
...@@ -2119,18 +1244,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2119,18 +1244,15 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define TAG_NUM 0x1f #define TAG_NUM 0x1f
#define RLXORD 0x10 #define RLXORD 0x10
#define SGSEQBCNT 0x9c
#define SLVSPLTOUTATTR0 0x9c #define SLVSPLTOUTATTR0 0x9c
#define LOWER_BCNT 0xff #define LOWER_BCNT 0xff
#define SGSEQBCNT 0x9c
#define SLVSPLTOUTATTR1 0x9d #define SLVSPLTOUTATTR1 0x9d
#define CMPLT_DNUM 0xf8 #define CMPLT_DNUM 0xf8
#define CMPLT_FNUM 0x07 #define CMPLT_FNUM 0x07
#define SLVSPLTOUTATTR2 0x9e
#define CMPLT_BNUM 0xff
#define SGSPLTSTAT0 0x9e #define SGSPLTSTAT0 0x9e
#define STAETERM 0x80 #define STAETERM 0x80
#define SCBCERR 0x40 #define SCBCERR 0x40
...@@ -2141,6 +1263,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2141,6 +1263,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define RXSCEMSG 0x02 #define RXSCEMSG 0x02
#define RXSPLTRSP 0x01 #define RXSPLTRSP 0x01
#define SLVSPLTOUTATTR2 0x9e
#define CMPLT_BNUM 0xff
#define SGSPLTSTAT1 0x9f #define SGSPLTSTAT1 0x9f
#define RXDATABUCKET 0x01 #define RXDATABUCKET 0x01
...@@ -2177,14 +1302,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2177,14 +1302,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CLRPENDMSI 0x08 #define CLRPENDMSI 0x08
#define DPR 0x01 #define DPR 0x01
#define DATA_COUNT_ODD 0xa7
#define TARGPCISTAT 0xa7 #define TARGPCISTAT 0xa7
#define DPE 0x80 #define DPE 0x80
#define SSE 0x40 #define SSE 0x40
#define STA 0x08 #define STA 0x08
#define TWATERR 0x02 #define TWATERR 0x02
#define DATA_COUNT_ODD 0xa7
#define SCBPTR 0xa8 #define SCBPTR 0xa8
#define CCSCBACNT 0xab #define CCSCBACNT 0xab
...@@ -2196,10 +1321,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2196,10 +1321,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define CCSGADDR 0xac #define CCSGADDR 0xac
#define CCSCBADR_BK 0xac
#define CCSCBADDR 0xac #define CCSCBADDR 0xac
#define CCSCBADR_BK 0xac
#define CMC_RAMBIST 0xad #define CMC_RAMBIST 0xad
#define SG_ELEMENT_SIZE 0x80 #define SG_ELEMENT_SIZE 0x80
#define SCBRAMBIST_FAIL 0x40 #define SCBRAMBIST_FAIL 0x40
...@@ -2253,9 +1378,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2253,9 +1378,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SEEDAT 0xbc #define SEEDAT 0xbc
#define SEECTL 0xbe #define SEECTL 0xbe
#define SEEOP_EWDS 0x40
#define SEEOP_WALL 0x40 #define SEEOP_WALL 0x40
#define SEEOP_EWEN 0x40 #define SEEOP_EWEN 0x40
#define SEEOP_EWDS 0x40
#define SEEOPCODE 0x70 #define SEEOPCODE 0x70
#define SEERST 0x02 #define SEERST 0x02
#define SEESTART 0x01 #define SEESTART 0x01
...@@ -2272,25 +1397,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2272,25 +1397,25 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SCBCNT 0xbf #define SCBCNT 0xbf
#define DFWADDR 0xc0
#define DSPFLTRCTL 0xc0 #define DSPFLTRCTL 0xc0
#define FLTRDISABLE 0x20 #define FLTRDISABLE 0x20
#define EDGESENSE 0x10 #define EDGESENSE 0x10
#define DSPFCNTSEL 0x0f #define DSPFCNTSEL 0x0f
#define DFWADDR 0xc0
#define DSPDATACTL 0xc1 #define DSPDATACTL 0xc1
#define BYPASSENAB 0x80 #define BYPASSENAB 0x80
#define DESQDIS 0x10 #define DESQDIS 0x10
#define RCVROFFSTDIS 0x04 #define RCVROFFSTDIS 0x04
#define XMITOFFSTDIS 0x02 #define XMITOFFSTDIS 0x02
#define DFRADDR 0xc2
#define DSPREQCTL 0xc2 #define DSPREQCTL 0xc2
#define MANREQCTL 0xc0 #define MANREQCTL 0xc0
#define MANREQDLY 0x3f #define MANREQDLY 0x3f
#define DFRADDR 0xc2
#define DSPACKCTL 0xc3 #define DSPACKCTL 0xc3
#define MANACKCTL 0xc0 #define MANACKCTL 0xc0
#define MANACKDLY 0x3f #define MANACKDLY 0x3f
...@@ -2311,14 +1436,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2311,14 +1436,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define WRTBIASCALC 0xc7 #define WRTBIASCALC 0xc7
#define RCVRBIASCALC 0xc8
#define DFPTRS 0xc8 #define DFPTRS 0xc8
#define SKEWCALC 0xc9 #define RCVRBIASCALC 0xc8
#define DFBKPTR 0xc9 #define DFBKPTR 0xc9
#define SKEWCALC 0xc9
#define DFDBCTL 0xcb #define DFDBCTL 0xcb
#define DFF_CIO_WR_RDY 0x20 #define DFF_CIO_WR_RDY 0x20
#define DFF_CIO_RD_RDY 0x10 #define DFF_CIO_RD_RDY 0x10
...@@ -2403,12 +1528,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2403,12 +1528,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define ACCUM_SAVE 0xfa #define ACCUM_SAVE 0xfa
#define WAITING_SCB_TAILS 0x100
#define AHD_PCI_CONFIG_BASE 0x100 #define AHD_PCI_CONFIG_BASE 0x100
#define SRAM_BASE 0x100 #define SRAM_BASE 0x100
#define WAITING_SCB_TAILS 0x100
#define WAITING_TID_HEAD 0x120 #define WAITING_TID_HEAD 0x120
#define WAITING_TID_TAIL 0x122 #define WAITING_TID_TAIL 0x122
...@@ -2437,8 +1562,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2437,8 +1562,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define PRELOADEN 0x80 #define PRELOADEN 0x80
#define WIDEODD 0x40 #define WIDEODD 0x40
#define SCSIEN 0x20 #define SCSIEN 0x20
#define SDMAEN 0x10
#define SDMAENACK 0x10 #define SDMAENACK 0x10
#define SDMAEN 0x10
#define HDMAEN 0x08 #define HDMAEN 0x08
#define HDMAENACK 0x08 #define HDMAENACK 0x08
#define DIRECTION 0x04 #define DIRECTION 0x04
...@@ -2536,12 +1661,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2536,12 +1661,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define MK_MESSAGE_SCSIID 0x162 #define MK_MESSAGE_SCSIID 0x162
#define SCB_BASE 0x180
#define SCB_RESIDUAL_DATACNT 0x180 #define SCB_RESIDUAL_DATACNT 0x180
#define SCB_CDB_STORE 0x180 #define SCB_CDB_STORE 0x180
#define SCB_HOST_CDB_PTR 0x180 #define SCB_HOST_CDB_PTR 0x180
#define SCB_BASE 0x180
#define SCB_RESIDUAL_SGPTR 0x184 #define SCB_RESIDUAL_SGPTR 0x184
#define SG_ADDR_MASK 0xf8 #define SG_ADDR_MASK 0xf8
#define SG_OVERRUN_RESID 0x02 #define SG_OVERRUN_RESID 0x02
...@@ -2609,77 +1734,77 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print; ...@@ -2609,77 +1734,77 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
#define SCB_DISCONNECTED_LISTS 0x1b8 #define SCB_DISCONNECTED_LISTS 0x1b8
#define STIMESEL_SHIFT 0x03
#define STIMESEL_MIN 0x18
#define INVALID_ADDR 0x80
#define CMD_GROUP_CODE_SHIFT 0x05
#define AHD_PRECOMP_MASK 0x07
#define TARGET_DATA_IN 0x01
#define SEEOP_EWEN_ADDR 0xc0
#define NUMDSPS 0x14
#define DST_MODE_SHIFT 0x04
#define CCSCBADDR_MAX 0x80
#define AHD_ANNEXCOL_PER_DEV0 0x04
#define TARGET_CMD_CMPLT 0xfe
#define SEEOP_WRAL_ADDR 0x40
#define BUS_8_BIT 0x00
#define AHD_TIMER_MAX_US 0x18ffe7 #define AHD_TIMER_MAX_US 0x18ffe7
#define AHD_TIMER_MAX_TICKS 0xffff #define AHD_TIMER_MAX_TICKS 0xffff
#define AHD_SENSE_BUFSIZE 0x100 #define AHD_SENSE_BUFSIZE 0x100
#define BUS_8_BIT 0x00
#define TARGET_CMD_CMPLT 0xfe
#define SEEOP_WRAL_ADDR 0x40
#define AHD_AMPLITUDE_DEF 0x07
#define AHD_PRECOMP_CUTBACK_37 0x07
#define AHD_PRECOMP_SHIFT 0x00 #define AHD_PRECOMP_SHIFT 0x00
#define AHD_PRECOMP_CUTBACK_37 0x07
#define AHD_ANNEXCOL_PRECOMP_SLEW 0x04 #define AHD_ANNEXCOL_PRECOMP_SLEW 0x04
#define AHD_TIMER_US_PER_TICK 0x19 #define AHD_AMPLITUDE_DEF 0x07
#define SCB_TRANSFER_SIZE_FULL_LUN 0x38 #define WRTBIASCTL_HP_DEFAULT 0x00
#define TID_SHIFT 0x04
#define STATUS_QUEUE_FULL 0x28 #define STATUS_QUEUE_FULL 0x28
#define STATUS_BUSY 0x08 #define STATUS_BUSY 0x08
#define MAX_OFFSET_NON_PACED 0x7f #define SEEOP_EWDS_ADDR 0x00
#define SCB_TRANSFER_SIZE_FULL_LUN 0x38
#define MK_MESSAGE_BIT_OFFSET 0x04
#define MAX_OFFSET_PACED 0xfe #define MAX_OFFSET_PACED 0xfe
#define BUS_32_BIT 0x02 #define MAX_OFFSET_NON_PACED 0x7f
#define LUNLEN_SINGLE_LEVEL_LUN 0x0f
#define CCSGADDR_MAX 0x80 #define CCSGADDR_MAX 0x80
#define TID_SHIFT 0x04 #define B_CURRFIFO_0 0x02
#define MK_MESSAGE_BIT_OFFSET 0x04 #define BUS_32_BIT 0x02
#define WRTBIASCTL_HP_DEFAULT 0x00 #define AHD_TIMER_US_PER_TICK 0x19
#define SEEOP_EWDS_ADDR 0x00
#define AHD_AMPLITUDE_SHIFT 0x00
#define AHD_AMPLITUDE_MASK 0x07
#define AHD_ANNEXCOL_AMPLITUDE 0x06
#define AHD_SLEWRATE_DEF_REVA 0x08
#define AHD_SLEWRATE_SHIFT 0x03 #define AHD_SLEWRATE_SHIFT 0x03
#define AHD_SLEWRATE_MASK 0x78 #define AHD_SLEWRATE_MASK 0x78
#define AHD_SLEWRATE_DEF_REVA 0x08
#define AHD_PRECOMP_CUTBACK_29 0x06 #define AHD_PRECOMP_CUTBACK_29 0x06
#define AHD_NUM_PER_DEV_ANNEXCOLS 0x04 #define AHD_NUM_PER_DEV_ANNEXCOLS 0x04
#define B_CURRFIFO_0 0x02 #define AHD_ANNEXCOL_AMPLITUDE 0x06
#define LUNLEN_SINGLE_LEVEL_LUN 0x0f #define AHD_AMPLITUDE_SHIFT 0x00
#define NVRAM_SCB_OFFSET 0x2c #define AHD_AMPLITUDE_MASK 0x07
#define STIMESEL_BUG_ADJ 0x08
#define STATUS_PKT_SENSE 0xff #define STATUS_PKT_SENSE 0xff
#define CMD_GROUP_CODE_SHIFT 0x05 #define SRC_MODE_SHIFT 0x00
#define SEEOP_ERAL_ADDR 0x80
#define NVRAM_SCB_OFFSET 0x2c
#define MAX_OFFSET_PACED_BUG 0x7f #define MAX_OFFSET_PACED_BUG 0x7f
#define STIMESEL_BUG_ADJ 0x08
#define STIMESEL_MIN 0x18
#define STIMESEL_SHIFT 0x03
#define CCSGRAM_MAXSEGS 0x10 #define CCSGRAM_MAXSEGS 0x10
#define INVALID_ADDR 0x80
#define SEEOP_ERAL_ADDR 0x80
#define AHD_SLEWRATE_DEF_REVB 0x08 #define AHD_SLEWRATE_DEF_REVB 0x08
#define AHD_PRECOMP_CUTBACK_17 0x04 #define AHD_PRECOMP_CUTBACK_17 0x04
#define AHD_PRECOMP_MASK 0x07
#define SRC_MODE_SHIFT 0x00
#define PKT_OVERRUN_BUFSIZE 0x200
#define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30 #define SCB_TRANSFER_SIZE_1BYTE_LUN 0x30
#define TARGET_DATA_IN 0x01 #define PKT_OVERRUN_BUFSIZE 0x200
#define HOST_MSG 0xff
#define MAX_OFFSET 0xfe #define MAX_OFFSET 0xfe
#define HOST_MSG 0xff
#define BUS_16_BIT 0x01 #define BUS_16_BIT 0x01
#define CCSCBADDR_MAX 0x80
#define NUMDSPS 0x14
#define SEEOP_EWEN_ADDR 0xc0
#define AHD_ANNEXCOL_PER_DEV0 0x04
#define DST_MODE_SHIFT 0x04
/* Downloaded Constant Definitions */ /* Downloaded Constant Definitions */
#define SG_SIZEOF 0x04
#define SG_PREFETCH_ALIGN_MASK 0x02
#define SG_PREFETCH_CNT_LIMIT 0x01
#define CACHELINE_MASK 0x07 #define CACHELINE_MASK 0x07
#define SCB_TRANSFER_SIZE 0x06 #define SCB_TRANSFER_SIZE 0x06
#define PKT_OVERRUN_BUFOFFSET 0x05 #define PKT_OVERRUN_BUFOFFSET 0x05
#define SG_SIZEOF 0x04
#define SG_PREFETCH_ADDR_MASK 0x03 #define SG_PREFETCH_ADDR_MASK 0x03
#define SG_PREFETCH_ALIGN_MASK 0x02
#define SG_PREFETCH_CNT_LIMIT 0x01
#define SG_PREFETCH_CNT 0x00 #define SG_PREFETCH_CNT 0x00
#define DOWNLOAD_CONST_COUNT 0x08 #define DOWNLOAD_CONST_COUNT 0x08
/* Exported Labels */ /* Exported Labels */
#define LABEL_seq_isr 0x28f
#define LABEL_timer_isr 0x28b #define LABEL_timer_isr 0x28b
#define LABEL_seq_isr 0x28f
drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
View file @ 2ae203fa
...@@ -234,6 +234,23 @@ ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -234,6 +234,23 @@ ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x49, regvalue, cur_col, wrap)); 0x49, regvalue, cur_col, wrap));
} }
static const ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENARBDO", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENOVERRUN", 0x04, 0x04 },
{ "ENIOERR", 0x08, 0x08 },
{ "ENSELINGO", 0x10, 0x10 },
{ "ENSELDI", 0x20, 0x20 },
{ "ENSELDO", 0x40, 0x40 }
};
int
ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
0x4b, regvalue, cur_col, wrap));
}
static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = { static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
{ "ARBDO", 0x01, 0x01 }, { "ARBDO", 0x01, 0x01 },
{ "SPIORDY", 0x02, 0x02 }, { "SPIORDY", 0x02, 0x02 },
...@@ -252,23 +269,6 @@ ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap) ...@@ -252,23 +269,6 @@ ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0x4b, regvalue, cur_col, wrap)); 0x4b, regvalue, cur_col, wrap));
} }
static const ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
{ "ENARBDO", 0x01, 0x01 },
{ "ENSPIORDY", 0x02, 0x02 },
{ "ENOVERRUN", 0x04, 0x04 },
{ "ENIOERR", 0x08, 0x08 },
{ "ENSELINGO", 0x10, 0x10 },
{ "ENSELDI", 0x20, 0x20 },
{ "ENSELDO", 0x40, 0x40 }
};
int
ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
{
return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
0x4b, regvalue, cur_col, wrap));
}
static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = { static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
{ "REQINIT", 0x01, 0x01 }, { "REQINIT", 0x01, 0x01 },
{ "STRB2FAST", 0x02, 0x02 }, { "STRB2FAST", 0x02, 0x02 },
......
drivers/scsi/aic7xxx/aic7xxx_reg.h_shipped
View file @ 2ae203fa
...@@ -244,8 +244,6 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -244,8 +244,6 @@ ahc_reg_print_t ahc_scb_tag_print;
#define SCSIDATH 0x07 #define SCSIDATH 0x07
#define STCNT 0x08
#define OPTIONMODE 0x08 #define OPTIONMODE 0x08
#define OPTIONMODE_DEFAULTS 0x03 #define OPTIONMODE_DEFAULTS 0x03
#define AUTORATEEN 0x80 #define AUTORATEEN 0x80
...@@ -257,6 +255,8 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -257,6 +255,8 @@ ahc_reg_print_t ahc_scb_tag_print;
#define AUTO_MSGOUT_DE 0x02 #define AUTO_MSGOUT_DE 0x02
#define DIS_MSGIN_DUALEDGE 0x01 #define DIS_MSGIN_DUALEDGE 0x01
#define STCNT 0x08
#define TARGCRCCNT 0x0a #define TARGCRCCNT 0x0a
#define CLRSINT0 0x0b #define CLRSINT0 0x0b
...@@ -365,8 +365,6 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -365,8 +365,6 @@ ahc_reg_print_t ahc_scb_tag_print;
#define ALTSTIM 0x20 #define ALTSTIM 0x20
#define DFLTTID 0x10 #define DFLTTID 0x10
#define TARGID 0x1b
#define SPIOCAP 0x1b #define SPIOCAP 0x1b
#define SOFT1 0x80 #define SOFT1 0x80
#define SOFT0 0x40 #define SOFT0 0x40
...@@ -377,12 +375,14 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -377,12 +375,14 @@ ahc_reg_print_t ahc_scb_tag_print;
#define ROM 0x02 #define ROM 0x02
#define SSPIOCPS 0x01 #define SSPIOCPS 0x01
#define TARGID 0x1b
#define BRDCTL 0x1d #define BRDCTL 0x1d
#define BRDDAT7 0x80 #define BRDDAT7 0x80
#define BRDDAT6 0x40 #define BRDDAT6 0x40
#define BRDDAT5 0x20 #define BRDDAT5 0x20
#define BRDDAT4 0x10
#define BRDSTB 0x10 #define BRDSTB 0x10
#define BRDDAT4 0x10
#define BRDDAT3 0x08 #define BRDDAT3 0x08
#define BRDCS 0x08 #define BRDCS 0x08
#define BRDDAT2 0x04 #define BRDDAT2 0x04
...@@ -406,8 +406,8 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -406,8 +406,8 @@ ahc_reg_print_t ahc_scb_tag_print;
#define DIAGLEDEN 0x80 #define DIAGLEDEN 0x80
#define DIAGLEDON 0x40 #define DIAGLEDON 0x40
#define AUTOFLUSHDIS 0x20 #define AUTOFLUSHDIS 0x20
#define ENAB40 0x08
#define SELBUSB 0x08 #define SELBUSB 0x08
#define ENAB40 0x08
#define ENAB20 0x04 #define ENAB20 0x04
#define SELWIDE 0x02 #define SELWIDE 0x02
#define XCVR 0x01 #define XCVR 0x01
...@@ -730,8 +730,8 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -730,8 +730,8 @@ ahc_reg_print_t ahc_scb_tag_print;
#define SCB_BASE 0xa0 #define SCB_BASE 0xa0
#define SCB_CDB_PTR 0xa0 #define SCB_CDB_PTR 0xa0
#define SCB_RESIDUAL_DATACNT 0xa0
#define SCB_CDB_STORE 0xa0 #define SCB_CDB_STORE 0xa0
#define SCB_RESIDUAL_DATACNT 0xa0
#define SCB_RESIDUAL_SGPTR 0xa4 #define SCB_RESIDUAL_SGPTR 0xa4
...@@ -756,8 +756,8 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -756,8 +756,8 @@ ahc_reg_print_t ahc_scb_tag_print;
#define SCB_CONTROL 0xb8 #define SCB_CONTROL 0xb8
#define SCB_TAG_TYPE 0x03 #define SCB_TAG_TYPE 0x03
#define STATUS_RCVD 0x80
#define TARGET_SCB 0x80 #define TARGET_SCB 0x80
#define STATUS_RCVD 0x80
#define DISCENB 0x40 #define DISCENB 0x40
#define TAG_ENB 0x20 #define TAG_ENB 0x20
#define MK_MESSAGE 0x10 #define MK_MESSAGE 0x10
...@@ -872,40 +872,40 @@ ahc_reg_print_t ahc_scb_tag_print; ...@@ -872,40 +872,40 @@ ahc_reg_print_t ahc_scb_tag_print;
#define SG_CACHE_PRE 0xfc #define SG_CACHE_PRE 0xfc
#define TARGET_CMD_CMPLT 0xfe
#define MAX_OFFSET_ULTRA2 0x7f #define MAX_OFFSET_ULTRA2 0x7f
#define MAX_OFFSET_16BIT 0x08 #define MAX_OFFSET_16BIT 0x08
#define BUS_8_BIT 0x00 #define BUS_8_BIT 0x00
#define TARGET_CMD_CMPLT 0xfe #define TID_SHIFT 0x04
#define STATUS_QUEUE_FULL 0x28 #define STATUS_QUEUE_FULL 0x28
#define STATUS_BUSY 0x08 #define STATUS_BUSY 0x08
#define MAX_OFFSET_8BIT 0x0f
#define BUS_32_BIT 0x02
#define CCSGADDR_MAX 0x80
#define TID_SHIFT 0x04
#define SCB_DOWNLOAD_SIZE_64 0x30 #define SCB_DOWNLOAD_SIZE_64 0x30
#define MAX_OFFSET_8BIT 0x0f
#define HOST_MAILBOX_SHIFT 0x04 #define HOST_MAILBOX_SHIFT 0x04
#define CMD_GROUP_CODE_SHIFT 0x05 #define CCSGADDR_MAX 0x80
#define CCSGRAM_MAXSEGS 0x10 #define BUS_32_BIT 0x02
#define SCB_LIST_NULL 0xff
#define SG_SIZEOF 0x08 #define SG_SIZEOF 0x08
#define SCB_DOWNLOAD_SIZE 0x20
#define SEQ_MAILBOX_SHIFT 0x00 #define SEQ_MAILBOX_SHIFT 0x00
#define SCB_LIST_NULL 0xff
#define SCB_DOWNLOAD_SIZE 0x20
#define CMD_GROUP_CODE_SHIFT 0x05
#define CCSGRAM_MAXSEGS 0x10
#define TARGET_DATA_IN 0x01 #define TARGET_DATA_IN 0x01
#define HOST_MSG 0xff #define STACK_SIZE 0x04
#define SCB_UPLOAD_SIZE 0x20
#define MAX_OFFSET 0x7f #define MAX_OFFSET 0x7f
#define HOST_MSG 0xff
#define BUS_16_BIT 0x01 #define BUS_16_BIT 0x01
#define SCB_UPLOAD_SIZE 0x20
#define STACK_SIZE 0x04
/* Downloaded Constant Definitions */ /* Downloaded Constant Definitions */
#define INVERTED_CACHESIZE_MASK 0x03 #define INVERTED_CACHESIZE_MASK 0x03
#define SG_PREFETCH_ADDR_MASK 0x06
#define SG_PREFETCH_ALIGN_MASK 0x05 #define SG_PREFETCH_ALIGN_MASK 0x05
#define SG_PREFETCH_ADDR_MASK 0x06
#define QOUTFIFO_OFFSET 0x00 #define QOUTFIFO_OFFSET 0x00
#define SG_PREFETCH_CNT 0x04 #define SG_PREFETCH_CNT 0x04
#define CACHESIZE_MASK 0x02
#define QINFIFO_OFFSET 0x01 #define QINFIFO_OFFSET 0x01
#define CACHESIZE_MASK 0x02
#define DOWNLOAD_CONST_COUNT 0x07 #define DOWNLOAD_CONST_COUNT 0x07
......
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