Commit 309585b0 authored by Will Deacon's avatar Will Deacon

arm64: elf: use cpuid_feature_extract_field for hwcap detection

cpuid_feature_extract_field takes care of the fiddly ID register
field sign-extension, so use that instead of rolling our own version.
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 2e94da13
...@@ -223,7 +223,8 @@ void __init up_late_init(void) ...@@ -223,7 +223,8 @@ void __init up_late_init(void)
static void __init setup_processor(void) static void __init setup_processor(void)
{ {
u64 features, block; u64 features;
s64 block;
u32 cwg; u32 cwg;
int cls; int cls;
...@@ -253,8 +254,8 @@ static void __init setup_processor(void) ...@@ -253,8 +254,8 @@ static void __init setup_processor(void)
* for non-negative values. Negative values are reserved. * for non-negative values. Negative values are reserved.
*/ */
features = read_cpuid(ID_AA64ISAR0_EL1); features = read_cpuid(ID_AA64ISAR0_EL1);
block = (features >> 4) & 0xf; block = cpuid_feature_extract_field(features, 4);
if (!(block & 0x8)) { if (block > 0) {
switch (block) { switch (block) {
default: default:
case 2: case 2:
...@@ -266,20 +267,17 @@ static void __init setup_processor(void) ...@@ -266,20 +267,17 @@ static void __init setup_processor(void)
} }
} }
block = (features >> 8) & 0xf; if (cpuid_feature_extract_field(features, 8) > 0)
if (block && !(block & 0x8))
elf_hwcap |= HWCAP_SHA1; elf_hwcap |= HWCAP_SHA1;
block = (features >> 12) & 0xf; if (cpuid_feature_extract_field(features, 12) > 0)
if (block && !(block & 0x8))
elf_hwcap |= HWCAP_SHA2; elf_hwcap |= HWCAP_SHA2;
block = (features >> 16) & 0xf; if (cpuid_feature_extract_field(features, 16) > 0)
if (block && !(block & 0x8))
elf_hwcap |= HWCAP_CRC32; elf_hwcap |= HWCAP_CRC32;
block = (features >> 20) & 0xf; block = cpuid_feature_extract_field(features, 20);
if (!(block & 0x8)) { if (block > 0) {
switch (block) { switch (block) {
default: default:
case 2: case 2:
...@@ -294,11 +292,11 @@ static void __init setup_processor(void) ...@@ -294,11 +292,11 @@ static void __init setup_processor(void)
#ifdef CONFIG_COMPAT #ifdef CONFIG_COMPAT
/* /*
* ID_ISAR5_EL1 carries similar information as above, but pertaining to * ID_ISAR5_EL1 carries similar information as above, but pertaining to
* the Aarch32 32-bit execution state. * the AArch32 32-bit execution state.
*/ */
features = read_cpuid(ID_ISAR5_EL1); features = read_cpuid(ID_ISAR5_EL1);
block = (features >> 4) & 0xf; block = cpuid_feature_extract_field(features, 4);
if (!(block & 0x8)) { if (block > 0) {
switch (block) { switch (block) {
default: default:
case 2: case 2:
...@@ -310,16 +308,13 @@ static void __init setup_processor(void) ...@@ -310,16 +308,13 @@ static void __init setup_processor(void)
} }
} }
block = (features >> 8) & 0xf; if (cpuid_feature_extract_field(features, 8) > 0)
if (block && !(block & 0x8))
compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1; compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
block = (features >> 12) & 0xf; if (cpuid_feature_extract_field(features, 12) > 0)
if (block && !(block & 0x8))
compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2; compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
block = (features >> 16) & 0xf; if (cpuid_feature_extract_field(features, 16) > 0)
if (block && !(block & 0x8))
compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32; compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
#endif #endif
} }
......
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