Commit 30e84034 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by John W. Linville

rt2800: add eFuse EEPROM support code to rt2800lib

eFuse EEPROM is used also by USB chips (i.e. RT3070)
so move the needed code from rt2800pci to rt2800lib.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Acked-by: default avatarGertjan van Wingerde <gwingerde@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 4116cb48
...@@ -361,6 +361,35 @@ ...@@ -361,6 +361,35 @@
#define RF_CSR_CFG_WRITE FIELD32(0x00010000) #define RF_CSR_CFG_WRITE FIELD32(0x00010000)
#define RF_CSR_CFG_BUSY FIELD32(0x00020000) #define RF_CSR_CFG_BUSY FIELD32(0x00020000)
/*
* EFUSE_CSR: RT30x0 EEPROM
*/
#define EFUSE_CTRL 0x0580
#define EFUSE_CTRL_ADDRESS_IN FIELD32(0x03fe0000)
#define EFUSE_CTRL_MODE FIELD32(0x000000c0)
#define EFUSE_CTRL_KICK FIELD32(0x40000000)
#define EFUSE_CTRL_PRESENT FIELD32(0x80000000)
/*
* EFUSE_DATA0
*/
#define EFUSE_DATA0 0x0590
/*
* EFUSE_DATA1
*/
#define EFUSE_DATA1 0x0594
/*
* EFUSE_DATA2
*/
#define EFUSE_DATA2 0x0598
/*
* EFUSE_DATA3
*/
#define EFUSE_DATA3 0x059c
/* /*
* MAC Control/Status Registers(CSR). * MAC Control/Status Registers(CSR).
* Some values are set in TU, whereas 1 TU == 1024 us. * Some values are set in TU, whereas 1 TU == 1024 us.
......
...@@ -1659,6 +1659,49 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) ...@@ -1659,6 +1659,49 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
} }
EXPORT_SYMBOL_GPL(rt2800_init_rfcsr); EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
int rt2800_efuse_detect(struct rt2x00_dev *rt2x00dev)
{
u32 reg;
rt2800_register_read(rt2x00dev, EFUSE_CTRL, &reg);
return rt2x00_get_field32(reg, EFUSE_CTRL_PRESENT);
}
EXPORT_SYMBOL_GPL(rt2800_efuse_detect);
static void rt2800_efuse_read(struct rt2x00_dev *rt2x00dev, unsigned int i)
{
u32 reg;
rt2800_register_read(rt2x00dev, EFUSE_CTRL, &reg);
rt2x00_set_field32(&reg, EFUSE_CTRL_ADDRESS_IN, i);
rt2x00_set_field32(&reg, EFUSE_CTRL_MODE, 0);
rt2x00_set_field32(&reg, EFUSE_CTRL_KICK, 1);
rt2800_register_write(rt2x00dev, EFUSE_CTRL, reg);
/* Wait until the EEPROM has been loaded */
rt2800_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg);
/* Apparently the data is read from end to start */
rt2800_register_read(rt2x00dev, EFUSE_DATA3,
(u32 *)&rt2x00dev->eeprom[i]);
rt2800_register_read(rt2x00dev, EFUSE_DATA2,
(u32 *)&rt2x00dev->eeprom[i + 2]);
rt2800_register_read(rt2x00dev, EFUSE_DATA1,
(u32 *)&rt2x00dev->eeprom[i + 4]);
rt2800_register_read(rt2x00dev, EFUSE_DATA0,
(u32 *)&rt2x00dev->eeprom[i + 6]);
}
void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
{
unsigned int i;
for (i = 0; i < EEPROM_SIZE / sizeof(u16); i += 8)
rt2800_efuse_read(rt2x00dev, i);
}
EXPORT_SYMBOL_GPL(rt2800_read_eeprom_efuse);
int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
{ {
u16 word; u16 word;
......
...@@ -129,6 +129,8 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev); ...@@ -129,6 +129,8 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev);
int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev); int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev);
int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev); int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev);
int rt2800_efuse_detect(struct rt2x00_dev *rt2x00dev);
void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev);
int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev); int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev);
int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev); int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev);
int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev); int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev);
......
...@@ -147,44 +147,12 @@ static void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev) ...@@ -147,44 +147,12 @@ static void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev) static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
{ {
u32 reg; return rt2800_efuse_detect(rt2x00dev);
rt2800_register_read(rt2x00dev, EFUSE_CTRL, &reg);
return rt2x00_get_field32(reg, EFUSE_CTRL_PRESENT);
} }
static void rt2800pci_efuse_read(struct rt2x00_dev *rt2x00dev, static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
unsigned int i)
{
u32 reg;
rt2800_register_read(rt2x00dev, EFUSE_CTRL, &reg);
rt2x00_set_field32(&reg, EFUSE_CTRL_ADDRESS_IN, i);
rt2x00_set_field32(&reg, EFUSE_CTRL_MODE, 0);
rt2x00_set_field32(&reg, EFUSE_CTRL_KICK, 1);
rt2800_register_write(rt2x00dev, EFUSE_CTRL, reg);
/* Wait until the EEPROM has been loaded */
rt2800_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg);
/* Apparently the data is read from end to start */
rt2800_register_read(rt2x00dev, EFUSE_DATA3,
(u32 *)&rt2x00dev->eeprom[i]);
rt2800_register_read(rt2x00dev, EFUSE_DATA2,
(u32 *)&rt2x00dev->eeprom[i + 2]);
rt2800_register_read(rt2x00dev, EFUSE_DATA1,
(u32 *)&rt2x00dev->eeprom[i + 4]);
rt2800_register_read(rt2x00dev, EFUSE_DATA0,
(u32 *)&rt2x00dev->eeprom[i + 6]);
}
static void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
{ {
unsigned int i; rt2800_read_eeprom_efuse(rt2x00dev);
for (i = 0; i < EEPROM_SIZE / sizeof(u16); i += 8)
rt2800pci_efuse_read(rt2x00dev, i);
} }
#else #else
static inline void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev) static inline void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
......
...@@ -55,35 +55,6 @@ ...@@ -55,35 +55,6 @@
#define TX_CTX_IDX(__x) TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET) #define TX_CTX_IDX(__x) TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)
#define TX_DTX_IDX(__x) TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET) #define TX_DTX_IDX(__x) TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)
/*
* EFUSE_CSR: RT3090 EEPROM
*/
#define EFUSE_CTRL 0x0580
#define EFUSE_CTRL_ADDRESS_IN FIELD32(0x03fe0000)
#define EFUSE_CTRL_MODE FIELD32(0x000000c0)
#define EFUSE_CTRL_KICK FIELD32(0x40000000)
#define EFUSE_CTRL_PRESENT FIELD32(0x80000000)
/*
* EFUSE_DATA0
*/
#define EFUSE_DATA0 0x0590
/*
* EFUSE_DATA1
*/
#define EFUSE_DATA1 0x0594
/*
* EFUSE_DATA2
*/
#define EFUSE_DATA2 0x0598
/*
* EFUSE_DATA3
*/
#define EFUSE_DATA3 0x059c
/* /*
* 8051 firmware image. * 8051 firmware image.
*/ */
......
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