Commit 31a85cb3 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'efi-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull EFI updates from Ingo Molnar:

 - decode x86 CPER data (Yazen Ghannam)

 - ignore unrealistically large option ROMs (Hans de Goede)

 - initialize UEFI secure boot state during Xen dom0 boot (Daniel Kiper)

 - additional minor tweaks and fixes.

* 'efi-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  efi/capsule-loader: Don't output reset log when reset flags are not set
  efi/x86: Ignore unrealistically large option ROMs
  efi/x86: Fold __setup_efi_pci32() and __setup_efi_pci64() into one function
  efi: Align efi_pci_io_protocol typedefs to type naming convention
  efi/libstub/tpm: Make function efi_retrieve_tpm2_eventlog_1_2() static
  efi: Decode IA32/X64 Context Info structure
  efi: Decode IA32/X64 MS Check structure
  efi: Decode additional IA32/X64 Bus Check fields
  efi: Decode IA32/X64 Cache, TLB, and Bus Check structures
  efi: Decode UEFI-defined IA32/X64 Error Structure GUIDs
  efi: Decode IA32/X64 Processor Error Info Structure
  efi: Decode IA32/X64 Processor Error Section
  efi: Fix IA32/X64 Processor Error Record definition
  efi/cper: Remove the INDENT_SP silliness
  x86/xen/efi: Initialize UEFI secure boot state during dom0 boot
parents 4057adaf 83f0a7c7
......@@ -109,23 +109,34 @@ void efi_char16_printk(efi_system_table_t *table, efi_char16_t *str)
}
static efi_status_t
__setup_efi_pci32(efi_pci_io_protocol_32 *pci, struct pci_setup_rom **__rom)
__setup_efi_pci(efi_pci_io_protocol_t *pci, struct pci_setup_rom **__rom)
{
struct pci_setup_rom *rom = NULL;
efi_status_t status;
unsigned long size;
uint64_t attributes;
uint64_t attributes, romsize;
void *romimage;
status = efi_early->call(pci->attributes, pci,
status = efi_call_proto(efi_pci_io_protocol, attributes, pci,
EfiPciIoAttributeOperationGet, 0, 0,
&attributes);
if (status != EFI_SUCCESS)
return status;
if (!pci->romimage || !pci->romsize)
/*
* Some firmware images contain EFI function pointers at the place where the
* romimage and romsize fields are supposed to be. Typically the EFI
* code is mapped at high addresses, translating to an unrealistically
* large romsize. The UEFI spec limits the size of option ROMs to 16
* MiB so we reject any ROMs over 16 MiB in size to catch this.
*/
romimage = (void *)(unsigned long)efi_table_attr(efi_pci_io_protocol,
romimage, pci);
romsize = efi_table_attr(efi_pci_io_protocol, romsize, pci);
if (!romimage || !romsize || romsize > SZ_16M)
return EFI_INVALID_PARAMETER;
size = pci->romsize + sizeof(*rom);
size = romsize + sizeof(*rom);
status = efi_call_early(allocate_pool, EFI_LOADER_DATA, size, &rom);
if (status != EFI_SUCCESS) {
......@@ -141,30 +152,32 @@ __setup_efi_pci32(efi_pci_io_protocol_32 *pci, struct pci_setup_rom **__rom)
rom->pcilen = pci->romsize;
*__rom = rom;
status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
PCI_VENDOR_ID, 1, &(rom->vendor));
status = efi_call_proto(efi_pci_io_protocol, pci.read, pci,
EfiPciIoWidthUint16, PCI_VENDOR_ID, 1,
&rom->vendor);
if (status != EFI_SUCCESS) {
efi_printk(sys_table, "Failed to read rom->vendor\n");
goto free_struct;
}
status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
PCI_DEVICE_ID, 1, &(rom->devid));
status = efi_call_proto(efi_pci_io_protocol, pci.read, pci,
EfiPciIoWidthUint16, PCI_DEVICE_ID, 1,
&rom->devid);
if (status != EFI_SUCCESS) {
efi_printk(sys_table, "Failed to read rom->devid\n");
goto free_struct;
}
status = efi_early->call(pci->get_location, pci, &(rom->segment),
&(rom->bus), &(rom->device), &(rom->function));
status = efi_call_proto(efi_pci_io_protocol, get_location, pci,
&rom->segment, &rom->bus, &rom->device,
&rom->function);
if (status != EFI_SUCCESS)
goto free_struct;
memcpy(rom->romdata, (void *)(unsigned long)pci->romimage,
pci->romsize);
memcpy(rom->romdata, romimage, romsize);
return status;
free_struct:
......@@ -176,7 +189,7 @@ static void
setup_efi_pci32(struct boot_params *params, void **pci_handle,
unsigned long size)
{
efi_pci_io_protocol_32 *pci = NULL;
efi_pci_io_protocol_t *pci = NULL;
efi_guid_t pci_proto = EFI_PCI_IO_PROTOCOL_GUID;
u32 *handles = (u32 *)(unsigned long)pci_handle;
efi_status_t status;
......@@ -203,7 +216,7 @@ setup_efi_pci32(struct boot_params *params, void **pci_handle,
if (!pci)
continue;
status = __setup_efi_pci32(pci, &rom);
status = __setup_efi_pci(pci, &rom);
if (status != EFI_SUCCESS)
continue;
......@@ -217,74 +230,11 @@ setup_efi_pci32(struct boot_params *params, void **pci_handle,
}
}
static efi_status_t
__setup_efi_pci64(efi_pci_io_protocol_64 *pci, struct pci_setup_rom **__rom)
{
struct pci_setup_rom *rom;
efi_status_t status;
unsigned long size;
uint64_t attributes;
status = efi_early->call(pci->attributes, pci,
EfiPciIoAttributeOperationGet, 0,
&attributes);
if (status != EFI_SUCCESS)
return status;
if (!pci->romimage || !pci->romsize)
return EFI_INVALID_PARAMETER;
size = pci->romsize + sizeof(*rom);
status = efi_call_early(allocate_pool, EFI_LOADER_DATA, size, &rom);
if (status != EFI_SUCCESS) {
efi_printk(sys_table, "Failed to alloc mem for rom\n");
return status;
}
rom->data.type = SETUP_PCI;
rom->data.len = size - sizeof(struct setup_data);
rom->data.next = 0;
rom->pcilen = pci->romsize;
*__rom = rom;
status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
PCI_VENDOR_ID, 1, &(rom->vendor));
if (status != EFI_SUCCESS) {
efi_printk(sys_table, "Failed to read rom->vendor\n");
goto free_struct;
}
status = efi_early->call(pci->pci.read, pci, EfiPciIoWidthUint16,
PCI_DEVICE_ID, 1, &(rom->devid));
if (status != EFI_SUCCESS) {
efi_printk(sys_table, "Failed to read rom->devid\n");
goto free_struct;
}
status = efi_early->call(pci->get_location, pci, &(rom->segment),
&(rom->bus), &(rom->device), &(rom->function));
if (status != EFI_SUCCESS)
goto free_struct;
memcpy(rom->romdata, (void *)(unsigned long)pci->romimage,
pci->romsize);
return status;
free_struct:
efi_call_early(free_pool, rom);
return status;
}
static void
setup_efi_pci64(struct boot_params *params, void **pci_handle,
unsigned long size)
{
efi_pci_io_protocol_64 *pci = NULL;
efi_pci_io_protocol_t *pci = NULL;
efi_guid_t pci_proto = EFI_PCI_IO_PROTOCOL_GUID;
u64 *handles = (u64 *)(unsigned long)pci_handle;
efi_status_t status;
......@@ -311,7 +261,7 @@ setup_efi_pci64(struct boot_params *params, void **pci_handle,
if (!pci)
continue;
status = __setup_efi_pci64(pci, &rom);
status = __setup_efi_pci(pci, &rom);
if (status != EFI_SUCCESS)
continue;
......
......@@ -115,6 +115,61 @@ static efi_system_table_t __init *xen_efi_probe(void)
return &efi_systab_xen;
}
/*
* Determine whether we're in secure boot mode.
*
* Please keep the logic in sync with
* drivers/firmware/efi/libstub/secureboot.c:efi_get_secureboot().
*/
static enum efi_secureboot_mode xen_efi_get_secureboot(void)
{
static efi_guid_t efi_variable_guid = EFI_GLOBAL_VARIABLE_GUID;
static efi_guid_t shim_guid = EFI_SHIM_LOCK_GUID;
efi_status_t status;
u8 moksbstate, secboot, setupmode;
unsigned long size;
size = sizeof(secboot);
status = efi.get_variable(L"SecureBoot", &efi_variable_guid,
NULL, &size, &secboot);
if (status == EFI_NOT_FOUND)
return efi_secureboot_mode_disabled;
if (status != EFI_SUCCESS)
goto out_efi_err;
size = sizeof(setupmode);
status = efi.get_variable(L"SetupMode", &efi_variable_guid,
NULL, &size, &setupmode);
if (status != EFI_SUCCESS)
goto out_efi_err;
if (secboot == 0 || setupmode == 1)
return efi_secureboot_mode_disabled;
/* See if a user has put the shim into insecure mode. */
size = sizeof(moksbstate);
status = efi.get_variable(L"MokSBStateRT", &shim_guid,
NULL, &size, &moksbstate);
/* If it fails, we don't care why. Default to secure. */
if (status != EFI_SUCCESS)
goto secure_boot_enabled;
if (moksbstate == 1)
return efi_secureboot_mode_disabled;
secure_boot_enabled:
pr_info("UEFI Secure Boot is enabled.\n");
return efi_secureboot_mode_enabled;
out_efi_err:
pr_err("Could not determine UEFI Secure Boot status.\n");
return efi_secureboot_mode_unknown;
}
void __init xen_efi_init(void)
{
efi_system_table_t *efi_systab_xen;
......@@ -129,6 +184,8 @@ void __init xen_efi_init(void)
boot_params.efi_info.efi_systab = (__u32)__pa(efi_systab_xen);
boot_params.efi_info.efi_systab_hi = (__u32)(__pa(efi_systab_xen) >> 32);
boot_params.secure_boot = xen_efi_get_secureboot();
set_bit(EFI_BOOT, &efi.flags);
set_bit(EFI_PARAVIRT, &efi.flags);
set_bit(EFI_64BIT, &efi.flags);
......
......@@ -174,6 +174,11 @@ config UEFI_CPER_ARM
depends on UEFI_CPER && ( ARM || ARM64 )
default y
config UEFI_CPER_X86
bool
depends on UEFI_CPER && X86
default y
config EFI_DEV_PATH_PARSER
bool
depends on ACPI
......
......@@ -31,3 +31,4 @@ obj-$(CONFIG_ARM) += $(arm-obj-y)
obj-$(CONFIG_ARM64) += $(arm-obj-y)
obj-$(CONFIG_EFI_CAPSULE_LOADER) += capsule-loader.o
obj-$(CONFIG_UEFI_CPER_ARM) += cper-arm.o
obj-$(CONFIG_UEFI_CPER_X86) += cper-x86.o
......@@ -134,10 +134,16 @@ static ssize_t efi_capsule_submit_update(struct capsule_info *cap_info)
/* Indicate capsule binary uploading is done */
cap_info->index = NO_FURTHER_WRITE_ACTION;
pr_info("Successfully upload capsule file with reboot type '%s'\n",
if (cap_info->header.flags & EFI_CAPSULE_PERSIST_ACROSS_RESET) {
pr_info("Successfully uploaded capsule file with reboot type '%s'\n",
!cap_info->reset_type ? "RESET_COLD" :
cap_info->reset_type == 1 ? "RESET_WARM" :
"RESET_SHUTDOWN");
} else {
pr_info("Successfully processed capsule file\n");
}
return 0;
}
......
......@@ -30,8 +30,6 @@
#include <acpi/ghes.h>
#include <ras/ras_event.h>
#define INDENT_SP " "
static const char * const arm_reg_ctx_strs[] = {
"AArch32 general purpose registers",
"AArch32 EL1 context registers",
......@@ -283,7 +281,7 @@ void cper_print_proc_arm(const char *pfx,
pfx, proc->psci_state);
}
snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
err_info = (struct cper_arm_err_info *)(proc + 1);
for (i = 0; i < proc->err_info_num; i++) {
......@@ -310,7 +308,7 @@ void cper_print_proc_arm(const char *pfx,
if (err_info->validation_bits & CPER_ARM_INFO_VALID_ERR_INFO) {
printk("%serror_info: 0x%016llx\n", newpfx,
err_info->error_info);
snprintf(infopfx, sizeof(infopfx), "%s%s", newpfx, INDENT_SP);
snprintf(infopfx, sizeof(infopfx), "%s ", newpfx);
cper_print_arm_err_info(infopfx, err_info->type,
err_info->error_info);
}
......
// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2018, Advanced Micro Devices, Inc.
#include <linux/cper.h>
/*
* We don't need a "CPER_IA" prefix since these are all locally defined.
* This will save us a lot of line space.
*/
#define VALID_LAPIC_ID BIT_ULL(0)
#define VALID_CPUID_INFO BIT_ULL(1)
#define VALID_PROC_ERR_INFO_NUM(bits) (((bits) & GENMASK_ULL(7, 2)) >> 2)
#define VALID_PROC_CXT_INFO_NUM(bits) (((bits) & GENMASK_ULL(13, 8)) >> 8)
#define INFO_ERR_STRUCT_TYPE_CACHE \
GUID_INIT(0xA55701F5, 0xE3EF, 0x43DE, 0xAC, 0x72, 0x24, 0x9B, \
0x57, 0x3F, 0xAD, 0x2C)
#define INFO_ERR_STRUCT_TYPE_TLB \
GUID_INIT(0xFC06B535, 0x5E1F, 0x4562, 0x9F, 0x25, 0x0A, 0x3B, \
0x9A, 0xDB, 0x63, 0xC3)
#define INFO_ERR_STRUCT_TYPE_BUS \
GUID_INIT(0x1CF3F8B3, 0xC5B1, 0x49a2, 0xAA, 0x59, 0x5E, 0xEF, \
0x92, 0xFF, 0xA6, 0x3C)
#define INFO_ERR_STRUCT_TYPE_MS \
GUID_INIT(0x48AB7F57, 0xDC34, 0x4f6c, 0xA7, 0xD3, 0xB0, 0xB5, \
0xB0, 0xA7, 0x43, 0x14)
#define INFO_VALID_CHECK_INFO BIT_ULL(0)
#define INFO_VALID_TARGET_ID BIT_ULL(1)
#define INFO_VALID_REQUESTOR_ID BIT_ULL(2)
#define INFO_VALID_RESPONDER_ID BIT_ULL(3)
#define INFO_VALID_IP BIT_ULL(4)
#define CHECK_VALID_TRANS_TYPE BIT_ULL(0)
#define CHECK_VALID_OPERATION BIT_ULL(1)
#define CHECK_VALID_LEVEL BIT_ULL(2)
#define CHECK_VALID_PCC BIT_ULL(3)
#define CHECK_VALID_UNCORRECTED BIT_ULL(4)
#define CHECK_VALID_PRECISE_IP BIT_ULL(5)
#define CHECK_VALID_RESTARTABLE_IP BIT_ULL(6)
#define CHECK_VALID_OVERFLOW BIT_ULL(7)
#define CHECK_VALID_BUS_PART_TYPE BIT_ULL(8)
#define CHECK_VALID_BUS_TIME_OUT BIT_ULL(9)
#define CHECK_VALID_BUS_ADDR_SPACE BIT_ULL(10)
#define CHECK_VALID_BITS(check) (((check) & GENMASK_ULL(15, 0)))
#define CHECK_TRANS_TYPE(check) (((check) & GENMASK_ULL(17, 16)) >> 16)
#define CHECK_OPERATION(check) (((check) & GENMASK_ULL(21, 18)) >> 18)
#define CHECK_LEVEL(check) (((check) & GENMASK_ULL(24, 22)) >> 22)
#define CHECK_PCC BIT_ULL(25)
#define CHECK_UNCORRECTED BIT_ULL(26)
#define CHECK_PRECISE_IP BIT_ULL(27)
#define CHECK_RESTARTABLE_IP BIT_ULL(28)
#define CHECK_OVERFLOW BIT_ULL(29)
#define CHECK_BUS_PART_TYPE(check) (((check) & GENMASK_ULL(31, 30)) >> 30)
#define CHECK_BUS_TIME_OUT BIT_ULL(32)
#define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33)
#define CHECK_VALID_MS_ERR_TYPE BIT_ULL(0)
#define CHECK_VALID_MS_PCC BIT_ULL(1)
#define CHECK_VALID_MS_UNCORRECTED BIT_ULL(2)
#define CHECK_VALID_MS_PRECISE_IP BIT_ULL(3)
#define CHECK_VALID_MS_RESTARTABLE_IP BIT_ULL(4)
#define CHECK_VALID_MS_OVERFLOW BIT_ULL(5)
#define CHECK_MS_ERR_TYPE(check) (((check) & GENMASK_ULL(18, 16)) >> 16)
#define CHECK_MS_PCC BIT_ULL(19)
#define CHECK_MS_UNCORRECTED BIT_ULL(20)
#define CHECK_MS_PRECISE_IP BIT_ULL(21)
#define CHECK_MS_RESTARTABLE_IP BIT_ULL(22)
#define CHECK_MS_OVERFLOW BIT_ULL(23)
#define CTX_TYPE_MSR 1
#define CTX_TYPE_MMREG 7
enum err_types {
ERR_TYPE_CACHE = 0,
ERR_TYPE_TLB,
ERR_TYPE_BUS,
ERR_TYPE_MS,
N_ERR_TYPES
};
static enum err_types cper_get_err_type(const guid_t *err_type)
{
if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_CACHE))
return ERR_TYPE_CACHE;
else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_TLB))
return ERR_TYPE_TLB;
else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_BUS))
return ERR_TYPE_BUS;
else if (guid_equal(err_type, &INFO_ERR_STRUCT_TYPE_MS))
return ERR_TYPE_MS;
else
return N_ERR_TYPES;
}
static const char * const ia_check_trans_type_strs[] = {
"Instruction",
"Data Access",
"Generic",
};
static const char * const ia_check_op_strs[] = {
"generic error",
"generic read",
"generic write",
"data read",
"data write",
"instruction fetch",
"prefetch",
"eviction",
"snoop",
};
static const char * const ia_check_bus_part_type_strs[] = {
"Local Processor originated request",
"Local Processor responded to request",
"Local Processor observed",
"Generic",
};
static const char * const ia_check_bus_addr_space_strs[] = {
"Memory Access",
"Reserved",
"I/O",
"Other Transaction",
};
static const char * const ia_check_ms_error_type_strs[] = {
"No Error",
"Unclassified",
"Microcode ROM Parity Error",
"External Error",
"FRC Error",
"Internal Unclassified",
};
static const char * const ia_reg_ctx_strs[] = {
"Unclassified Data",
"MSR Registers (Machine Check and other MSRs)",
"32-bit Mode Execution Context",
"64-bit Mode Execution Context",
"FXSAVE Context",
"32-bit Mode Debug Registers (DR0-DR7)",
"64-bit Mode Debug Registers (DR0-DR7)",
"Memory Mapped Registers",
};
static inline void print_bool(char *str, const char *pfx, u64 check, u64 bit)
{
printk("%s%s: %s\n", pfx, str, (check & bit) ? "true" : "false");
}
static void print_err_info_ms(const char *pfx, u16 validation_bits, u64 check)
{
if (validation_bits & CHECK_VALID_MS_ERR_TYPE) {
u8 err_type = CHECK_MS_ERR_TYPE(check);
printk("%sError Type: %u, %s\n", pfx, err_type,
err_type < ARRAY_SIZE(ia_check_ms_error_type_strs) ?
ia_check_ms_error_type_strs[err_type] : "unknown");
}
if (validation_bits & CHECK_VALID_MS_PCC)
print_bool("Processor Context Corrupt", pfx, check, CHECK_MS_PCC);
if (validation_bits & CHECK_VALID_MS_UNCORRECTED)
print_bool("Uncorrected", pfx, check, CHECK_MS_UNCORRECTED);
if (validation_bits & CHECK_VALID_MS_PRECISE_IP)
print_bool("Precise IP", pfx, check, CHECK_MS_PRECISE_IP);
if (validation_bits & CHECK_VALID_MS_RESTARTABLE_IP)
print_bool("Restartable IP", pfx, check, CHECK_MS_RESTARTABLE_IP);
if (validation_bits & CHECK_VALID_MS_OVERFLOW)
print_bool("Overflow", pfx, check, CHECK_MS_OVERFLOW);
}
static void print_err_info(const char *pfx, u8 err_type, u64 check)
{
u16 validation_bits = CHECK_VALID_BITS(check);
/*
* The MS Check structure varies a lot from the others, so use a
* separate function for decoding.
*/
if (err_type == ERR_TYPE_MS)
return print_err_info_ms(pfx, validation_bits, check);
if (validation_bits & CHECK_VALID_TRANS_TYPE) {
u8 trans_type = CHECK_TRANS_TYPE(check);
printk("%sTransaction Type: %u, %s\n", pfx, trans_type,
trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ?
ia_check_trans_type_strs[trans_type] : "unknown");
}
if (validation_bits & CHECK_VALID_OPERATION) {
u8 op = CHECK_OPERATION(check);
/*
* CACHE has more operation types than TLB or BUS, though the
* name and the order are the same.
*/
u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7;
printk("%sOperation: %u, %s\n", pfx, op,
op < max_ops ? ia_check_op_strs[op] : "unknown");
}
if (validation_bits & CHECK_VALID_LEVEL)
printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check));
if (validation_bits & CHECK_VALID_PCC)
print_bool("Processor Context Corrupt", pfx, check, CHECK_PCC);
if (validation_bits & CHECK_VALID_UNCORRECTED)
print_bool("Uncorrected", pfx, check, CHECK_UNCORRECTED);
if (validation_bits & CHECK_VALID_PRECISE_IP)
print_bool("Precise IP", pfx, check, CHECK_PRECISE_IP);
if (validation_bits & CHECK_VALID_RESTARTABLE_IP)
print_bool("Restartable IP", pfx, check, CHECK_RESTARTABLE_IP);
if (validation_bits & CHECK_VALID_OVERFLOW)
print_bool("Overflow", pfx, check, CHECK_OVERFLOW);
if (err_type != ERR_TYPE_BUS)
return;
if (validation_bits & CHECK_VALID_BUS_PART_TYPE) {
u8 part_type = CHECK_BUS_PART_TYPE(check);
printk("%sParticipation Type: %u, %s\n", pfx, part_type,
part_type < ARRAY_SIZE(ia_check_bus_part_type_strs) ?
ia_check_bus_part_type_strs[part_type] : "unknown");
}
if (validation_bits & CHECK_VALID_BUS_TIME_OUT)
print_bool("Time Out", pfx, check, CHECK_BUS_TIME_OUT);
if (validation_bits & CHECK_VALID_BUS_ADDR_SPACE) {
u8 addr_space = CHECK_BUS_ADDR_SPACE(check);
printk("%sAddress Space: %u, %s\n", pfx, addr_space,
addr_space < ARRAY_SIZE(ia_check_bus_addr_space_strs) ?
ia_check_bus_addr_space_strs[addr_space] : "unknown");
}
}
void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)
{
int i;
struct cper_ia_err_info *err_info;
struct cper_ia_proc_ctx *ctx_info;
char newpfx[64], infopfx[64];
u8 err_type;
if (proc->validation_bits & VALID_LAPIC_ID)
printk("%sLocal APIC_ID: 0x%llx\n", pfx, proc->lapic_id);
if (proc->validation_bits & VALID_CPUID_INFO) {
printk("%sCPUID Info:\n", pfx);
print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, proc->cpuid,
sizeof(proc->cpuid), 0);
}
snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
err_info = (struct cper_ia_err_info *)(proc + 1);
for (i = 0; i < VALID_PROC_ERR_INFO_NUM(proc->validation_bits); i++) {
printk("%sError Information Structure %d:\n", pfx, i);
err_type = cper_get_err_type(&err_info->err_type);
printk("%sError Structure Type: %s\n", newpfx,
err_type < ARRAY_SIZE(cper_proc_error_type_strs) ?
cper_proc_error_type_strs[err_type] : "unknown");
if (err_type >= N_ERR_TYPES) {
printk("%sError Structure Type: %pUl\n", newpfx,
&err_info->err_type);
}
if (err_info->validation_bits & INFO_VALID_CHECK_INFO) {
printk("%sCheck Information: 0x%016llx\n", newpfx,
err_info->check_info);
if (err_type < N_ERR_TYPES) {
snprintf(infopfx, sizeof(infopfx), "%s ",
newpfx);
print_err_info(infopfx, err_type,
err_info->check_info);
}
}
if (err_info->validation_bits & INFO_VALID_TARGET_ID) {
printk("%sTarget Identifier: 0x%016llx\n",
newpfx, err_info->target_id);
}
if (err_info->validation_bits & INFO_VALID_REQUESTOR_ID) {
printk("%sRequestor Identifier: 0x%016llx\n",
newpfx, err_info->requestor_id);
}
if (err_info->validation_bits & INFO_VALID_RESPONDER_ID) {
printk("%sResponder Identifier: 0x%016llx\n",
newpfx, err_info->responder_id);
}
if (err_info->validation_bits & INFO_VALID_IP) {
printk("%sInstruction Pointer: 0x%016llx\n",
newpfx, err_info->ip);
}
err_info++;
}
ctx_info = (struct cper_ia_proc_ctx *)err_info;
for (i = 0; i < VALID_PROC_CXT_INFO_NUM(proc->validation_bits); i++) {
int size = sizeof(*ctx_info) + ctx_info->reg_arr_size;
int groupsize = 4;
printk("%sContext Information Structure %d:\n", pfx, i);
printk("%sRegister Context Type: %s\n", newpfx,
ctx_info->reg_ctx_type < ARRAY_SIZE(ia_reg_ctx_strs) ?
ia_reg_ctx_strs[ctx_info->reg_ctx_type] : "unknown");
printk("%sRegister Array Size: 0x%04x\n", newpfx,
ctx_info->reg_arr_size);
if (ctx_info->reg_ctx_type == CTX_TYPE_MSR) {
groupsize = 8; /* MSRs are 8 bytes wide. */
printk("%sMSR Address: 0x%08x\n", newpfx,
ctx_info->msr_addr);
}
if (ctx_info->reg_ctx_type == CTX_TYPE_MMREG) {
printk("%sMM Register Address: 0x%016llx\n", newpfx,
ctx_info->mm_reg_addr);
}
printk("%sRegister Array:\n", newpfx);
print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, groupsize,
(ctx_info + 1), ctx_info->reg_arr_size, 0);
ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size);
}
}
......@@ -37,8 +37,6 @@
#include <acpi/ghes.h>
#include <ras/ras_event.h>
#define INDENT_SP " "
static char rcd_decode_str[CPER_REC_LEN];
/*
......@@ -433,7 +431,7 @@ cper_estatus_print_section(const char *pfx, struct acpi_hest_generic_data *gdata
if (gdata->validation_bits & CPER_SEC_VALID_FRU_TEXT)
printk("%s""fru_text: %.20s\n", pfx, gdata->fru_text);
snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
if (guid_equal(sec_type, &CPER_SEC_PROC_GENERIC)) {
struct cper_sec_proc_generic *proc_err = acpi_hest_get_payload(gdata);
......@@ -469,6 +467,16 @@ cper_estatus_print_section(const char *pfx, struct acpi_hest_generic_data *gdata
cper_print_proc_arm(newpfx, arm_err);
else
goto err_section_too_small;
#endif
#if defined(CONFIG_UEFI_CPER_X86)
} else if (guid_equal(sec_type, &CPER_SEC_PROC_IA)) {
struct cper_sec_proc_ia *ia_err = acpi_hest_get_payload(gdata);
printk("%ssection_type: IA32/X64 processor error\n", newpfx);
if (gdata->error_data_length >= sizeof(*ia_err))
cper_print_proc_ia(newpfx, ia_err);
else
goto err_section_too_small;
#endif
} else {
const void *err = acpi_hest_get_payload(gdata);
......@@ -500,7 +508,7 @@ void cper_estatus_print(const char *pfx,
"It has been corrected by h/w "
"and requires no further action");
printk("%s""event severity: %s\n", pfx, cper_severity_str(severity));
snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
apei_estatus_for_each_section(estatus, gdata) {
cper_estatus_print_section(newpfx, gdata, sec_no);
......
......@@ -30,6 +30,9 @@ static const efi_char16_t shim_MokSBState_name[] = L"MokSBState";
/*
* Determine whether we're in secure boot mode.
*
* Please keep the logic in sync with
* arch/x86/xen/efi.c:xen_efi_get_secureboot().
*/
enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg)
{
......
......@@ -59,7 +59,7 @@ void efi_enable_reset_attack_mitigation(efi_system_table_t *sys_table_arg)
#endif
void efi_retrieve_tpm2_eventlog_1_2(efi_system_table_t *sys_table_arg)
static void efi_retrieve_tpm2_eventlog_1_2(efi_system_table_t *sys_table_arg)
{
efi_guid_t tcg2_guid = EFI_TCG2_PROTOCOL_GUID;
efi_guid_t linux_eventlog_guid = LINUX_EFI_TPM_EVENT_LOG_GUID;
......
......@@ -381,7 +381,7 @@ struct cper_sec_proc_generic {
/* IA32/X64 Processor Error Section */
struct cper_sec_proc_ia {
__u64 validation_bits;
__u8 lapic_id;
__u64 lapic_id;
__u8 cpuid[48];
};
......@@ -551,5 +551,7 @@ const char *cper_mem_err_unpack(struct trace_seq *,
struct cper_mem_err_compact *);
void cper_print_proc_arm(const char *pfx,
const struct cper_sec_proc_arm *proc);
void cper_print_proc_ia(const char *pfx,
const struct cper_sec_proc_ia *proc);
#endif
......@@ -397,7 +397,7 @@ typedef struct {
u32 set_bar_attributes;
u64 romsize;
u32 romimage;
} efi_pci_io_protocol_32;
} efi_pci_io_protocol_32_t;
typedef struct {
u64 poll_mem;
......@@ -417,7 +417,7 @@ typedef struct {
u64 set_bar_attributes;
u64 romsize;
u64 romimage;
} efi_pci_io_protocol_64;
} efi_pci_io_protocol_64_t;
typedef struct {
void *poll_mem;
......@@ -437,7 +437,7 @@ typedef struct {
void *set_bar_attributes;
uint64_t romsize;
void *romimage;
} efi_pci_io_protocol;
} efi_pci_io_protocol_t;
#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002
......
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