Commit 32c4d9e8 authored by Kars de Jong's avatar Kars de Jong Committed by Alexandre Belloni

rtc: msm6242: Remove unneeded msm6242_set()/msm6242_clear() functions

The msm6242_set()/msm6242_clear() functions are used when writing to Control
Register D to set or clear the HOLD bit when reading the current time from
the RTC.

Doing this with a read-modify-write cycle will potentially clear an
interrupt condition which occurs between the read and the write.

The datasheet states the following about this:

  When writing the HOLD or 30 second adjust bits of register D, it is
  necessary to write the IRQ FLAG bit to a "1".

Since the only other bits in the register are the 30 second adjust bit
(which is not used) and the BUSY bit (which is read-only), the
read-modify-write cycle can be replaced by a simple write with the IRQ FLAG
bit set to 1 and the other bits (except HOLD) set to 0.
Tested-by: default avatarKars de Jong <jongk@linux-m68k.org>
Signed-off-by: default avatarKars de Jong <jongk@linux-m68k.org>
Link: https://lore.kernel.org/r/20191116114620.9193-1-jongk@linux-m68k.orgReviewed-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent e34494c8
...@@ -88,28 +88,16 @@ static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val, ...@@ -88,28 +88,16 @@ static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
__raw_writel(val, &priv->regs[reg]); __raw_writel(val, &priv->regs[reg]);
} }
static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val,
unsigned int reg)
{
msm6242_write(priv, msm6242_read(priv, reg) | val, reg);
}
static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val,
unsigned int reg)
{
msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg);
}
static void msm6242_lock(struct msm6242_priv *priv) static void msm6242_lock(struct msm6242_priv *priv)
{ {
int cnt = 5; int cnt = 5;
msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD); msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) { while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD); msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
udelay(70); udelay(70);
msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD); msm6242_write(priv, MSM6242_CD_HOLD|MSM6242_CD_IRQ_FLAG, MSM6242_CD);
cnt--; cnt--;
} }
...@@ -120,7 +108,7 @@ static void msm6242_lock(struct msm6242_priv *priv) ...@@ -120,7 +108,7 @@ static void msm6242_lock(struct msm6242_priv *priv)
static void msm6242_unlock(struct msm6242_priv *priv) static void msm6242_unlock(struct msm6242_priv *priv)
{ {
msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD); msm6242_write(priv, MSM6242_CD_IRQ_FLAG, MSM6242_CD);
} }
static int msm6242_read_time(struct device *dev, struct rtc_time *tm) static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
......
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