Commit 35ad4271 authored by Laurent Pinchart's avatar Laurent Pinchart

sh-pfc: Use GPIO_FN instead of PINMUX_GPIO where possible

The GPIO_FN macro expands to the PINMUX_GPIO macro. The regular
expression to 'unexpand' PINMUX_GPIO to GPIO_FN is

s/\tPINMUX_GPIO(GPIO_FN_\([A-Z0-9_]*\),[ \t]*\1_MARK)/\tGPIO_FN(\1)/

This consolidates SoC-specific PFC information to use the same macros
for all SoCs.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent d785fdb5
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......@@ -386,68 +386,68 @@ static struct pinmux_gpio shx3_pinmux_gpios[] = {
PINMUX_GPIO(GPIO_PH0, PH0_DATA),
/* FN */
PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
PINMUX_GPIO(GPIO_FN_WE3, WE3_MARK),
PINMUX_GPIO(GPIO_FN_WE2, WE2_MARK),
PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
PINMUX_GPIO(GPIO_FN_CLKOUTENB, CLKOUTENB_MARK),
PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK),
PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK),
PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
PINMUX_GPIO(GPIO_FN_IRL3, IRL3_MARK),
PINMUX_GPIO(GPIO_FN_IRL2, IRL2_MARK),
PINMUX_GPIO(GPIO_FN_IRL1, IRL1_MARK),
PINMUX_GPIO(GPIO_FN_IRL0, IRL0_MARK),
PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
GPIO_FN(D31),
GPIO_FN(D30),
GPIO_FN(D29),
GPIO_FN(D28),
GPIO_FN(D27),
GPIO_FN(D26),
GPIO_FN(D25),
GPIO_FN(D24),
GPIO_FN(D23),
GPIO_FN(D22),
GPIO_FN(D21),
GPIO_FN(D20),
GPIO_FN(D19),
GPIO_FN(D18),
GPIO_FN(D17),
GPIO_FN(D16),
GPIO_FN(BACK),
GPIO_FN(BREQ),
GPIO_FN(WE3),
GPIO_FN(WE2),
GPIO_FN(CS6),
GPIO_FN(CS5),
GPIO_FN(CS4),
GPIO_FN(CLKOUTENB),
GPIO_FN(DACK3),
GPIO_FN(DACK2),
GPIO_FN(DACK1),
GPIO_FN(DACK0),
GPIO_FN(DREQ3),
GPIO_FN(DREQ2),
GPIO_FN(DREQ1),
GPIO_FN(DREQ0),
GPIO_FN(IRQ3),
GPIO_FN(IRQ2),
GPIO_FN(IRQ1),
GPIO_FN(IRQ0),
GPIO_FN(DRAK3),
GPIO_FN(DRAK2),
GPIO_FN(DRAK1),
GPIO_FN(DRAK0),
GPIO_FN(SCK3),
GPIO_FN(SCK2),
GPIO_FN(SCK1),
GPIO_FN(SCK0),
GPIO_FN(IRL3),
GPIO_FN(IRL2),
GPIO_FN(IRL1),
GPIO_FN(IRL0),
GPIO_FN(TXD3),
GPIO_FN(TXD2),
GPIO_FN(TXD1),
GPIO_FN(TXD0),
GPIO_FN(RXD3),
GPIO_FN(RXD2),
GPIO_FN(RXD1),
GPIO_FN(RXD0),
GPIO_FN(CE2B),
GPIO_FN(CE2A),
GPIO_FN(IOIS16),
GPIO_FN(STATUS1),
GPIO_FN(STATUS0),
GPIO_FN(IRQOUT),
};
static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
......
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