Commit 38843888 authored by Eugene Surovegin's avatar Eugene Surovegin Committed by Jeff Garzik

[PATCH] PPC44x EMAC driver: disable TX status deferral in half-duplex mode

Disable TX status deferral (EMACx_MR[MWSW=001]) in half-duplex mode.
I have two reports when EMAC stops transmitting when connected to a
hub. TX ring debug printouts show complete mess when this happens,
probably hardware collision handling doesn't work quite well in this
mode.

This is relevant only for SoCs with EMAC4 core (440GX, 440SP, 440SPe).
Tested on 440GX.
Signed-off-by: default avatarEugene Surovegin <ebs@ebshome.net>
Signed-off-by: default avatarJeff Garzik <jgarzik@pobox.com>
parent a4bf26f3
...@@ -110,6 +110,7 @@ struct emac_regs { ...@@ -110,6 +110,7 @@ struct emac_regs {
#define EMAC_MR1_TFS_2K 0x00080000 #define EMAC_MR1_TFS_2K 0x00080000
#define EMAC_MR1_TR0_MULT 0x00008000 #define EMAC_MR1_TR0_MULT 0x00008000
#define EMAC_MR1_JPSM 0x00000000 #define EMAC_MR1_JPSM 0x00000000
#define EMAC_MR1_MWSW_001 0x00000000
#define EMAC_MR1_BASE(opb) (EMAC_MR1_TFS_2K | EMAC_MR1_TR0_MULT) #define EMAC_MR1_BASE(opb) (EMAC_MR1_TFS_2K | EMAC_MR1_TR0_MULT)
#else #else
#define EMAC_MR1_RFS_4K 0x00180000 #define EMAC_MR1_RFS_4K 0x00180000
...@@ -130,7 +131,7 @@ struct emac_regs { ...@@ -130,7 +131,7 @@ struct emac_regs {
(freq) <= 83 ? EMAC_MR1_OBCI_83 : \ (freq) <= 83 ? EMAC_MR1_OBCI_83 : \
(freq) <= 100 ? EMAC_MR1_OBCI_100 : EMAC_MR1_OBCI_100P) (freq) <= 100 ? EMAC_MR1_OBCI_100 : EMAC_MR1_OBCI_100P)
#define EMAC_MR1_BASE(opb) (EMAC_MR1_TFS_2K | EMAC_MR1_TR | \ #define EMAC_MR1_BASE(opb) (EMAC_MR1_TFS_2K | EMAC_MR1_TR | \
EMAC_MR1_MWSW_001 | EMAC_MR1_OBCI(opb)) EMAC_MR1_OBCI(opb))
#endif #endif
/* EMACx_TMR0 */ /* EMACx_TMR0 */
......
...@@ -408,7 +408,7 @@ static int emac_configure(struct ocp_enet_private *dev) ...@@ -408,7 +408,7 @@ static int emac_configure(struct ocp_enet_private *dev)
/* Mode register */ /* Mode register */
r = EMAC_MR1_BASE(emac_opb_mhz()) | EMAC_MR1_VLE | EMAC_MR1_IST; r = EMAC_MR1_BASE(emac_opb_mhz()) | EMAC_MR1_VLE | EMAC_MR1_IST;
if (dev->phy.duplex == DUPLEX_FULL) if (dev->phy.duplex == DUPLEX_FULL)
r |= EMAC_MR1_FDE; r |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001;
dev->stop_timeout = STOP_TIMEOUT_10; dev->stop_timeout = STOP_TIMEOUT_10;
switch (dev->phy.speed) { switch (dev->phy.speed) {
case SPEED_1000: case SPEED_1000:
......
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