Commit 39455e17 authored by Ian Abbott's avatar Ian Abbott Committed by Greg Kroah-Hartman

staging: comedi: amplc_pci230: reduce indentation in pci230_ai_start()

Signed-off-by: default avatarIan Abbott <abbotti@mev.co.uk>
Reviewed-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent a6303f15
...@@ -1928,139 +1928,134 @@ static void pci230_ai_start(struct comedi_device *dev, ...@@ -1928,139 +1928,134 @@ static void pci230_ai_start(struct comedi_device *dev,
async->events |= COMEDI_CB_EOA; async->events |= COMEDI_CB_EOA;
pci230_ai_stop(dev, s); pci230_ai_stop(dev, s);
comedi_event(dev, s); comedi_event(dev, s);
} else { return;
/* Enable ADC FIFO trigger level interrupt. */ }
spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
devpriv->int_en |= PCI230_INT_ADC;
devpriv->ier |= PCI230_INT_ADC;
outb(devpriv->ier, dev->iobase + PCI230_INT_SCE);
spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
/* /* Enable ADC FIFO trigger level interrupt. */
* Update conversion trigger source which is currently set spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
* to CT2 output, which is currently stuck high. devpriv->int_en |= PCI230_INT_ADC;
*/ devpriv->ier |= PCI230_INT_ADC;
switch (cmd->convert_src) { outb(devpriv->ier, dev->iobase + PCI230_INT_SCE);
default: spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
conv = PCI230_ADC_TRIG_NONE;
break; /*
case TRIG_TIMER: * Update conversion trigger source which is currently set
/* Using CT2 output. */ * to CT2 output, which is currently stuck high.
conv = PCI230_ADC_TRIG_Z2CT2; */
break; switch (cmd->convert_src) {
case TRIG_EXT: default:
if (cmd->convert_arg & CR_EDGE) { conv = PCI230_ADC_TRIG_NONE;
if ((cmd->convert_arg & CR_INVERT) == 0) { break;
/* Trigger on +ve edge. */ case TRIG_TIMER:
conv = PCI230_ADC_TRIG_EXTP; /* Using CT2 output. */
} else { conv = PCI230_ADC_TRIG_Z2CT2;
/* Trigger on -ve edge. */ break;
conv = PCI230_ADC_TRIG_EXTN; case TRIG_EXT:
} if (cmd->convert_arg & CR_EDGE) {
if ((cmd->convert_arg & CR_INVERT) == 0) {
/* Trigger on +ve edge. */
conv = PCI230_ADC_TRIG_EXTP;
} else { } else {
/* Backwards compatibility. */ /* Trigger on -ve edge. */
if (cmd->convert_arg) { conv = PCI230_ADC_TRIG_EXTN;
/* Trigger on +ve edge. */ }
conv = PCI230_ADC_TRIG_EXTP; } else {
} else { /* Backwards compatibility. */
/* Trigger on -ve edge. */ if (cmd->convert_arg) {
conv = PCI230_ADC_TRIG_EXTN; /* Trigger on +ve edge. */
} conv = PCI230_ADC_TRIG_EXTP;
} else {
/* Trigger on -ve edge. */
conv = PCI230_ADC_TRIG_EXTN;
} }
break;
case TRIG_INT:
/*
* Use CT2 output for software trigger due to problems
* in differential mode on PCI230/260.
*/
conv = PCI230_ADC_TRIG_Z2CT2;
break;
} }
devpriv->adccon = break;
(devpriv->adccon & ~PCI230_ADC_TRIG_MASK) | conv; case TRIG_INT:
outw(devpriv->adccon, devpriv->daqio + PCI230_ADCCON);
if (cmd->convert_src == TRIG_INT)
async->inttrig = pci230_ai_inttrig_convert;
/* /*
* Update FIFO interrupt trigger level, which is currently * Use CT2 output for software trigger due to problems
* set to "full". * in differential mode on PCI230/260.
*/ */
pci230_ai_update_fifo_trigger_level(dev, s); conv = PCI230_ADC_TRIG_Z2CT2;
if (cmd->convert_src == TRIG_TIMER) { break;
/* Update timer gates. */ }
unsigned char zgat; devpriv->adccon = (devpriv->adccon & ~PCI230_ADC_TRIG_MASK) | conv;
outw(devpriv->adccon, devpriv->daqio + PCI230_ADCCON);
if (cmd->convert_src == TRIG_INT)
async->inttrig = pci230_ai_inttrig_convert;
/*
* Update FIFO interrupt trigger level, which is currently
* set to "full".
*/
pci230_ai_update_fifo_trigger_level(dev, s);
if (cmd->convert_src == TRIG_TIMER) {
/* Update timer gates. */
unsigned char zgat;
if (cmd->scan_begin_src != TRIG_FOLLOW) { if (cmd->scan_begin_src != TRIG_FOLLOW) {
/*
* Conversion timer CT2 needs to be gated by
* inverted output of monostable CT2.
*/
zgat = GAT_CONFIG(2, GAT_NOUTNM2);
} else {
/*
* Conversion timer CT2 needs to be gated on
* continuously.
*/
zgat = GAT_CONFIG(2, GAT_VCC);
}
outb(zgat, dev->iobase + PCI230_ZGAT_SCE);
if (cmd->scan_begin_src != TRIG_FOLLOW) {
/* Set monostable CT0 trigger source. */
switch (cmd->scan_begin_src) {
default:
zgat = GAT_CONFIG(0, GAT_VCC);
break;
case TRIG_EXT:
/* /*
* Conversion timer CT2 needs to be gated by * For CT0 on PCI230, the external trigger
* inverted output of monostable CT2. * (gate) signal comes from PPC0, which is
* channel 16 of the DIO subdevice. The
* application needs to configure this as an
* input in order to use it as an external scan
* trigger.
*/ */
zgat = GAT_CONFIG(2, GAT_NOUTNM2); zgat = GAT_CONFIG(0, GAT_EXT);
} else { break;
case TRIG_TIMER:
/* /*
* Conversion timer CT2 needs to be gated on * Monostable CT0 triggered by rising edge on
* continuously. * inverted output of CT1 (falling edge on CT1).
*/ */
zgat = GAT_CONFIG(2, GAT_VCC); zgat = GAT_CONFIG(0, GAT_NOUTNM2);
break;
case TRIG_INT:
/*
* Monostable CT0 is triggered by inttrig
* function waggling the CT0 gate source.
*/
zgat = GAT_CONFIG(0, GAT_VCC);
break;
} }
outb(zgat, dev->iobase + PCI230_ZGAT_SCE); outb(zgat, dev->iobase + PCI230_ZGAT_SCE);
if (cmd->scan_begin_src != TRIG_FOLLOW) { switch (cmd->scan_begin_src) {
/* Set monostable CT0 trigger source. */ case TRIG_TIMER:
switch (cmd->scan_begin_src) { /*
default: * Scan period timer CT1 needs to be
zgat = GAT_CONFIG(0, GAT_VCC); * gated on to start counting.
break; */
case TRIG_EXT: zgat = GAT_CONFIG(1, GAT_VCC);
/*
* For CT0 on PCI230, the external
* trigger (gate) signal comes from
* PPC0, which is channel 16 of the DIO
* subdevice. The application needs to
* configure this as an input in order
* to use it as an external scan
* trigger.
*/
zgat = GAT_CONFIG(0, GAT_EXT);
break;
case TRIG_TIMER:
/*
* Monostable CT0 triggered by rising
* edge on inverted output of CT1
* (falling edge on CT1).
*/
zgat = GAT_CONFIG(0, GAT_NOUTNM2);
break;
case TRIG_INT:
/*
* Monostable CT0 is triggered by
* inttrig function waggling the CT0
* gate source.
*/
zgat = GAT_CONFIG(0, GAT_VCC);
break;
}
outb(zgat, dev->iobase + PCI230_ZGAT_SCE); outb(zgat, dev->iobase + PCI230_ZGAT_SCE);
switch (cmd->scan_begin_src) { break;
case TRIG_TIMER: case TRIG_INT:
/* async->inttrig = pci230_ai_inttrig_scan_begin;
* Scan period timer CT1 needs to be break;
* gated on to start counting.
*/
zgat = GAT_CONFIG(1, GAT_VCC);
outb(zgat,
dev->iobase + PCI230_ZGAT_SCE);
break;
case TRIG_INT:
async->inttrig =
pci230_ai_inttrig_scan_begin;
break;
}
} }
} else if (cmd->convert_src != TRIG_INT) {
/* No longer need Z2-CT2. */
pci230_release_shared(dev, RES_Z2CT2, OWNER_AICMD);
} }
} else if (cmd->convert_src != TRIG_INT) {
/* No longer need Z2-CT2. */
pci230_release_shared(dev, RES_Z2CT2, OWNER_AICMD);
} }
} }
......
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