[ARM PATCH] 1210/1: PXA register mapping simplification

This allows us to use io_p2v() and io_vp2() within assembly code.
Also looks nicer and simpler

arch/arm/kernel/debug.S

@@ -216,7 +216,7 @@
 		mrc	p15, 0, \rx, c1, c0
 		tst	\rx, #1			@ MMU enabled?
 		moveq	\rx, #0x40000000		@ physical
-		movne	\rx, #0xfc000000	@ virtual
+		movne	\rx, #io_p2v(0x40000000)	@ virtual
 		orr	\rx, \rx, #0x00100000
 		.endm
 

arch/arm/kernel/entry-armv.S

@@ -590,7 +590,7 @@ ENTRY(anakin_active_irqs)
 		.endm
 
 		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
-		mov	\base, #0xfc000000		@ IIR Ctl = 0xfcd00000
+		mov	\base, #io_p2v(0x40000000)	@ IIR Ctl = 0x40d00000
 		add	\base, \base, #0x00d00000
 		ldr	\irqstat, [\base, #0]		@ ICIP
 		ldr	\irqnr, [\base, #4]		@ ICMR

arch/arm/mach-pxa/generic.c

@@ -91,9 +91,10 @@ static struct map_desc standard_io_desc[] __initdata = {
  /* virtual     physical    length      type */
   { 0xf6000000, 0x20000000, 0x01000000, MT_DEVICE }, /* PCMCIA0 IO */
   { 0xf7000000, 0x30000000, 0x01000000, MT_DEVICE }, /* PCMCIA1 IO */
-  { 0xfc000000, 0x40000000, 0x01400000, MT_DEVICE }, /* Devs */
-  { 0xfe000000, 0x44000000, 0x00200000, MT_DEVICE }, /* LCD */
-  { 0xff000000, 0x48000000, 0x00200000, MT_DEVICE }  /* Mem Ctl */
+  { 0xf8000000, 0x40000000, 0x01400000, MT_DEVICE }, /* Devs */
+  { 0xfa000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */
+  { 0xfc000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */
+  { 0xff000000, 0x00000000, 0x00100000, MT_DEVICE }  /* UNCACHED_PHYS_0 */
 };
 
 void __init pxa_map_io(void)

arch/arm/mach-pxa/lubbock.c

@@ -146,7 +146,7 @@ static void __init lubbock_map_io(void)
 
 MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform")
 	MAINTAINER("MontaVista Software Inc.")
-	BOOT_MEM(0xa0000000, 0x40000000, 0xfc000000)
+	BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
 	MAPIO(lubbock_map_io)
 	INITIRQ(lubbock_init_irq)
 MACHINE_END

include/asm-arm/arch-pxa/hardware.h

@@ -27,17 +27,27 @@
 
 
 /*
- * Intel PXA internal I/O mappings
+ * We requires absolute addresses.
  */
+#define PCIO_BASE		0
 
-#define io_p2v(x)	\
-	(((x) < 0x44000000) ? ((x) - 0x40000000 + 0xfc000000) :	\
-	 ((x) < 0x48000000) ? ((x) - 0x44000000 + 0xfe000000) :	\
-	 		      ((x) - 0x48000000 + 0xff000000))
-#define io_v2p( x )	\
-	(((x) < 0xfe000000) ? ((x) - 0xfc000000 + 0x40000000) :	\
-	 ((x) < 0xff000000) ? ((x) - 0xfe000000 + 0x44000000) :	\
-	 		      ((x) - 0xff000000 + 0x48000000))
+/*
+ * Workarounds for at least 2 errata so far require this.
+ * The mapping is set in mach-pxa/generic.c.
+ */
+#define UNCACHED_PHYS_0		0xff000000
+#define UNCACHED_ADDR		UNCACHED_PHYS_0
+
+/*
+ * Intel PXA internal I/O mappings:
+ *
+ * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff
+ * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff
+ * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff
+ */
+
+#define io_p2v(x)	( ((x) | 0xbe000000) ^ (~((x) >> 1) & 0x06000000) )
+#define io_v2p( x )	( ((x) & 0x41ffffff) ^ ( ((x) & 0x06000000) << 1) )
 
 #ifndef __ASSEMBLY__
 
@@ -51,7 +61,7 @@
  * doesn't guess this by itself.
  */
 #include <asm/types.h>
-typedef struct { volatile u32 offset[1024]; } __regbase;
+typedef struct { volatile u32 offset[4096]; } __regbase;
 # define __REGP(x)	((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
 # define __REG(x)	__REGP(io_p2v(x))
 #endif
@@ -93,5 +103,6 @@ extern unsigned int get_lclk_frequency_10khz(void);
 
 #include "lubbock.h"
 #include "idp.h"
+#include "cerf.h"
 
 #endif  /* _ASM_ARCH_HARDWARE_H */