[PATCH] ppc64: Make the DART "iommu" code more generic

The "DART" iommu used on Apple U3 chipset will appear into 3rd party
products soon, thus the code shouldn't be named "pmac_*" anymore.

Also, the explicit config option is no longer needed, there is no
reason to build a PowerMac kernel without the iommu support, and
it can always be disabled at runtime with a cmdline option for
testing or debugging.

This patch do the appropriate renaming and makes the config option
implicit & selected when pmac support is included.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/ppc64/Kconfig

@@ -78,6 +78,7 @@ config PPC_PMAC
 	bool "  Apple G5 based machines"
 	default y
 	select ADB_PMU
+	select U3_DART
 
 config PPC
 	bool
@@ -109,16 +110,10 @@ config PPC_SPLPAR
 	  processors, that is, which share physical processors between
 	  two or more partitions.
 
-config PMAC_DART
-	bool "Enable DART/IOMMU on PowerMac (allow >2G of RAM)"
-	depends on PPC_PMAC
-	depends on EXPERIMENTAL
+config U3_DART
+	bool 
+	depends on PPC_MULTIPLATFORM
 	default n
-	help
-	  Enabling DART makes it possible to boot a PowerMac G5 with more
-	  than 2GB of memory. Note that the code is very new and untested
-	  at this time, so it has to be considered experimental. Enabling
-	  this might result in data loss.
 
 config PPC_PMAC64
 	bool

arch/ppc64/kernel/Makefile

@@ -49,7 +49,7 @@ obj-$(CONFIG_HVCS)		+= hvcserver.o
 obj-$(CONFIG_PPC_PMAC)		+= pmac_setup.o pmac_feature.o pmac_pci.o \
 				   pmac_time.o pmac_nvram.o pmac_low_i2c.o \
 				   open_pic_u3.o
-obj-$(CONFIG_PMAC_DART)		+= pmac_iommu.o
+obj-$(CONFIG_U3_DART)		+= u3_iommu.o
 
 ifdef CONFIG_SMP
 obj-$(CONFIG_PPC_PMAC)		+= pmac_smp.o smp-tbsync.o

arch/ppc64/kernel/pmac.h

@@ -29,6 +29,4 @@ extern void pmac_ide_init_hwif_ports(hw_regs_t *hw,
 
 extern void pmac_nvram_init(void);
 
-extern void pmac_iommu_alloc(void);
-
 #endif /* __PMAC_H__ */

arch/ppc64/kernel/pmac_pci.c

@@ -664,9 +664,7 @@ void __init pmac_pcibios_fixup(void)
 
 	pci_fix_bus_sysdata();
 
-#ifdef CONFIG_PMAC_DART
-	iommu_setup_pmac();
-#endif /* CONFIG_PMAC_DART */
+	iommu_setup_u3();
 
 }
 

arch/ppc64/kernel/pmac_setup.c

@@ -447,16 +447,6 @@ static int __init pmac_probe(int platform)
 	if (platform != PLATFORM_POWERMAC)
 		return 0;
 
-#ifdef CONFIG_PMAC_DART
-	/*
-	 * On U3, the DART (iommu) must be allocated now since it
-	 * has an impact on htab_initialize (due to the large page it
-	 * occupies having to be broken up so the DART itself is not
-	 * part of the cacheable linar mapping
-	 */
-	pmac_iommu_alloc();
-#endif /* CONFIG_PMAC_DART */
-
 	return 1;
 }
 

arch/ppc64/kernel/prom_init.c

@@ -423,13 +423,6 @@ static void __init early_cmdline_parse(void)
 		else if (!strncmp(opt, RELOC("force"), 5))
 			RELOC(iommu_force_on) = 1;
 	}
-
-#ifndef CONFIG_PMAC_DART
-	if (RELOC(of_platform) == PLATFORM_POWERMAC) {
-		RELOC(ppc64_iommu_off) = 1;
-		prom_printf("DART disabled on PowerMac !\n");
-	}
-#endif
 }
 
 /*

arch/ppc64/kernel/setup.c

@@ -50,6 +50,7 @@
 #include <asm/setup.h>
 #include <asm/system.h>
 #include <asm/rtas.h>
+#include <asm/iommu.h>
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -405,6 +406,16 @@ void __init early_setup(unsigned long dt_ptr)
 
 	DBG("Found, Initializing memory management...\n");
 
+#ifdef CONFIG_U3_DART
+	/*
+	 * On U3, the DART (iommu) must be allocated now since it
+	 * has an impact on htab_initialize (due to the large page it
+	 * occupies having to be broken up so the DART itself is not
+	 * part of the cacheable linar mapping
+	 */
+	alloc_u3_dart_table();
+#endif /* CONFIG_U3_DART */
+
 	/*
 	 * Initialize stab / SLB management
 	 */

arch/ppc64/kernel/pmac_iommu.c → arch/ppc64/kernel/u3_iommu.c

 /*
- * arch/ppc64/kernel/pmac_iommu.c
+ * arch/ppc64/kernel/u3_iommu.c
  *
  * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
  *
@@ -7,7 +7,7 @@
  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
  * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
  *
- * Dynamic DMA mapping support, PowerMac G5 (DART)-specific parts.
+ * Dynamic DMA mapping support, Apple U3 & IBM CPC925 "DART" iommu.
  *
  * 
  * This program is free software; you can redistribute it and/or modify
@@ -89,7 +89,7 @@ static unsigned int *dart;
 /* Dummy val that entries are set to when unused */
 static unsigned int dart_emptyval;
 
-static struct iommu_table iommu_table_pmac;
+static struct iommu_table iommu_table_u3;
 static int dart_dirty;
 
 #define DBG(...)
@@ -141,7 +141,7 @@ static void dart_flush(struct iommu_table *tbl)
 	dart_dirty = 0;
 }
 
-static void dart_build_pmac(struct iommu_table *tbl, long index, 
+static void dart_build(struct iommu_table *tbl, long index, 
 		       long npages, unsigned long uaddr,
 		       enum dma_data_direction direction)
 {
@@ -152,7 +152,7 @@ static void dart_build_pmac(struct iommu_table *tbl, long index,
 
 	dp = ((unsigned int*)tbl->it_base) + index;
 	
-	/* On pmac, all memory is contigous, so we can move this
+	/* On U3, all memory is contigous, so we can move this
 	 * out of the loop.
 	 */
 	while (npages--) {
@@ -168,7 +168,7 @@ static void dart_build_pmac(struct iommu_table *tbl, long index,
 }
 
 
-static void dart_free_pmac(struct iommu_table *tbl, long index, long npages)
+static void dart_free(struct iommu_table *tbl, long index, long npages)
 {
 	unsigned int *dp;
 	
@@ -239,32 +239,32 @@ static int dart_init(struct device_node *dart_node)
 	/* Invalidate DART to get rid of possible stale TLBs */
 	dart_tlb_invalidate_all();
 
-	iommu_table_pmac.it_busno = 0;
+	iommu_table_u3.it_busno = 0;
 	
 	/* Units of tce entries */
-	iommu_table_pmac.it_offset = 0;
+	iommu_table_u3.it_offset = 0;
 	
 	/* Set the tce table size - measured in pages */
-	iommu_table_pmac.it_size = dart_tablesize >> PAGE_SHIFT;
+	iommu_table_u3.it_size = dart_tablesize >> PAGE_SHIFT;
 
 	/* Initialize the common IOMMU code */
-	iommu_table_pmac.it_base = (unsigned long)dart_vbase;
-	iommu_table_pmac.it_index = 0;
-	iommu_table_pmac.it_blocksize = 1;
-	iommu_table_pmac.it_entrysize = sizeof(u32);
-	iommu_init_table(&iommu_table_pmac);
+	iommu_table_u3.it_base = (unsigned long)dart_vbase;
+	iommu_table_u3.it_index = 0;
+	iommu_table_u3.it_blocksize = 1;
+	iommu_table_u3.it_entrysize = sizeof(u32);
+	iommu_init_table(&iommu_table_u3);
 
 	/* Reserve the last page of the DART to avoid possible prefetch
 	 * past the DART mapped area
 	 */
-	set_bit(iommu_table_pmac.it_mapsize - 1, iommu_table_pmac.it_map);
+	set_bit(iommu_table_u3.it_mapsize - 1, iommu_table_u3.it_map);
 
-	printk(KERN_INFO "U3-DART IOMMU initialized\n");
+	printk(KERN_INFO "U3/CPC925 DART IOMMU initialized\n");
 
 	return 0;
 }
 
-void iommu_setup_pmac(void)
+void iommu_setup_u3(void)
 {
 	struct pci_dev *dev = NULL;
 	struct device_node *dn;
@@ -275,8 +275,8 @@ void iommu_setup_pmac(void)
 		return;
 
 	/* Setup low level TCE operations for the core IOMMU code */
-	ppc_md.tce_build = dart_build_pmac;
-	ppc_md.tce_free  = dart_free_pmac;
+	ppc_md.tce_build = dart_build;
+	ppc_md.tce_free  = dart_free;
 	ppc_md.tce_flush = dart_flush;
 
 	/* Initialize the DART HW */
@@ -296,11 +296,11 @@ void iommu_setup_pmac(void)
 		 */
 		struct device_node *dn = pci_device_to_OF_node(dev);
 		if (dn)
-			dn->iommu_table = &iommu_table_pmac;
+			dn->iommu_table = &iommu_table_u3;
 	}
 }
 
-void __init pmac_iommu_alloc(void)
+void __init alloc_u3_dart_table(void)
 {
 	/* Only reserve DART space if machine has more than 2GB of RAM
 	 * or if requested with iommu=on on cmdline.

arch/ppc64/mm/hash_utils.c

@@ -71,9 +71,9 @@
  *
  */
 
-#ifdef CONFIG_PMAC_DART
+#ifdef CONFIG_U3_DART
 extern unsigned long dart_tablebase;
-#endif /* CONFIG_PMAC_DART */
+#endif /* CONFIG_U3_DART */
 
 HTAB htab_data = {NULL, 0, 0, 0, 0};
 
@@ -203,7 +203,7 @@ void __init htab_initialize(void)
 
 		DBG("creating mapping for region: %lx : %lx\n", base, size);
 
-#ifdef CONFIG_PMAC_DART
+#ifdef CONFIG_U3_DART
 		/* Do not map the DART space. Fortunately, it will be aligned
 		 * in such a way that it will not cross two lmb regions and will
 		 * fit within a single 16Mb page.
@@ -223,7 +223,7 @@ void __init htab_initialize(void)
 						   mode_rw, use_largepages);
 			continue;
 		}
-#endif /* CONFIG_PMAC_DART */
+#endif /* CONFIG_U3_DART */
 		create_pte_mapping(base, base + size, mode_rw, use_largepages);
 	}
 	DBG(" <- htab_initialize()\n");

include/asm-ppc64/iommu.h

@@ -108,7 +108,7 @@ struct scatterlist;
 
 /* Walks all buses and creates iommu tables */
 extern void iommu_setup_pSeries(void);
-extern void iommu_setup_pmac(void);
+extern void iommu_setup_u3(void);
 
 /* Creates table for an individual device node */
 extern void iommu_devnode_init(struct device_node *dn);
@@ -155,6 +155,8 @@ extern void tce_init_iSeries(void);
 extern void pci_iommu_init(void);
 extern void pci_dma_init_direct(void);
 
+extern void alloc_u3_dart_table(void);
+
 extern int ppc64_iommu_off;
 
 #endif /* _ASM_IOMMU_H */