[PATCH] FRV: pagetable handling fixes

The attached patch makes the following fixes to the frv arch:

 (1) pte_offset() should no longer be around; the fault handler should use
     pte_offset_kernel() instead when fixing up vmalloc misses.

 (2) The PGEs/PMEs do not hold PTEs. They have greater address resolution and
     fewer control bits.

 (3) The data access error pattern in ESR15.EC should be 10000 not 10100.
Signed-Off-By: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/frv/mm/fault.c

@@ -315,7 +315,7 @@ asmlinkage void do_page_fault(int datammu, unsigned long esr0, unsigned long ear
 			goto no_context;
 		set_pmd(pmd, *pmd_k);
 
-		pte_k = pte_offset(pmd_k, ear0);
+		pte_k = pte_offset_kernel(pmd_k, ear0);
 		if (!pte_present(*pte_k))
 			goto no_context;
 		return;

arch/frv/mm/pgalloc.c

@@ -52,7 +52,7 @@ void __set_pmd(pmd_t *pmdptr, unsigned long pmd)
 		memset(__ste_p, 0, PME_SIZE);
 	}
 	else {
-		BUG_ON(pmd & xAMPRx_SS);
+		BUG_ON(pmd & (0x3f00 | xAMPRx_SS | 0xe));
 
 		for (loop = PME_SIZE; loop > 0; loop -= 4) {
 			*__ste_p++ = pmd;

include/asm-frv/pgtable.h

@@ -255,7 +255,7 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
 #define PAGE_KERNEL_RO		MAKE_GLOBAL(__PAGE_KERNEL_RO)
 #define PAGE_KERNEL_NOCACHE	MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
 
-#define _PAGE_TABLE		(_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_ACCESSED)
+#define _PAGE_TABLE		(_PAGE_PRESENT | xAMPRx_SS_16Kb)
 
 #ifndef __ASSEMBLY__
 
@@ -385,7 +385,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 
 /* Find an entry in the third-level page table.. */
 #define __pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset(dir, address) ((pte_t *) pmd_page(*(dir)) + __pte_index(address))
 
 /*
  * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]

include/asm-frv/spr-regs.h

@@ -204,7 +204,7 @@
 #define ESRx_EC_PRIV_INSN	0x00000008	/* - privileged_instruction */
 #define ESRx_EC_ILL_INSN	0x0000000a	/* - illegal_instruction */
 #define ESRx_EC_MP_EXCEP	0x0000001c	/* - mp_exception */
-#define ESRx_EC_DATA_ACCESS	0x00000024	/* - data_access_error */
+#define ESRx_EC_DATA_ACCESS	0x00000020	/* - data_access_error */
 #define ESRx_EC_DIVISION	0x00000026	/* - division_exception */
 #define ESRx_EC_ITLB_MISS	0x00000034	/* - instruction_access_TLB_miss */
 #define ESRx_EC_DTLB_MISS	0x00000036	/* - data_access_TLB_miss */