Commit 3b2aa89e authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Sascha Hauer

spi/imx: save the spi chip select in config struct, not the gpio to use

This prepares adding support for imx51's eCSPI.  This IP has seperate
control and config bits for all four supported chip selects, so the
config routine needs to know which chip select is being used even if
the chipselect is realized by a gpio.
Acked-by: default avatarJason Wang <jason77.wang@gmail.com>
Acked-by: default avatarGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 1723e66b
...@@ -56,7 +56,7 @@ struct spi_imx_config { ...@@ -56,7 +56,7 @@ struct spi_imx_config {
unsigned int speed_hz; unsigned int speed_hz;
unsigned int bpw; unsigned int bpw;
unsigned int mode; unsigned int mode;
int cs; u8 cs;
}; };
enum spi_imx_devtype { enum spi_imx_devtype {
...@@ -218,6 +218,7 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, ...@@ -218,6 +218,7 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
struct spi_imx_config *config) struct spi_imx_config *config)
{ {
unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
int cs = spi_imx->chipselect[config->cs];
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
MX31_CSPICTRL_DR_SHIFT; MX31_CSPICTRL_DR_SHIFT;
...@@ -230,9 +231,8 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx, ...@@ -230,9 +231,8 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
reg |= MX31_CSPICTRL_POL; reg |= MX31_CSPICTRL_POL;
if (config->mode & SPI_CS_HIGH) if (config->mode & SPI_CS_HIGH)
reg |= MX31_CSPICTRL_SSPOL; reg |= MX31_CSPICTRL_SSPOL;
if (config->cs < 0) { if (cs < 0)
reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT; reg |= (cs + 32) << MX31_CSPICTRL_CS_SHIFT;
}
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
...@@ -243,6 +243,7 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, ...@@ -243,6 +243,7 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx,
struct spi_imx_config *config) struct spi_imx_config *config)
{ {
unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
int cs = spi_imx->chipselect[config->cs];
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
MX31_CSPICTRL_DR_SHIFT; MX31_CSPICTRL_DR_SHIFT;
...@@ -256,8 +257,8 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx, ...@@ -256,8 +257,8 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx,
reg |= MX31_CSPICTRL_POL; reg |= MX31_CSPICTRL_POL;
if (config->mode & SPI_CS_HIGH) if (config->mode & SPI_CS_HIGH)
reg |= MX31_CSPICTRL_SSPOL; reg |= MX31_CSPICTRL_SSPOL;
if (config->cs < 0) if (cs < 0)
reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT; reg |= (cs + 32) << MX35_CSPICTRL_CS_SHIFT;
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
...@@ -314,6 +315,7 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, ...@@ -314,6 +315,7 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx,
struct spi_imx_config *config) struct spi_imx_config *config)
{ {
unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER; unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER;
int cs = spi_imx->chipselect[config->cs];
reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) << reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) <<
MX27_CSPICTRL_DR_SHIFT; MX27_CSPICTRL_DR_SHIFT;
...@@ -325,8 +327,8 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx, ...@@ -325,8 +327,8 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx,
reg |= MX27_CSPICTRL_POL; reg |= MX27_CSPICTRL_POL;
if (config->mode & SPI_CS_HIGH) if (config->mode & SPI_CS_HIGH)
reg |= MX27_CSPICTRL_SSPOL; reg |= MX27_CSPICTRL_SSPOL;
if (config->cs < 0) if (cs < 0)
reg |= (config->cs + 32) << MX27_CSPICTRL_CS_SHIFT; reg |= (cs + 32) << MX27_CSPICTRL_CS_SHIFT;
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
...@@ -510,7 +512,7 @@ static int spi_imx_setupxfer(struct spi_device *spi, ...@@ -510,7 +512,7 @@ static int spi_imx_setupxfer(struct spi_device *spi,
config.bpw = t ? t->bits_per_word : spi->bits_per_word; config.bpw = t ? t->bits_per_word : spi->bits_per_word;
config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; config.speed_hz = t ? t->speed_hz : spi->max_speed_hz;
config.mode = spi->mode; config.mode = spi->mode;
config.cs = spi_imx->chipselect[spi->chip_select]; config.cs = spi->chip_select;
if (!config.speed_hz) if (!config.speed_hz)
config.speed_hz = spi->max_speed_hz; config.speed_hz = spi->max_speed_hz;
......
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