Commit 3b758a68 authored by Arend van Spriel's avatar Arend van Spriel Committed by John W. Linville

brcm80211: smac: remove mapped core related function from aiutils.c

In aiutils.c the selected core was maintained by its index number. This
is obsolete using BCMA functions so several functions using that index
have been removed.
Reviewed-by: default avatarPieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: default avatarAlwin Beukers <alwin@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarFranky Lin <frankyl@broadcom.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent e3d5af56
...@@ -477,50 +477,6 @@ static void ai_scan(struct si_pub *sih, struct bcma_bus *bus) ...@@ -477,50 +477,6 @@ static void ai_scan(struct si_pub *sih, struct bcma_bus *bus)
} }
} }
static struct bcma_device *ai_find_bcma_core(struct si_pub *sih, uint coreidx)
{
struct si_info *sii = (struct si_info *)sih;
struct bcma_device *core;
list_for_each_entry(core, &sii->icbus->cores, list) {
if (core->core_index == coreidx)
return core;
}
return NULL;
}
/*
* This function changes the logical "focus" to the indicated core.
* Return the current core's virtual address. Since each core starts with the
* same set of registers (BIST, clock control, etc), the returned address
* contains the first register of this 'common' register block (not to be
* confused with 'common core').
*/
void __iomem *ai_setcoreidx(struct si_pub *sih, uint coreidx)
{
struct si_info *sii = (struct si_info *)sih;
struct bcma_device *core;
if (sii->curidx != coreidx) {
core = ai_find_bcma_core(sih, coreidx);
if (core == NULL)
return NULL;
(void)bcma_aread32(core, BCMA_IOST);
sii->curidx = coreidx;
}
return sii->curmap;
}
uint ai_corerev(struct si_pub *sih)
{
struct si_info *sii;
u32 cib;
sii = (struct si_info *)sih;
cib = sii->cib[sii->curidx];
return (cib & CIB_REV_MASK) >> CIB_REV_SHIFT;
}
/* return true if PCIE capability exists in the pci config space */ /* return true if PCIE capability exists in the pci config space */
static bool ai_ispcie(struct si_info *sii) static bool ai_ispcie(struct si_info *sii)
{ {
...@@ -579,9 +535,8 @@ ai_buscore_setup(struct si_info *sii, struct bcma_device *cc) ...@@ -579,9 +535,8 @@ ai_buscore_setup(struct si_info *sii, struct bcma_device *cc)
for (i = 0; i < sii->numcores; i++) { for (i = 0; i < sii->numcores; i++) {
uint cid, crev; uint cid, crev;
ai_setcoreidx(&sii->pub, i); cid = sii->coreid[i];
cid = ai_coreid(&sii->pub); crev = (sii->cib[i] & CIB_REV_MASK) >> CIB_REV_SHIFT;
crev = ai_corerev(&sii->pub);
if (cid == PCI_CORE_ID) { if (cid == PCI_CORE_ID) {
pciidx = i; pciidx = i;
...@@ -804,22 +759,6 @@ void ai_detach(struct si_pub *sih) ...@@ -804,22 +759,6 @@ void ai_detach(struct si_pub *sih)
kfree(sii); kfree(sii);
} }
uint ai_coreid(struct si_pub *sih)
{
struct si_info *sii;
sii = (struct si_info *)sih;
return sii->coreid[sii->curidx];
}
uint ai_coreidx(struct si_pub *sih)
{
struct si_info *sii;
sii = (struct si_info *)sih;
return sii->curidx;
}
/* return index of coreid or BADIDX if not found */ /* return index of coreid or BADIDX if not found */
struct bcma_device *ai_findcore(struct si_pub *sih, u16 coreid, u16 coreunit) struct bcma_device *ai_findcore(struct si_pub *sih, u16 coreid, u16 coreunit)
{ {
...@@ -842,45 +781,17 @@ struct bcma_device *ai_findcore(struct si_pub *sih, u16 coreid, u16 coreunit) ...@@ -842,45 +781,17 @@ struct bcma_device *ai_findcore(struct si_pub *sih, u16 coreid, u16 coreunit)
} }
/* /*
* This function changes logical "focus" to the indicated core; * read/modify chipcommon core register.
* must be called with interrupts off.
* Moreover, callers should keep interrupts off during switching
* out of and back to d11 core.
*/
void __iomem *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit)
{
struct bcma_device *core;
core = ai_findcore(sih, coreid, coreunit);
if (core == NULL)
return NULL;
return ai_setcoreidx(sih, core->core_index);
}
/*
* Switch to 'coreidx', issue a single arbitrary 32bit register mask&set
* operation, switch back to the original core, and return the new value.
*
* When using the silicon backplane, no fiddling with interrupts or core
* switches is needed.
*
* Also, when using pci/pcie, we can optimize away the core switching for pci
* registers and (on newer pci cores) chipcommon registers.
*/ */
uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val) uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val)
{ {
struct bcma_device *cc; struct bcma_device *cc;
uint origidx = 0;
u32 w; u32 w;
struct si_info *sii; struct si_info *sii;
sii = (struct si_info *)sih; sii = (struct si_info *)sih;
cc = sii->icbus->drv_cc.core; cc = sii->icbus->drv_cc.core;
/* save current core index */
origidx = ai_coreidx(&sii->pub);
/* mask and set */ /* mask and set */
if (mask || val) { if (mask || val) {
bcma_maskset32(cc, regoff, ~mask, val); bcma_maskset32(cc, regoff, ~mask, val);
...@@ -889,9 +800,6 @@ uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val) ...@@ -889,9 +800,6 @@ uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val)
/* readback */ /* readback */
w = bcma_read32(cc, regoff); w = bcma_read32(cc, regoff);
/* restore core index */
ai_setcoreidx(&sii->pub, origidx);
return w; return w;
} }
...@@ -1237,20 +1145,10 @@ void ai_pci_down(struct si_pub *sih) ...@@ -1237,20 +1145,10 @@ void ai_pci_down(struct si_pub *sih)
void ai_pci_setup(struct si_pub *sih, uint coremask) void ai_pci_setup(struct si_pub *sih, uint coremask)
{ {
struct si_info *sii; struct si_info *sii;
struct sbpciregs __iomem *regs = NULL;
u32 w; u32 w;
uint idx = 0;
sii = (struct si_info *)sih; sii = (struct si_info *)sih;
if (PCI(sih)) {
/* get current core index */
idx = sii->curidx;
/* switch over to pci core */
regs = ai_setcoreidx(sih, sii->buscoreidx);
}
/* /*
* Enable sb->pci interrupts. Assume * Enable sb->pci interrupts. Assume
* PCI rev 2.3 support was added in pci core rev 6 and things changed.. * PCI rev 2.3 support was added in pci core rev 6 and things changed..
...@@ -1264,9 +1162,6 @@ void ai_pci_setup(struct si_pub *sih, uint coremask) ...@@ -1264,9 +1162,6 @@ void ai_pci_setup(struct si_pub *sih, uint coremask)
if (PCI(sih)) { if (PCI(sih)) {
pcicore_pci_setup(sii->pch); pcicore_pci_setup(sii->pch);
/* switch back to previous core */
ai_setcoreidx(sih, idx);
} }
} }
...@@ -1276,21 +1171,11 @@ void ai_pci_setup(struct si_pub *sih, uint coremask) ...@@ -1276,21 +1171,11 @@ void ai_pci_setup(struct si_pub *sih, uint coremask)
*/ */
int ai_pci_fixcfg(struct si_pub *sih) int ai_pci_fixcfg(struct si_pub *sih)
{ {
uint origidx;
void __iomem *regs = NULL;
struct si_info *sii = (struct si_info *)sih; struct si_info *sii = (struct si_info *)sih;
/* Fixup PI in SROM shadow area to enable the correct PCI core access */ /* Fixup PI in SROM shadow area to enable the correct PCI core access */
/* save the current index */
origidx = ai_coreidx(&sii->pub);
/* check 'pi' is correct and fix it if not */ /* check 'pi' is correct and fix it if not */
regs = ai_setcore(&sii->pub, ai_get_buscoretype(sih), 0);
pcicore_fixcfg(sii->pch); pcicore_fixcfg(sii->pch);
/* restore the original index */
ai_setcoreidx(&sii->pub, origidx);
pcicore_hwup(sii->pch); pcicore_hwup(sii->pch);
return 0; return 0;
} }
......
...@@ -221,19 +221,12 @@ struct si_info { ...@@ -221,19 +221,12 @@ struct si_info {
/* AMBA Interconnect exported externs */ /* AMBA Interconnect exported externs */
extern struct bcma_device *ai_findcore(struct si_pub *sih, extern struct bcma_device *ai_findcore(struct si_pub *sih,
u16 coreid, u16 coreunit); u16 coreid, u16 coreunit);
extern uint ai_coreidx(struct si_pub *sih);
extern uint ai_corerev(struct si_pub *sih);
extern u32 ai_core_cflags(struct bcma_device *core, u32 mask, u32 val); extern u32 ai_core_cflags(struct bcma_device *core, u32 mask, u32 val);
/* === exported functions === */ /* === exported functions === */
extern struct si_pub *ai_attach(struct bcma_bus *pbus); extern struct si_pub *ai_attach(struct bcma_bus *pbus);
extern void ai_detach(struct si_pub *sih); extern void ai_detach(struct si_pub *sih);
extern uint ai_coreid(struct si_pub *sih);
extern uint ai_corerev(struct si_pub *sih);
extern uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val); extern uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val);
extern uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit);
extern void __iomem *ai_setcoreidx(struct si_pub *sih, uint coreidx);
extern void __iomem *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit);
extern void ai_pci_setup(struct si_pub *sih, uint coremask); extern void ai_pci_setup(struct si_pub *sih, uint coremask);
extern void ai_clkctl_init(struct si_pub *sih); extern void ai_clkctl_init(struct si_pub *sih);
extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih); extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih);
......
...@@ -1953,12 +1953,11 @@ static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw) ...@@ -1953,12 +1953,11 @@ static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
flags |= SICF_PCLKE; flags |= SICF_PCLKE;
/* /*
* TODO: test suspend/resume
*
* AI chip doesn't restore bar0win2 on * AI chip doesn't restore bar0win2 on
* hibernation/resume, need sw fixup * hibernation/resume, need sw fixup
*/ */
if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
(ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
(void)ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
bcma_core_enable(wlc_hw->d11core, flags); bcma_core_enable(wlc_hw->d11core, flags);
brcms_c_mctrl_reset(wlc_hw); brcms_c_mctrl_reset(wlc_hw);
...@@ -4484,8 +4483,6 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core, ...@@ -4484,8 +4483,6 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
wlc_hw->vendorid = pcidev->vendor; wlc_hw->vendorid = pcidev->vendor;
wlc_hw->deviceid = pcidev->device; wlc_hw->deviceid = pcidev->device;
/* set bar0 window to point at D11 core */
(void)ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
wlc_hw->d11core = core; wlc_hw->d11core = core;
wlc_hw->corerev = core->id.rev; wlc_hw->corerev = core->id.rev;
...@@ -4606,7 +4603,7 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core, ...@@ -4606,7 +4603,7 @@ static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
wlc->band->bandunit = j; wlc->band->bandunit = j;
wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
wlc->core->coreidx = ai_coreidx(wlc_hw->sih); wlc->core->coreidx = core->core_index;
wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap)); wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
wlc_hw->machwcap_backup = wlc_hw->machwcap; wlc_hw->machwcap_backup = wlc_hw->machwcap;
...@@ -5055,12 +5052,11 @@ static void brcms_b_hw_up(struct brcms_hardware *wlc_hw) ...@@ -5055,12 +5052,11 @@ static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
ai_pci_fixcfg(wlc_hw->sih); ai_pci_fixcfg(wlc_hw->sih);
/* /*
* TODO: test suspend/resume
*
* AI chip doesn't restore bar0win2 on * AI chip doesn't restore bar0win2 on
* hibernation/resume, need sw fixup * hibernation/resume, need sw fixup
*/ */
if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
(ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
(void)ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
/* /*
* Inform phy that a POR reset has occurred so * Inform phy that a POR reset has occurred so
......
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