Commit 3d12971e authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'imx-dt-4.14' of...

Merge tag 'imx-dt-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Pull "i.MX device tree updates for 4.14" from Shawn Guo:
 - A series from Andrew Lunn updating imx6-rdu2 board to enable
   on-board Marvell switch support.
 - A series from Jagan Teki updating imx6ul-isiot and imx6ul-geam to
   enable audio card and FEC support.
 - Add support for Toradex Ixora V1.1 and Apalis Evaluation Board
   along with some cleanups.
 - Enable DRM display support for imx6ul-evk and imx7d-sdb board.
 - Add i.MX53 based Beckhoff CX9020 board support.
 - Add GPMI NAND and APBH DMA devices for i.MX7 and enables NAND support
   for imx7-colibri board.
 - Enables the ADV7180 analog video decoder sensor connected to the
   IMX6 IPU on various Gateworks Ventana boards.
 - Minor updates on misc boards and some random cleanups.

* tag 'imx-dt-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (47 commits)
  ARM: dts: imx6q-bx50v3: Enable i2c recovery mechanism
  ARM: dts: imx6q-apalis-eval: add support for Apalis Evaluation Board
  ARM: dts: imx6: add support for Toradex Ixora V1.1 carrier board
  ARM: dts: imx6qdl-apalis: imx6q-apalis-ixora: use i2c from dwc hdmi
  ARM: dts: imx6q-apalis-ixora: add camera i2c bus definition
  ARM: dts: imx6q-apalis-ixora: get rid of obsolete fusion comment
  ARM: dts: imx6qdl-apalis: reword cam i2c comment
  ARM: dts: imx6qdl-apalis: imx6q-apalis-ixora: get rid of tegra legacy gen1_i2c comment
  ARM: dts: imx6q-apalis-ixora: combine aliases
  ARM: dts: imx6qdl-apalis: split usdhc1 pinctrl to support 4- and 8-bit
  ARM: dts: imx6q-apalis-ixora: fix usdhc2 pinctrl property
  ARM: dts: imx6ul-liteboard: Support poweroff
  ARM: dts: imx: add CX9020 Embedded PC device tree
  ARM: dts: imx53: add alternative UART2 configuration
  ARM: dts: imx53: add srtc node
  dt-bindings: arm: Add entry for Beckhoff CX9020
  ARM: dts: i.MX25: add RNGB node to dtsi
  ARM: dts: imx6ul-14x14-evk: Remove unrelated pin from ENET group
  ARM: dts: imx7d-sdb: Add flexcan support
  ARM: dts: imx7-colibri: add NAND support
  ...
parents 522a6efe b3766c51
Beckhoff Automation Platforms Device Tree Bindings
--------------------------------------------------
CX9020 Embedded PC
Required root node properties:
- compatible = "bhf,cx9020", "fsl,imx53";
...@@ -47,6 +47,7 @@ avic Shanghai AVIC Optoelectronics Co., Ltd. ...@@ -47,6 +47,7 @@ avic Shanghai AVIC Optoelectronics Co., Ltd.
axentia Axentia Technologies AB axentia Axentia Technologies AB
axis Axis Communications AB axis Axis Communications AB
bananapi BIPAI KEJI LIMITED bananapi BIPAI KEJI LIMITED
bhf Beckhoff Automation GmbH & Co. KG
boe BOE Technology Group Co., Ltd. boe BOE Technology Group Co., Ltd.
bosch Bosch Sensortec GmbH bosch Bosch Sensortec GmbH
boundary Boundary Devices Inc. boundary Boundary Devices Inc.
......
...@@ -343,6 +343,7 @@ dtb-$(CONFIG_SOC_IMX51) += \ ...@@ -343,6 +343,7 @@ dtb-$(CONFIG_SOC_IMX51) += \
imx51-ts4800.dtb imx51-ts4800.dtb
dtb-$(CONFIG_SOC_IMX53) += \ dtb-$(CONFIG_SOC_IMX53) += \
imx53-ard.dtb \ imx53-ard.dtb \
imx53-cx9020.dtb \
imx53-m53evk.dtb \ imx53-m53evk.dtb \
imx53-mba53.dtb \ imx53-mba53.dtb \
imx53-qsb.dtb \ imx53-qsb.dtb \
...@@ -394,7 +395,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -394,7 +395,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-udoo.dtb \ imx6dl-udoo.dtb \
imx6dl-wandboard.dtb \ imx6dl-wandboard.dtb \
imx6dl-wandboard-revb1.dtb \ imx6dl-wandboard-revb1.dtb \
imx6q-apalis-eval.dtb \
imx6q-apalis-ixora.dtb \ imx6q-apalis-ixora.dtb \
imx6q-apalis-ixora-v1.1.dtb \
imx6q-apf6dev.dtb \ imx6q-apf6dev.dtb \
imx6q-arm2.dtb \ imx6q-arm2.dtb \
imx6q-b450v3.dtb \ imx6q-b450v3.dtb \
...@@ -469,7 +472,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \ ...@@ -469,7 +472,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-udoo-neo-full.dtb imx6sx-udoo-neo-full.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \ imx6ul-14x14-evk.dtb \
imx6ul-geam-kit.dtb \ imx6ul-geam.dtb \
imx6ul-isiot-emmc.dtb \ imx6ul-isiot-emmc.dtb \
imx6ul-isiot-nand.dtb \ imx6ul-isiot-nand.dtb \
imx6ul-liteboard.dtb \ imx6ul-liteboard.dtb \
......
...@@ -451,6 +451,13 @@ scc: crypto@53fac000 { ...@@ -451,6 +451,13 @@ scc: crypto@53fac000 {
interrupt-names = "scm", "smn"; interrupt-names = "scm", "smn";
}; };
rngb: rngb@53fb0000 {
compatible = "fsl,imx25-rngb";
reg = <0x53fb0000 0x4000>;
clocks = <&clks 109>;
interrupts = <22>;
};
esdhc1: esdhc@53fb4000 { esdhc1: esdhc@53fb4000 {
compatible = "fsl,imx25-esdhc"; compatible = "fsl,imx25-esdhc";
reg = <0x53fb4000 0x4000>; reg = <0x53fb4000 0x4000>;
......
/*
* Copyright 2017 Beckhoff Automation GmbH & Co. KG
* based on imx53-qsb.dts
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx53.dtsi"
/ {
model = "Beckhoff CX9020 Embedded PC";
compatible = "bhf,cx9020", "fsl,imx53";
chosen {
stdout-path = &uart2;
};
memory {
reg = <0x70000000 0x20000000>,
<0xb0000000 0x20000000>;
};
display-0 {
#address-cells =<1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp0>;
port@0 {
reg = <0>;
display0_in: endpoint {
remote-endpoint = <&ipu_di0_disp0>;
};
};
port@1 {
reg = <1>;
display0_out: endpoint {
remote-endpoint = <&tfp410_in>;
};
};
};
dvi-connector {
compatible = "dvi-connector";
ddc-i2c-bus = <&i2c2>;
digital;
port {
dvi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
dvi-converter {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,tfp410";
port@0 {
reg = <0>;
tfp410_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint {
remote-endpoint = <&dvi_connector_in>;
};
};
};
leds {
compatible = "gpio-leds";
pwr-r {
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
pwr-g {
gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
pwr-b {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sd1-b {
linux,default-trigger = "mmc0";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
};
sd2-b {
linux,default-trigger = "mmc1";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
};
};
regulator-3p2v {
compatible = "regulator-fixed";
regulator-name = "3P2V";
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3200000>;
regulator-always-on;
};
reg_usb_vbus: regulator-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&esdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&ipu_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,dte-mode;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_vbus>;
phy_type = "utmi";
status = "okay";
};
&usbotg {
dr_mode = "peripheral";
status = "okay";
};
&vpu {
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
MX53_PAD_GPIO_0__CCM_CLKO 0x1c4
MX53_PAD_GPIO_16__I2C3_SDA 0x1c4
MX53_PAD_EIM_D22__GPIO3_22 0x1c4
MX53_PAD_EIM_D23__GPIO3_23 0x1e4
MX53_PAD_EIM_D24__GPIO3_24 0x1e4
>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
MX53_PAD_GPIO_1__ESDHC1_CD 0x1c4
MX53_PAD_EIM_D17__GPIO3_17 0x1e4
MX53_PAD_GPIO_3__GPIO1_3 0x1c4
>;
};
pinctrl_esdhc2: esdhc2grp {
fsl,pins = <
MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
MX53_PAD_GPIO_4__ESDHC2_CD 0x1e4
MX53_PAD_EIM_D20__GPIO3_20 0x1e4
MX53_PAD_GPIO_8__GPIO1_8 0x1c4
>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX53_PAD_FEC_MDC__FEC_MDC 0x4
MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
>;
};
pinctrl_ipu_disp0: ipudisp0grp {
fsl,pins = <
MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5
MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4
MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4
MX53_PAD_EIM_D28__UART2_RTS 0x1e4
MX53_PAD_EIM_D29__UART2_CTS 0x1e4
>;
};
};
...@@ -524,6 +524,7 @@ ...@@ -524,6 +524,7 @@
#define MX53_PAD_EIM_D25__UART1_DSR 0x140 0x488 0x000 0x7 0x0 #define MX53_PAD_EIM_D25__UART1_DSR 0x140 0x488 0x000 0x7 0x0
#define MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x144 0x48c 0x000 0x0 0x0 #define MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x144 0x48c 0x000 0x0 0x0
#define MX53_PAD_EIM_D26__GPIO3_26 0x144 0x48c 0x000 0x1 0x0 #define MX53_PAD_EIM_D26__GPIO3_26 0x144 0x48c 0x000 0x1 0x0
#define MX53_PAD_EIM_D26__UART2_RXD_MUX 0x144 0x48c 0x880 0x2 0x0
#define MX53_PAD_EIM_D26__UART2_TXD_MUX 0x144 0x48c 0x000 0x2 0x0 #define MX53_PAD_EIM_D26__UART2_TXD_MUX 0x144 0x48c 0x000 0x2 0x0
#define MX53_PAD_EIM_D26__FIRI_RXD 0x144 0x48c 0x80c 0x3 0x0 #define MX53_PAD_EIM_D26__FIRI_RXD 0x144 0x48c 0x80c 0x3 0x0
#define MX53_PAD_EIM_D26__IPU_CSI0_D_1 0x144 0x48c 0x000 0x4 0x0 #define MX53_PAD_EIM_D26__IPU_CSI0_D_1 0x144 0x48c 0x000 0x4 0x0
...@@ -533,6 +534,7 @@ ...@@ -533,6 +534,7 @@
#define MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x148 0x490 0x000 0x0 0x0 #define MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x148 0x490 0x000 0x0 0x0
#define MX53_PAD_EIM_D27__GPIO3_27 0x148 0x490 0x000 0x1 0x0 #define MX53_PAD_EIM_D27__GPIO3_27 0x148 0x490 0x000 0x1 0x0
#define MX53_PAD_EIM_D27__UART2_RXD_MUX 0x148 0x490 0x880 0x2 0x1 #define MX53_PAD_EIM_D27__UART2_RXD_MUX 0x148 0x490 0x880 0x2 0x1
#define MX53_PAD_EIM_D27__UART2_TXD_MUX 0x148 0x490 0x000 0x2 0x0
#define MX53_PAD_EIM_D27__FIRI_TXD 0x148 0x490 0x000 0x3 0x0 #define MX53_PAD_EIM_D27__FIRI_TXD 0x148 0x490 0x000 0x3 0x0
#define MX53_PAD_EIM_D27__IPU_CSI0_D_0 0x148 0x490 0x000 0x4 0x0 #define MX53_PAD_EIM_D27__IPU_CSI0_D_0 0x148 0x490 0x000 0x4 0x0
#define MX53_PAD_EIM_D27__IPU_DI1_PIN13 0x148 0x490 0x000 0x5 0x0 #define MX53_PAD_EIM_D27__IPU_DI1_PIN13 0x148 0x490 0x000 0x5 0x0
...@@ -541,6 +543,7 @@ ...@@ -541,6 +543,7 @@
#define MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x14c 0x494 0x000 0x0 0x0 #define MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x14c 0x494 0x000 0x0 0x0
#define MX53_PAD_EIM_D28__GPIO3_28 0x14c 0x494 0x000 0x1 0x0 #define MX53_PAD_EIM_D28__GPIO3_28 0x14c 0x494 0x000 0x1 0x0
#define MX53_PAD_EIM_D28__UART2_CTS 0x14c 0x494 0x000 0x2 0x0 #define MX53_PAD_EIM_D28__UART2_CTS 0x14c 0x494 0x000 0x2 0x0
#define MX53_PAD_EIM_D28__UART2_RTS 0x14c 0x494 0x87c 0x2 0x0
#define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO 0x14c 0x494 0x82c 0x3 0x1 #define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO 0x14c 0x494 0x82c 0x3 0x1
#define MX53_PAD_EIM_D28__CSPI_MOSI 0x14c 0x494 0x788 0x4 0x1 #define MX53_PAD_EIM_D28__CSPI_MOSI 0x14c 0x494 0x788 0x4 0x1
#define MX53_PAD_EIM_D28__I2C1_SDA 0x14c 0x494 0x818 0x5 0x1 #define MX53_PAD_EIM_D28__I2C1_SDA 0x14c 0x494 0x818 0x5 0x1
...@@ -548,6 +551,7 @@ ...@@ -548,6 +551,7 @@
#define MX53_PAD_EIM_D28__IPU_DI0_PIN13 0x14c 0x494 0x000 0x7 0x0 #define MX53_PAD_EIM_D28__IPU_DI0_PIN13 0x14c 0x494 0x000 0x7 0x0
#define MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x150 0x498 0x000 0x0 0x0 #define MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x150 0x498 0x000 0x0 0x0
#define MX53_PAD_EIM_D29__GPIO3_29 0x150 0x498 0x000 0x1 0x0 #define MX53_PAD_EIM_D29__GPIO3_29 0x150 0x498 0x000 0x1 0x0
#define MX53_PAD_EIM_D29__UART2_CTS 0x150 0x498 0x000 0x2 0x0
#define MX53_PAD_EIM_D29__UART2_RTS 0x150 0x498 0x87c 0x2 0x1 #define MX53_PAD_EIM_D29__UART2_RTS 0x150 0x498 0x87c 0x2 0x1
#define MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS 0x150 0x498 0x000 0x3 0x0 #define MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS 0x150 0x498 0x000 0x3 0x0
#define MX53_PAD_EIM_D29__CSPI_SS0 0x150 0x498 0x78c 0x4 0x2 #define MX53_PAD_EIM_D29__CSPI_SS0 0x150 0x498 0x78c 0x4 0x2
......
...@@ -433,6 +433,15 @@ gpt: timer@53fa0000 { ...@@ -433,6 +433,15 @@ gpt: timer@53fa0000 {
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
srtc: srtc@53fa4000 {
compatible = "fsl,imx53-rtc", "fsl,imx25-rtc";
reg = <0x53fa4000 0x4000>;
interrupts = <24>;
interrupt-parent = <&tzic>;
clocks = <&clks IMX5_CLK_SRTC_GATE>;
clock-names = "ipg";
};
iomuxc: iomuxc@53fa8000 { iomuxc: iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc"; compatible = "fsl,imx53-iomuxc";
reg = <0x53fa8000 0x4000>; reg = <0x53fa8000 0x4000>;
......
...@@ -17,3 +17,61 @@ / { ...@@ -17,3 +17,61 @@ / {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX"; model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX";
compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl"; compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
}; };
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu1_csi1_mux: endpoint {
remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu1_csi1_from_ipu1_csi1_mux {
bus-width = <8>;
};
&ipu1_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
bus-width = <8>;
};
&ipu1_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi1>;
};
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu1_csi1: ipu1_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
>;
};
};
...@@ -17,3 +17,61 @@ / { ...@@ -17,3 +17,61 @@ / {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX"; model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX";
compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl"; compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
}; };
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu1_csi1_mux: endpoint {
remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu1_csi1_from_ipu1_csi1_mux {
bus-width = <8>;
};
&ipu1_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
bus-width = <8>;
};
&ipu1_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi1>;
};
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu1_csi1: ipu1_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
>;
};
};
...@@ -17,3 +17,61 @@ / { ...@@ -17,3 +17,61 @@ / {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX"; model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl"; compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
}; };
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu1_csi1_mux: endpoint {
remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu1_csi1_from_ipu1_csi1_mux {
bus-width = <8>;
};
&ipu1_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
bus-width = <8>;
};
&ipu1_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi1>;
};
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu1_csi1: ipu1_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
>;
};
};
...@@ -101,6 +101,51 @@ &fec { ...@@ -101,6 +101,51 @@ &fec {
status = "okay"; status = "okay";
}; };
&gpio1 {
gpio-line-names =
"", "", "SD2_WP", "", "SD2_CD", "I2C3_SCL",
"I2C3_SDA", "I2C4_SCL",
"I2C4_SDA", "", "", "", "", "", "", "",
"", "PWM3", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "USB_OTG_VBUS", "",
"UART3_TXD", "UART3_RXD", "", "", "EIM_D28", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
"UART5_TXD", "UART5_RXD", "", "", "", "", "", "",
"GPIO4_16", "GPIO4_17", "GPIO4_18", "GPIO4_19", "",
"CSPI3_CLK", "CSPI3_MOSI", "CSPI3_MISO",
"CSPI3_CS0", "CSPI3_CS1", "GPIO4_26", "GPIO4_27",
"CSPI3_RDY", "PWM1", "PWM2", "GPIO4_31";
};
&gpio5 {
gpio-line-names =
"", "", "EIM_A25", "", "", "GPIO5_05", "GPIO5_06",
"GPIO5_07",
"GPIO5_08", "CSPI2_CS1", "CSPI2_MOSI", "CSPI2_MISO",
"CSPI2_CS0", "CSPI2_CLK", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio7 {
gpio-line-names =
"SD3_CD", "SD3_WP", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&hdmi { &hdmi {
ddc-i2c-bus = <&i2c2>; ddc-i2c-bus = <&i2c2>;
status = "okay"; status = "okay";
......
/* /*
* Copyright (C) 2016 Amarula Solutions B.V. * Copyright 2014-2017 Toradex AG
* Copyright (C) 2016 Engicam S.r.l. * Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
* *
* This file is dual-licensed: you can use it either under the terms * This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual * of the GPL or the X11 license, at your option. Note that this dual
...@@ -43,11 +44,95 @@ ...@@ -43,11 +44,95 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include "imx6ul-geam.dtsi" #include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6q.dtsi"
#include "imx6qdl-apalis.dtsi"
/ { / {
model = "Engicam GEAM6UL"; model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board";
compatible = "engicam,imx6ul-geam", "fsl,imx6ul"; compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q",
"fsl,imx6q";
aliases {
i2c0 = &i2c1;
i2c1 = &i2c3;
i2c2 = &i2c2;
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
wakeup {
label = "Wake-Up";
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
lcd_display: display@di0 {
compatible = "fsl,imx-parallel-display";
#address-cells = <1>;
#size-cells = <0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_lcdif>;
status = "okay";
port@0 {
reg = <0>;
lcd_display_in: endpoint {
remote-endpoint = <&ipu1_di1_disp1>;
};
};
port@1 {
reg = <1>;
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
panel: panel {
/*
* edt,et057090dhu: EDT 5.7" LCD TFT
* edt,et070080dh6: EDT 7.0" LCD TFT
*/
compatible = "edt,et057090dhu";
backlight = <&backlight>;
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
reg_pcie_switch: regulator-pcie-switch {
compatible = "regulator-fixed";
regulator-name = "pcie_switch";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100000>;
enable-active-high;
status = "okay";
};
};
&backlight {
brightness-levels = <0 127 191 223 239 247 251 255>;
default-brightness-level = <1>;
status = "okay";
}; };
&can1 { &can1 {
...@@ -58,44 +143,136 @@ &can2 { ...@@ -58,44 +143,136 @@ &can2 {
status = "okay"; status = "okay";
}; };
&lcdif { &hdmi {
display = <&display0>;
status = "okay"; status = "okay";
};
display0: display { /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
bits-per-pixel = <16>; &i2c1 {
bus-width = <18>; status = "okay";
status = "okay";
display-timings { pcie-switch@58 {
native-mode = <&timing0>; compatible = "plx,pex8605";
timing0: timing0 { reg = <0x58>;
clock-frequency = <28000000>; };
hactive = <800>;
vactive = <480>; /* M41T0M6 real time clock on carrier board */
hfront-porch = <30>; rtc_i2c: rtc@68 {
hback-porch = <30>; compatible = "st,m41t00";
hsync-len = <64>; reg = <0x68>;
vback-porch = <5>;
vfront-porch = <5>;
vsync-len = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
}; };
}; };
/*
* I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
* board)
*/
&i2c3 {
status = "okay";
};
&ipu1_di1_disp1 {
remote-endpoint = <&lcd_display_in>;
};
&ldb {
status = "okay";
};
&pcie {
/* active-high meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
reset-gpio-active-high;
vpcie-supply = <&reg_pcie_switch>;
status = "okay";
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&pwm4 {
status = "okay";
};
&reg_usb_otg_vbus {
status = "okay";
};
&reg_usb_host_vbus {
status = "okay";
};
&sata {
status = "okay";
};
&sound_spdif {
status = "okay";
};
&spdif {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart4 {
status = "okay";
};
&uart5 {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_host_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
status = "okay";
};
/* MMC1 */
&usdhc1 { &usdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>;
cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
&tsc { /* SD1 */
measure-delay-time = <0x1ffff>; &usdhc2 {
pre-charge-time = <0x1fff>; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
&iomuxc {
/*
* Mux the Apalis GPIOs
*/
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
&pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
&pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
&pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
>;
};
/* /*
* Copyright (C) 2016 Amarula Solutions B.V. * Copyright 2014-2017 Toradex AG
* Copyright (C) 2016 Engicam S.r.l. * Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
* *
* This file is dual-licensed: you can use it either under the terms * This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual * of the GPL or the X11 license, at your option. Note that this dual
...@@ -40,102 +41,251 @@ ...@@ -40,102 +41,251 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
&i2c1 { /dts-v1/;
stmpe811: gpio-expander@44 {
compatible = "st,stmpe811"; #include <dt-bindings/gpio/gpio.h>
reg = <0x44>; #include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6q.dtsi"
#include "imx6qdl-apalis.dtsi"
/ {
model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1";
compatible = "toradex,apalis_imx6q-ixora-v1.1",
"toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q",
"fsl,imx6q";
aliases {
i2c0 = &i2c1;
i2c1 = &i2c3;
i2c2 = &i2c2;
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
wakeup {
label = "Wake-Up";
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
lcd_display: display@di0 {
compatible = "fsl,imx-parallel-display";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>; pinctrl-0 = <&pinctrl_ipu1_lcdif>;
interrupt-parent = <&gpio1>; status = "okay";
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller; port@0 {
#interrupt-cells = <2>; reg = <0>;
stmpe: touchscreen { lcd_display_in: endpoint {
compatible = "st,stmpe-ts"; remote-endpoint = <&ipu1_di1_disp1>;
st,sample-time = <4>; };
st,mod-12b = <1>; };
st,ref-sel = <0>;
st,adc-freq = <1>; port@1 {
st,ave-ctrl = <1>; reg = <1>;
st,touch-det-delay = <2>;
st,settling = <2>; lcd_display_out: endpoint {
st,fraction-z = <7>; remote-endpoint = <&lcd_panel_in>;
st,i-drive = <1>; };
}; };
}; };
};
&lcdif { panel: panel {
pinctrl-names = "default"; /*
pinctrl-0 = <&pinctrl_lcdif_dat * edt,et057090dhu: EDT 5.7" LCD TFT
&pinctrl_lcdif_ctrl>; * edt,et070080dh6: EDT 7.0" LCD TFT
display = <&display0>; */
status = "okay"; compatible = "edt,et057090dhu";
backlight = <&backlight>;
display0: display {
bits-per-pixel = <16>; port {
bus-width = <18>; lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <28000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <30>;
hback-porch = <30>;
hsync-len = <64>;
vback-porch = <5>;
vfront-porch = <5>;
vsync-len = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
}; };
}; };
}; };
};
&iomuxc { leds {
pinctrl_lcdif_ctrl: lcdifctrlgrp { compatible = "gpio-leds";
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 pinctrl-names = "default";
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 pinctrl-0 = <&pinctrl_leds_ixora>;
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 led4-green {
>; label = "LED_4_GREEN";
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
};
led4-red {
label = "LED_4_RED";
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
led5-green {
label = "LED_5_GREEN";
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
};
led5-red {
label = "LED_5_RED";
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
};
}; };
};
pinctrl_lcdif_dat: lcdifdatgrp { &backlight {
fsl,pins = < brightness-levels = <0 127 191 223 239 247 251 255>;
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 default-brightness-level = <1>;
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 status = "okay";
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 };
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 &can1 {
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 status = "okay";
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 };
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 &can2 {
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 status = "okay";
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 };
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 &hdmi {
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 status = "okay";
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 };
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 &i2c1 {
>; status = "okay";
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t00";
reg = <0x68>;
}; };
};
/*
* I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
* board)
*/
&i2c3 {
status = "okay";
};
&ipu1_di1_disp1 {
remote-endpoint = <&lcd_display_in>;
};
&ldb {
status = "okay";
};
&pcie {
/* active-high meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
reset-gpio-active-high;
status = "okay";
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&pwm4 {
status = "okay";
};
&reg_usb_otg_vbus {
status = "okay";
};
&reg_usb_host_vbus {
status = "okay";
};
&sata {
status = "okay";
};
&sound_spdif {
status = "okay";
};
&spdif {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart4 {
status = "okay";
};
&uart5 {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_host_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
status = "okay";
};
/* MMC1 */
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>;
cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = "okay";
};
&iomuxc {
/*
* Mux the Apalis GPIOs
*/
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
&pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
&pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
&pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
>;
pinctrl_stmpe: stmpegrp { pinctrl_leds_ixora: ledsixoragrp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0 MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>; >;
}; };
}; };
/* /*
* Copyright 2014-2016 Toradex AG * Copyright 2014-2017 Toradex AG
* Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd. * Copyright 2011 Linaro Ltd.
* *
...@@ -55,13 +55,9 @@ / { ...@@ -55,13 +55,9 @@ / {
"fsl,imx6q"; "fsl,imx6q";
aliases { aliases {
i2c0 = &i2cddc; i2c0 = &i2c1;
i2c1 = &i2c1; i2c1 = &i2c3;
i2c2 = &i2c2; i2c2 = &i2c2;
i2c3 = &i2c3;
};
aliases {
rtc0 = &rtc_i2c; rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc; rtc1 = &snvs_rtc;
}; };
...@@ -164,15 +160,10 @@ &can2 { ...@@ -164,15 +160,10 @@ &can2 {
}; };
&hdmi { &hdmi {
ddc-i2c-bus = <&i2cddc>;
status = "okay";
};
&i2cddc {
status = "okay"; status = "okay";
}; };
/* GEN1_I2C: I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 { &i2c1 {
status = "okay"; status = "okay";
...@@ -188,6 +179,14 @@ rtc_i2c: rtc@68 { ...@@ -188,6 +179,14 @@ rtc_i2c: rtc@68 {
}; };
}; };
/*
* I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
* board)
*/
&i2c3 {
status = "okay";
};
&ipu1_di1_disp1 { &ipu1_di1_disp1 {
remote-endpoint = <&lcd_display_in>; remote-endpoint = <&lcd_display_in>;
}; };
...@@ -268,16 +267,13 @@ &usbotg { ...@@ -268,16 +267,13 @@ &usbotg {
/* SD1 */ /* SD1 */
&usdhc2 { &usdhc2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd_cd>; pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
&iomuxc { &iomuxc {
/* /* Mux the Apalis GPIOs */
* Mux the Apalis GPIOs
* GPIO5, 6 used by optional fusion_F0710A kernel module
*/
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
&pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
......
...@@ -57,7 +57,7 @@ &clks { ...@@ -57,7 +57,7 @@ &clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>; <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
......
...@@ -111,6 +111,11 @@ m25_eeprom: m25p80@0 { ...@@ -111,6 +111,11 @@ m25_eeprom: m25p80@0 {
}; };
&i2c1 { &i2c1 {
pinctrl-names = "default", "gpio";
pinctrl-1 = <&pinctrl_i2c1_gpio>;
sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
pca9547: mux@70 { pca9547: mux@70 {
compatible = "nxp,pca9547"; compatible = "nxp,pca9547";
reg = <0x70>; reg = <0x70>;
...@@ -261,6 +266,43 @@ mux1_i2c8: i2c@7 { ...@@ -261,6 +266,43 @@ mux1_i2c8: i2c@7 {
}; };
}; };
&i2c2 {
pinctrl-names = "default", "gpio";
pinctrl-1 = <&pinctrl_i2c2_gpio>;
sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
};
&i2c3 {
pinctrl-names = "default", "gpio";
pinctrl-1 = <&pinctrl_i2c3_gpio>;
sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
};
&iomuxc {
pinctrl_i2c1_gpio: i2c1gpiogrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0
>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
>;
};
pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
>;
};
};
&usdhc4 { &usdhc4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>; pinctrl-0 = <&pinctrl_usdhc4>;
......
...@@ -18,6 +18,64 @@ / { ...@@ -18,6 +18,64 @@ / {
compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q"; compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
}; };
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu2_csi1_mux: endpoint {
remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu2_csi1_from_ipu2_csi1_mux {
bus-width = <8>;
};
&ipu2_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu2_csi1_mux>;
bus-width = <8>;
};
&ipu2_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu2_csi1>;
};
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu2_csi1: ipu2_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
>;
};
};
&sata { &sata {
status = "okay"; status = "okay";
}; };
...@@ -18,6 +18,64 @@ / { ...@@ -18,6 +18,64 @@ / {
compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q"; compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
}; };
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu2_csi1_mux: endpoint {
remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu2_csi1_from_ipu2_csi1_mux {
bus-width = <8>;
};
&ipu2_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu2_csi1_mux>;
bus-width = <8>;
};
&ipu2_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu2_csi1>;
};
&sata { &sata {
status = "okay"; status = "okay";
}; };
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu2_csi1: ipu2_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
>;
};
};
...@@ -18,6 +18,64 @@ / { ...@@ -18,6 +18,64 @@ / {
compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q"; compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
}; };
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu2_csi1_mux: endpoint {
remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu2_csi1_from_ipu2_csi1_mux {
bus-width = <8>;
};
&ipu2_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu2_csi1_mux>;
bus-width = <8>;
};
&ipu2_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu2_csi1>;
};
&sata { &sata {
status = "okay"; status = "okay";
}; };
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu2_csi1: ipu2_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
>;
};
};
/* /*
* Copyright 2014-2016 Toradex AG * Copyright 2014-2017 Toradex AG
* Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd. * Copyright 2011 Linaro Ltd.
* *
...@@ -56,18 +56,6 @@ backlight: backlight { ...@@ -56,18 +56,6 @@ backlight: backlight {
status = "disabled"; status = "disabled";
}; };
/* DDC_I2C: I2C2_SDA/SCL on MXM3 205/207 */
i2cddc: i2c@0 {
compatible = "i2c-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c_ddc>;
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH /* sda */
&gpio2 30 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
status = "disabled";
};
reg_1p8v: regulator-1p8v { reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "1P8V"; regulator-name = "1P8V";
...@@ -210,10 +198,13 @@ ethphy: ethernet-phy@7 { ...@@ -210,10 +198,13 @@ ethphy: ethernet-phy@7 {
}; };
}; };
/* &hdmi {
* GEN1_I2C: I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier pinctrl-names = "default";
* board) pinctrl-0 = <&pinctrl_hdmi_ddc>;
*/ status = "disabled";
};
/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -374,7 +365,8 @@ stmpe_touchscreen { ...@@ -374,7 +365,8 @@ stmpe_touchscreen {
}; };
/* /*
* GEN2_I2C, CAM: I2C3_SDA/SCL on MXM3 201/203 (unused) * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
* board)
*/ */
&i2c3 { &i2c3 {
clock-frequency = <100000>; clock-frequency = <100000>;
...@@ -460,7 +452,7 @@ &usbotg { ...@@ -460,7 +452,7 @@ &usbotg {
/* MMC1 */ /* MMC1 */
&usdhc1 { &usdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>;
vqmmc-supply = <&reg_3p3v>; vqmmc-supply = <&reg_3p3v>;
bus-width = <8>; bus-width = <8>;
voltage-ranges = <3300 3300>; voltage-ranges = <3300 3300>;
...@@ -640,11 +632,10 @@ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 ...@@ -640,11 +632,10 @@ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>; >;
}; };
pinctrl_i2c_ddc: gpioi2cddcgrp { pinctrl_hdmi_ddc: hdmiddcgrp {
fsl,pins = < fsl,pins = <
/* DDC bitbang */ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x1b0b0
>; >;
}; };
...@@ -912,7 +903,7 @@ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ...@@ -912,7 +903,7 @@ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>; >;
}; };
pinctrl_usdhc1: usdhc1grp { pinctrl_usdhc1_4bit: usdhc1grp_4bit {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
...@@ -920,6 +911,11 @@ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 ...@@ -920,6 +911,11 @@ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
>;
};
pinctrl_usdhc1_8bit: usdhc1grp_8bit {
fsl,pins = <
MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071 MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071
MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071 MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071
......
...@@ -231,6 +231,37 @@ &i2c3 { ...@@ -231,6 +231,37 @@ &i2c3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
status = "okay"; status = "okay";
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio5>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu1_csi0_mux: endpoint {
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu1_csi0_from_ipu1_csi0_mux {
bus-width = <8>;
};
&ipu1_csi0_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
bus-width = <8>;
};
&ipu1_csi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi0>;
}; };
&pcie { &pcie {
...@@ -302,6 +333,13 @@ &wdog1 { ...@@ -302,6 +333,13 @@ &wdog1 {
&iomuxc { &iomuxc {
imx6qdl-gw51xx { imx6qdl-gw51xx {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
>;
};
pinctrl_enet: enetgrp { pinctrl_enet: enetgrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
...@@ -372,6 +410,22 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ...@@ -372,6 +410,22 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>; >;
}; };
pinctrl_ipu1_csi0: ipu1csi0grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
>;
};
pinctrl_pcie: pciegrp { pinctrl_pcie: pciegrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
......
...@@ -377,7 +377,6 @@ &ssi1 { ...@@ -377,7 +377,6 @@ &ssi1 {
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
}; };
......
...@@ -368,7 +368,6 @@ &ssi1 { ...@@ -368,7 +368,6 @@ &ssi1 {
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
}; };
......
...@@ -416,7 +416,6 @@ &ssi2 { ...@@ -416,7 +416,6 @@ &ssi2 {
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
}; };
......
...@@ -261,6 +261,37 @@ &i2c3 { ...@@ -261,6 +261,37 @@ &i2c3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
status = "okay"; status = "okay";
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio5>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu1_csi0_mux: endpoint {
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu1_csi0_from_ipu1_csi0_mux {
bus-width = <8>;
};
&ipu1_csi0_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
bus-width = <8>;
};
&ipu1_csi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi0>;
}; };
&pcie { &pcie {
...@@ -340,6 +371,13 @@ &wdog1 { ...@@ -340,6 +371,13 @@ &wdog1 {
}; };
&iomuxc { &iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
>;
};
pinctrl_gpmi_nand: gpminandgrp { pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
...@@ -387,6 +425,22 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ...@@ -387,6 +425,22 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>; >;
}; };
pinctrl_ipu1_csi0: ipu1csi0grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
>;
};
pinctrl_gpio_leds: gpioledsgrp { pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
......
...@@ -184,7 +184,6 @@ &pcie { ...@@ -184,7 +184,6 @@ &pcie {
}; };
&ssi1 { &ssi1 {
fsl,mode = "i2s-slave";
status = "okay"; status = "okay";
}; };
......
...@@ -108,6 +108,18 @@ reg_wlan_vmmc: regulator@4 { ...@@ -108,6 +108,18 @@ reg_wlan_vmmc: regulator@4 {
startup-delay-us = <70000>; startup-delay-us = <70000>;
enable-active-high; enable-active-high;
}; };
reg_usb_h1_vbus: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
}; };
gpio-keys { gpio-keys {
...@@ -515,6 +527,12 @@ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 ...@@ -515,6 +527,12 @@ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>; >;
}; };
pinctrl_usbh1: usbh1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
>;
};
pinctrl_usbotg: usbotggrp { pinctrl_usbotg: usbotggrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
...@@ -629,6 +647,7 @@ &uart2 { ...@@ -629,6 +647,7 @@ &uart2 {
}; };
&usbh1 { &usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay"; status = "okay";
}; };
......
...@@ -123,6 +123,18 @@ reg_2p8v: regulator@6 { ...@@ -123,6 +123,18 @@ reg_2p8v: regulator@6 {
regulator-max-microvolt = <2800000>; regulator-max-microvolt = <2800000>;
regulator-always-on; regulator-always-on;
}; };
reg_usb_h1_vbus: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
}; };
mipi_xclk: mipi_xclk { mipi_xclk: mipi_xclk {
...@@ -610,6 +622,12 @@ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 ...@@ -610,6 +622,12 @@ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>; >;
}; };
pinctrl_usbh1: usbh1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
>;
};
pinctrl_usbotg: usbotggrp { pinctrl_usbotg: usbotggrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
...@@ -705,6 +723,7 @@ &uart2 { ...@@ -705,6 +723,7 @@ &uart2 {
}; };
&usbh1 { &usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay"; status = "okay";
}; };
......
...@@ -59,6 +59,14 @@ mdio1: mdio { ...@@ -59,6 +59,14 @@ mdio1: mdio {
pinctrl-0 = <&pinctrl_mdio1>; pinctrl-0 = <&pinctrl_mdio1>;
gpios = <&gpio6 5 GPIO_ACTIVE_HIGH gpios = <&gpio6 5 GPIO_ACTIVE_HIGH
&gpio6 4 GPIO_ACTIVE_HIGH>; &gpio6 4 GPIO_ACTIVE_HIGH>;
phy: ethernet-phy@0 {
pinctrl-0 = <&pinctrl_rmii_phy_irq>;
pinctrl-names = "default";
reg = <0>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
};
}; };
reg_28p0v: regulator-28p0v { reg_28p0v: regulator-28p0v {
...@@ -615,14 +623,106 @@ &fec { ...@@ -615,14 +623,106 @@ &fec {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>; pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii"; phy-mode = "rmii";
phy-handle = <&phy>;
phy-reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; phy-reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>; phy-reset-duration = <100>;
phy-supply = <&reg_3p3v>; phy-supply = <&reg_3p3v>;
status = "okay"; status = "okay";
fixed-link { mdio {
speed = <100>; #address-cells = <1>;
full-duplex; #size-cells = <0>;
status = "okay";
switch: switch@0 {
compatible = "marvell,mv88e6085";
pinctrl-0 = <&pinctrl_switch_irq>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsa,member = <0 0>;
eeprom-length = <512>;
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "gigabit_proc";
phy-handle = <&switchphy0>;
};
port@1 {
reg = <1>;
label = "netaux";
phy-handle = <&switchphy1>;
};
port@2 {
reg = <2>;
label = "cpu";
ethernet = <&fec>;
fixed-link {
speed = <100>;
full-duplex;
};
};
port@3 {
reg = <3>;
label = "netright";
phy-handle = <&switchphy3>;
};
port@4 {
reg = <4>;
label = "netleft";
phy-handle = <&switchphy4>;
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switchphy0: switchphy@0 {
reg = <0>;
interrupt-parent = <&switch>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};
switchphy1: switchphy@1 {
reg = <1>;
interrupt-parent = <&switch>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
};
switchphy2: switchphy@2 {
reg = <2>;
interrupt-parent = <&switch>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
};
switchphy3: switchphy@3 {
reg = <3>;
interrupt-parent = <&switch>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
switchphy4: switchphy@4 {
reg = <4>;
interrupt-parent = <&switch>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
}; };
}; };
...@@ -840,6 +940,12 @@ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x40010000 ...@@ -840,6 +940,12 @@ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x40010000
>; >;
}; };
pinctrl_switch_irq: switchgrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x4001b000
>;
};
pinctrl_tc358767: tc358767grp { pinctrl_tc358767: tc358767grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x10 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x10
......
...@@ -769,6 +769,7 @@ snvs_poweroff: snvs-poweroff { ...@@ -769,6 +769,7 @@ snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff"; compatible = "syscon-poweroff";
regmap = <&snvs>; regmap = <&snvs>;
offset = <0x38>; offset = <0x38>;
value = <0x60>;
mask = <0x60>; mask = <0x60>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -655,6 +655,7 @@ snvs_poweroff: snvs-poweroff { ...@@ -655,6 +655,7 @@ snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff"; compatible = "syscon-poweroff";
regmap = <&snvs>; regmap = <&snvs>;
offset = <0x38>; offset = <0x38>;
value = <0x60>;
mask = <0x60>; mask = <0x60>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -710,6 +710,7 @@ snvs_poweroff: snvs-poweroff { ...@@ -710,6 +710,7 @@ snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff"; compatible = "syscon-poweroff";
regmap = <&snvs>; regmap = <&snvs>;
offset = <0x38>; offset = <0x38>;
value = <0x60>;
mask = <0x60>; mask = <0x60>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -22,7 +22,7 @@ memory { ...@@ -22,7 +22,7 @@ memory {
reg = <0x80000000 0x20000000>; reg = <0x80000000 0x20000000>;
}; };
backlight { backlight_display: backlight-display {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>; pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
...@@ -78,6 +78,17 @@ dailink_master: simple-audio-card,codec { ...@@ -78,6 +78,17 @@ dailink_master: simple-audio-card,codec {
clocks = <&clks IMX6UL_CLK_SAI2>; clocks = <&clks IMX6UL_CLK_SAI2>;
}; };
}; };
panel {
compatible = "innolux,at043tn24";
backlight = <&backlight_display>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
}; };
&clks { &clks {
...@@ -139,31 +150,11 @@ &lcdif { ...@@ -139,31 +150,11 @@ &lcdif {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>; &pinctrl_lcdif_ctrl>;
display = <&display0>;
status = "okay"; status = "okay";
display0: display { port {
bits-per-pixel = <16>; display_out: endpoint {
bus-width = <24>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9200000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <8>;
hback-porch = <4>;
hsync-len = <41>;
vback-porch = <2>;
vfront-porch = <4>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
}; };
}; };
...@@ -316,7 +307,6 @@ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 ...@@ -316,7 +307,6 @@ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x17059
>; >;
}; };
......
...@@ -40,11 +40,16 @@ ...@@ -40,11 +40,16 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
/dts-v1/;
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include "imx6ul.dtsi" #include "imx6ul.dtsi"
/ { / {
model = "Engicam GEAM6UL Starter Kit";
compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
memory { memory {
reg = <0x80000000 0x08000000>; reg = <0x80000000 0x08000000>;
}; };
...@@ -87,18 +92,46 @@ reg_3p3v: regulator-3p3v { ...@@ -87,18 +92,46 @@ reg_3p3v: regulator-3p3v {
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
}; };
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "imx6ul-geam-sgtl5000";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
simple-audio-card,cpu {
sound-dai = <&sai2>;
};
dailink_master: simple-audio-card,codec {
sound-dai = <&sgtl5000>;
clocks = <&clks IMX6UL_CLK_SAI2>;
};
};
}; };
&can1 { &can1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>; pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_3p3v>; xceiver-supply = <&reg_3p3v>;
status = "okay";
}; };
&can2 { &can2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>; pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_3p3v>; xceiver-supply = <&reg_3p3v>;
status = "okay";
}; };
&fec1 { &fec1 {
...@@ -144,6 +177,16 @@ &i2c1 { ...@@ -144,6 +177,16 @@ &i2c1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
status = "okay"; status = "okay";
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6UL_CLK_OSC>;
clock-names = "mclk";
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>;
VDDD-supply = <&reg_1p8v>;
};
}; };
&i2c2 { &i2c2 {
...@@ -158,6 +201,31 @@ &lcdif { ...@@ -158,6 +201,31 @@ &lcdif {
pinctrl-0 = <&pinctrl_lcdif_dat pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>; &pinctrl_lcdif_ctrl>;
display = <&display0>; display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <16>;
bus-width = <18>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <28000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <30>;
hback-porch = <30>;
hsync-len = <64>;
vback-porch = <5>;
vfront-porch = <5>;
vsync-len = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
}; };
&pwm8 { &pwm8 {
...@@ -178,6 +246,12 @@ &sai2 { ...@@ -178,6 +246,12 @@ &sai2 {
status = "okay"; status = "okay";
}; };
&tsc {
measure-delay-time = <0x1ffff>;
pre-charge-time = <0x1fff>;
status = "okay";
};
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
......
...@@ -43,7 +43,6 @@ ...@@ -43,7 +43,6 @@
/dts-v1/; /dts-v1/;
#include "imx6ul-isiot.dtsi" #include "imx6ul-isiot.dtsi"
#include "imx6ul-isiot-common.dtsi"
/ { / {
model = "Engicam Is.IoT MX6UL eMMC Starter kit"; model = "Engicam Is.IoT MX6UL eMMC Starter kit";
......
...@@ -43,7 +43,6 @@ ...@@ -43,7 +43,6 @@
/dts-v1/; /dts-v1/;
#include "imx6ul-isiot.dtsi" #include "imx6ul-isiot.dtsi"
#include "imx6ul-isiot-common.dtsi"
/ { / {
model = "Engicam Is.IoT MX6UL NAND Starter kit"; model = "Engicam Is.IoT MX6UL NAND Starter kit";
......
...@@ -69,6 +69,68 @@ backlight { ...@@ -69,6 +69,68 @@ backlight {
100>; 100>;
default-brightness-level = <100>; default-brightness-level = <100>;
}; };
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "imx6ul-isiot-sgtl5000";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
simple-audio-card,cpu {
sound-dai = <&sai2>;
};
dailink_master: simple-audio-card,codec {
sound-dai = <&sgtl5000>;
clocks = <&clks IMX6UL_CLK_SAI2>;
};
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <&ethphy0>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
}; };
&i2c1 { &i2c1 {
...@@ -76,6 +138,42 @@ &i2c1 { ...@@ -76,6 +138,42 @@ &i2c1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
status = "okay"; status = "okay";
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6UL_CLK_OSC>;
clock-names = "mclk";
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>;
VDDD-supply = <&reg_1p8v>;
};
stmpe811: gpio-expander@44 {
compatible = "st,stmpe811";
reg = <0x44>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
interrupt-parent = <&gpio1>;
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
stmpe: touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
};
};
}; };
&i2c2 { &i2c2 {
...@@ -85,6 +183,38 @@ &i2c2 { ...@@ -85,6 +183,38 @@ &i2c2 {
status = "okay"; status = "okay";
}; };
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <16>;
bus-width = <18>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <28000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <30>;
hback-porch = <30>;
hsync-len = <64>;
vback-porch = <5>;
vfront-porch = <5>;
vsync-len = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&pwm8 { &pwm8 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm8>; pinctrl-0 = <&pinctrl_pwm8>;
...@@ -115,6 +245,21 @@ &usdhc1 { ...@@ -115,6 +245,21 @@ &usdhc1 {
}; };
&iomuxc { &iomuxc {
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp { pinctrl_i2c1: i2c1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
...@@ -129,6 +274,38 @@ MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0x4001b8b0 ...@@ -129,6 +274,38 @@ MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0x4001b8b0
>; >;
}; };
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
>;
};
pinctrl_pwm8: pwm8grp { pinctrl_pwm8: pwm8grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0 MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
...@@ -145,6 +322,12 @@ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 ...@@ -145,6 +322,12 @@ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
>; >;
}; };
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
>;
};
pinctrl_uart1: uart1grp { pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
......
...@@ -124,6 +124,10 @@ ethphy0: ethernet-phy@0 { ...@@ -124,6 +124,10 @@ ethphy0: ethernet-phy@0 {
}; };
}; };
&snvs_poweroff {
status = "okay";
};
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
......
...@@ -614,6 +614,7 @@ snvs_poweroff: snvs-poweroff { ...@@ -614,6 +614,7 @@ snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff"; compatible = "syscon-poweroff";
regmap = <&snvs>; regmap = <&snvs>;
offset = <0x38>; offset = <0x38>;
value = <0x60>;
mask = <0x60>; mask = <0x60>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -106,6 +106,15 @@ &fec1 { ...@@ -106,6 +106,15 @@ &fec1 {
fsl,magic-packet; fsl,magic-packet;
}; };
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
fsl,use-minimum-ecc;
nand-on-flash-bbt;
nand-ecc-mode = "hw";
status = "okay";
};
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
......
...@@ -117,6 +117,37 @@ reg_brcm: regulator-brcm { ...@@ -117,6 +117,37 @@ reg_brcm: regulator-brcm {
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
startup-delay-us = <200000>; startup-delay-us = <200000>;
}; };
reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed";
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&extended_io 7 GPIO_ACTIVE_LOW>;
};
reg_can2_3v3: regulator-can2-3v3 {
compatible = "regulator-fixed";
regulator-name = "can2-3v3";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
};
panel {
compatible = "innolux,at043tn24";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
power-supply = <&reg_lcd_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
}; };
&adc1 { &adc1 {
...@@ -168,6 +199,7 @@ &fec1 { ...@@ -168,6 +199,7 @@ &fec1 {
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
fsl,magic-packet; fsl,magic-packet;
phy-reset-gpios = <&extended_io 5 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
mdio { mdio {
...@@ -197,6 +229,13 @@ &fec2 { ...@@ -197,6 +229,13 @@ &fec2 {
status = "okay"; status = "okay";
}; };
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_can2_3v3>;
status = "okay";
};
&i2c1 { &i2c1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
...@@ -285,8 +324,8 @@ vgen5_reg: vldo3 { ...@@ -285,8 +324,8 @@ vgen5_reg: vldo3 {
}; };
vgen6_reg: vldo4 { vgen6_reg: vldo4 {
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <2800000>;
regulator-always-on; regulator-always-on;
}; };
}; };
...@@ -322,31 +361,11 @@ codec: wm8960@1a { ...@@ -322,31 +361,11 @@ codec: wm8960@1a {
&lcdif { &lcdif {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif>; pinctrl-0 = <&pinctrl_lcdif>;
display = <&display0>;
status = "okay"; status = "okay";
display0: display { port {
bits-per-pixel = <16>; display_out: endpoint {
bus-width = <24>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9200000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <8>;
hback-porch = <4>;
hsync-len = <41>;
vback-porch = <2>;
vfront-porch = <4>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
}; };
}; };
...@@ -356,12 +375,6 @@ &pcie { ...@@ -356,12 +375,6 @@ &pcie {
status = "okay"; status = "okay";
}; };
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
...@@ -488,6 +501,20 @@ MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 ...@@ -488,6 +501,20 @@ MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1
>; >;
}; };
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
>;
};
pinctrl_flexcan2_reg: flexcan2reggrp {
fsl,pins = <
MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x59 /* CAN_STBY */
>;
};
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
...@@ -693,9 +720,9 @@ MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 ...@@ -693,9 +720,9 @@ MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
>; >;
}; };
pinctrl_pwm1: pwm1grp { pinctrl_backlight: backlightgrp {
fsl,pins = < fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x110b0 MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x110b0
>; >;
pinctrl_spi4: spi4grp { pinctrl_spi4: spi4grp {
......
...@@ -540,6 +540,7 @@ snvs_poweroff: snvs-poweroff { ...@@ -540,6 +540,7 @@ snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff"; compatible = "syscon-poweroff";
regmap = <&snvs>; regmap = <&snvs>;
offset = <0x38>; offset = <0x38>;
value = <0x60>;
mask = <0x60>; mask = <0x60>;
}; };
...@@ -1021,5 +1022,36 @@ fec1: ethernet@30be0000 { ...@@ -1021,5 +1022,36 @@ fec1: ethernet@30be0000 {
status = "disabled"; status = "disabled";
}; };
}; };
dma_apbh: dma-apbh@33000000 {
compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x33000000 0x2000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <1>;
dma-channels = <4>;
clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
};
gpmi: gpmi-nand@33002000{
compatible = "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "bch";
clocks = <&clks IMX7D_NAND_RAWNAND_CLK>,
<&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
clock-names = "gpmi_io", "gpmi_bch_apb";
dmas = <&dma_apbh 0>;
dma-names = "rx-tx";
status = "disabled";
assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;
};
}; };
}; };
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