Commit 3f58e094 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma

Pull slave-dmaengine fixes from Vinod Koul:
 "A few fixes on slave dmanengine.  There are trivial fixes in imx-dma,
  tegra-dma & ioat driver"

* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
  dma: tegra: implement flags parameters for cyclic transfer
  dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers.
  ioat: Fix DMA memory sync direction correct flag
parents acc5da0f b9bb37f5
...@@ -684,9 +684,8 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, ...@@ -684,9 +684,8 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
break; break;
} }
imxdmac->hw_chaining = 1; imxdmac->hw_chaining = 0;
if (!imxdma_hw_chain(imxdmac))
return -EINVAL;
imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) | imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) |
((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) | ((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
CCR_REN; CCR_REN;
......
...@@ -951,7 +951,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device) ...@@ -951,7 +951,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
goto free_resources; goto free_resources;
} }
} }
dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_TO_DEVICE); dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_FROM_DEVICE);
/* skip validate if the capability is not present */ /* skip validate if the capability is not present */
if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask)) if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask))
......
...@@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get( ...@@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get(
if (async_tx_test_ack(&dma_desc->txd)) { if (async_tx_test_ack(&dma_desc->txd)) {
list_del(&dma_desc->node); list_del(&dma_desc->node);
spin_unlock_irqrestore(&tdc->lock, flags); spin_unlock_irqrestore(&tdc->lock, flags);
dma_desc->txd.flags = 0;
return dma_desc; return dma_desc;
} }
} }
...@@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( ...@@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT; TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32; ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC; csr |= TEGRA_APBDMA_CSR_FLOW;
if (flags & DMA_PREP_INTERRUPT)
csr |= TEGRA_APBDMA_CSR_IE_EOC;
csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT; csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1; apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
...@@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic( ...@@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
mem += len; mem += len;
} }
sg_req->last_sg = true; sg_req->last_sg = true;
dma_desc->txd.flags = 0; if (flags & DMA_CTRL_ACK)
dma_desc->txd.flags = DMA_CTRL_ACK;
/* /*
* Make sure that mode should not be conflicting with currently * Make sure that mode should not be conflicting with currently
......
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