Commit 4328e3e5 authored by Mike Frysinger's avatar Mike Frysinger Committed by Linus Torvalds

Blackfin SPORT UART: rewrite inline assembly

Hopefuly the new version is easier to read, but in the process it declares
proper clobber lists and better constraints so that GCC can do a better
job at allocating free registers.
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent a19e8b20
...@@ -101,15 +101,16 @@ static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value) ...@@ -101,15 +101,16 @@ static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
{ {
pr_debug("%s value:%x\n", __func__, value); pr_debug("%s value:%x\n", __func__, value);
/* Place a Start and Stop bit */ /* Place a Start and Stop bit */
__asm__ volatile ( __asm__ __volatile__ (
"R2 = b#01111111100;\n\t" "R2 = b#01111111100;"
"R3 = b#10000000001;\n\t" "R3 = b#10000000001;"
"%0 <<= 2;\n\t" "%0 <<= 2;"
"%0 = %0 & R2;\n\t" "%0 = %0 & R2;"
"%0 = %0 | R3;\n\t" "%0 = %0 | R3;"
:"=r"(value) : "=d"(value)
:"0"(value) : "d"(value)
:"R2", "R3"); : "ASTAT", "R2", "R3"
);
pr_debug("%s value:%x\n", __func__, value); pr_debug("%s value:%x\n", __func__, value);
SPORT_PUT_TX(up, value); SPORT_PUT_TX(up, value);
...@@ -118,27 +119,30 @@ static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value) ...@@ -118,27 +119,30 @@ static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
static inline unsigned int rx_one_byte(struct sport_uart_port *up) static inline unsigned int rx_one_byte(struct sport_uart_port *up)
{ {
unsigned int value, extract; unsigned int value, extract;
u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
value = SPORT_GET_RX32(up); value = SPORT_GET_RX32(up);
pr_debug("%s value:%x\n", __func__, value); pr_debug("%s value:%x\n", __func__, value);
/* Extract 8 bits data */ /* Extract 8 bits data */
__asm__ volatile ( __asm__ __volatile__ (
"R5 = 0;\n\t" "%[extr] = 0;"
"P0 = 8;\n\t" "%[mask1] = 0x1801(Z);"
"R1 = 0x1801(Z);\n\t" "%[mask2] = 0x0300(Z);"
"R3 = 0x0300(Z);\n\t" "%[shift] = 0;"
"R4 = 0;\n\t" "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
"LSETUP(loop_s, loop_e) LC0 = P0;\nloop_s:\t" ".Lloop_s:"
"R2 = extract(%1, R1.L)(Z);\n\t" "%[tmp] = extract(%[val], %[mask1].L)(Z);"
"R2 <<= R4;\n\t" "%[tmp] <<= %[shift];"
"R5 = R5 | R2;\n\t" "%[extr] = %[extr] | %[tmp];"
"R1 = R1 - R3;\nloop_e:\t" "%[mask1] = %[mask1] - %[mask2];"
"R4 += 1;\n\t" ".Lloop_e:"
"%0 = R5;\n\t" "%[shift] += 1;"
:"=r"(extract) : [val]"=d"(value), [extr]"=d"(extract), [shift]"=d"(tmp_shift), [tmp]"=d"(tmp),
:"r"(value) [mask1]"=d"(tmp_mask1), [mask2]"=d"(tmp_mask2)
:"P0", "R1", "R2","R3","R4", "R5"); : "d"(value), [lc]"a"(8)
: "ASTAT", "LB0", "LC0", "LT0"
);
pr_debug(" extract:%x\n", extract); pr_debug(" extract:%x\n", extract);
return extract; return extract;
......
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