Commit 4761703b authored by Ilia Mirkin's avatar Ilia Mirkin Committed by Ben Skeggs

drm/nv4c/mc: disable msi

Several users have, over time, reported issues with MSI on these IGPs.
They're old, rarely available, and MSI doesn't provide such huge
advantages on them. Just disable.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87361
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74492
Fixes: fa8c9ac7 ("drm/nv4c/mc: nv4x igp's have a different msi rearm register")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e9d91238
...@@ -24,13 +24,6 @@ ...@@ -24,13 +24,6 @@
#include "nv04.h" #include "nv04.h"
static void
nv4c_mc_msi_rearm(struct nouveau_mc *pmc)
{
struct nv04_mc_priv *priv = (void *)pmc;
nv_wr08(priv, 0x088050, 0xff);
}
struct nouveau_oclass * struct nouveau_oclass *
nv4c_mc_oclass = &(struct nouveau_mc_oclass) { nv4c_mc_oclass = &(struct nouveau_mc_oclass) {
.base.handle = NV_SUBDEV(MC, 0x4c), .base.handle = NV_SUBDEV(MC, 0x4c),
...@@ -41,5 +34,4 @@ nv4c_mc_oclass = &(struct nouveau_mc_oclass) { ...@@ -41,5 +34,4 @@ nv4c_mc_oclass = &(struct nouveau_mc_oclass) {
.fini = _nouveau_mc_fini, .fini = _nouveau_mc_fini,
}, },
.intr = nv04_mc_intr, .intr = nv04_mc_intr,
.msi_rearm = nv4c_mc_msi_rearm,
}.base; }.base;
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment