Commit 47eacbab authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Compute DSI PLL parameters during .compute_config()

Compute the DSI PLL parameters during .compute_config() rather than
.pre_pll_enable() so that we can fail gracefully if we can't find
suitable parameters.

In order to do that we need to store the DSI PLL parameters in
pipe_config.

v2: Handle BXT too
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460488478-18311-3-git-send-email-ville.syrjala@linux.intel.comTested-by: default avatarJani Nikula <jani.nikula@intel.com>
parent cd2d34d9
...@@ -12763,6 +12763,9 @@ intel_pipe_config_compare(struct drm_device *dev, ...@@ -12763,6 +12763,9 @@ intel_pipe_config_compare(struct drm_device *dev,
PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1); PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);
PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2); PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);
PIPE_CONF_CHECK_X(dsi_pll.ctrl);
PIPE_CONF_CHECK_X(dsi_pll.div);
if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5)
PIPE_CONF_CHECK_I(pipe_bpp); PIPE_CONF_CHECK_I(pipe_bpp);
......
...@@ -497,6 +497,11 @@ struct intel_crtc_state { ...@@ -497,6 +497,11 @@ struct intel_crtc_state {
/* Actual register state of the dpll, for shared dpll cross-checking. */ /* Actual register state of the dpll, for shared dpll cross-checking. */
struct intel_dpll_hw_state dpll_hw_state; struct intel_dpll_hw_state dpll_hw_state;
/* DSI PLL registers */
struct {
u32 ctrl, div;
} dsi_pll;
int pipe_bpp; int pipe_bpp;
struct intel_link_m_n dp_m_n; struct intel_link_m_n dp_m_n;
......
...@@ -292,6 +292,7 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, ...@@ -292,6 +292,7 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder,
struct intel_connector *intel_connector = intel_dsi->attached_connector; struct intel_connector *intel_connector = intel_dsi->attached_connector;
struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
int ret;
DRM_DEBUG_KMS("\n"); DRM_DEBUG_KMS("\n");
...@@ -311,10 +312,10 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, ...@@ -311,10 +312,10 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder,
pipe_config->cpu_transcoder = TRANSCODER_DSI_A; pipe_config->cpu_transcoder = TRANSCODER_DSI_A;
} }
/* ret = intel_compute_dsi_pll(encoder, pipe_config);
* FIXME move the DSI PLL calc from vlv_enable_dsi_pll() if (ret)
* to .compute_config(). return false;
*/
pipe_config->clock_set = true; pipe_config->clock_set = true;
return true; return true;
...@@ -504,6 +505,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) ...@@ -504,6 +505,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
struct drm_device *dev = encoder->base.dev; struct drm_device *dev = encoder->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
enum port port; enum port port;
u32 tmp; u32 tmp;
...@@ -514,7 +516,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder) ...@@ -514,7 +516,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
* lock. It needs to be fully powered down to fix it. * lock. It needs to be fully powered down to fix it.
*/ */
intel_disable_dsi_pll(encoder); intel_disable_dsi_pll(encoder);
intel_enable_dsi_pll(encoder); intel_enable_dsi_pll(encoder, crtc->config);
intel_dsi_prepare(encoder); intel_dsi_prepare(encoder);
...@@ -824,7 +826,8 @@ static void intel_dsi_get_config(struct intel_encoder *encoder, ...@@ -824,7 +826,8 @@ static void intel_dsi_get_config(struct intel_encoder *encoder,
if (IS_BROXTON(dev)) if (IS_BROXTON(dev))
bxt_dsi_get_pipe_config(encoder, pipe_config); bxt_dsi_get_pipe_config(encoder, pipe_config);
pclk = intel_dsi_get_pclk(encoder, pipe_config->pipe_bpp); pclk = intel_dsi_get_pclk(encoder, pipe_config->pipe_bpp,
pipe_config);
if (!pclk) if (!pclk)
return; return;
......
...@@ -127,11 +127,15 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) ...@@ -127,11 +127,15 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
} }
bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv); bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
extern void intel_enable_dsi_pll(struct intel_encoder *encoder); int intel_compute_dsi_pll(struct intel_encoder *encoder,
extern void intel_disable_dsi_pll(struct intel_encoder *encoder); struct intel_crtc_state *config);
extern u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp); void intel_enable_dsi_pll(struct intel_encoder *encoder,
extern void intel_dsi_reset_clocks(struct intel_encoder *encoder, const struct intel_crtc_state *config);
enum port port); void intel_disable_dsi_pll(struct intel_encoder *encoder);
u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
struct intel_crtc_state *config);
void intel_dsi_reset_clocks(struct intel_encoder *encoder,
enum port port);
struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id); struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt); enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
......
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