Commit 48e706fb authored by Quentin Schulz's avatar Quentin Schulz Committed by Linus Walleij

pinctrl: axp209: add programmable gpio_status_offset

To prepare for patches that will add support for a new PMIC that has a
different GPIO input status register, add a gpio_status_offset within
axp20x_pctl structure and use it.
Signed-off-by: default avatarQuentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent d242e60c
...@@ -48,6 +48,7 @@ struct axp20x_pctrl_desc { ...@@ -48,6 +48,7 @@ struct axp20x_pctrl_desc {
u8 ldo_mask; u8 ldo_mask;
/* Stores the pins supporting ADC function. Bit offset is pin number. */ /* Stores the pins supporting ADC function. Bit offset is pin number. */
u8 adc_mask; u8 adc_mask;
u8 gpio_status_offset;
}; };
struct axp20x_pinctrl_function { struct axp20x_pinctrl_function {
...@@ -77,6 +78,7 @@ static const struct axp20x_pctrl_desc axp20x_data = { ...@@ -77,6 +78,7 @@ static const struct axp20x_pctrl_desc axp20x_data = {
.npins = ARRAY_SIZE(axp209_pins), .npins = ARRAY_SIZE(axp209_pins),
.ldo_mask = BIT(0) | BIT(1), .ldo_mask = BIT(0) | BIT(1),
.adc_mask = BIT(0) | BIT(1), .adc_mask = BIT(0) | BIT(1),
.gpio_status_offset = 4,
}; };
static int axp20x_gpio_get_reg(unsigned int offset) static int axp20x_gpio_get_reg(unsigned int offset)
...@@ -108,7 +110,7 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) ...@@ -108,7 +110,7 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
if (ret) if (ret)
return ret; return ret;
return !!(val & BIT(offset + 4)); return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
} }
static int axp20x_gpio_get_direction(struct gpio_chip *chip, static int axp20x_gpio_get_direction(struct gpio_chip *chip,
......
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