Commit 49a5d73f authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amdgpu: fix s3 resume back, uvd dpm randomly can't disable.

the value of last_mclk_dpm_enable_mask will be changed if
other clients(vce,dal) trigger set power state between enable
and disable uvd dpm.
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 537b4b46
...@@ -4075,7 +4075,7 @@ static int ci_enable_uvd_dpm(struct amdgpu_device *adev, bool enable) ...@@ -4075,7 +4075,7 @@ static int ci_enable_uvd_dpm(struct amdgpu_device *adev, bool enable)
pi->dpm_level_enable_mask.mclk_dpm_enable_mask); pi->dpm_level_enable_mask.mclk_dpm_enable_mask);
} }
} else { } else {
if (pi->last_mclk_dpm_enable_mask & 0x1) { if (pi->uvd_enabled) {
pi->uvd_enabled = false; pi->uvd_enabled = false;
pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1; pi->dpm_level_enable_mask.mclk_dpm_enable_mask |= 1;
amdgpu_ci_send_msg_to_smc_with_parameter(adev, amdgpu_ci_send_msg_to_smc_with_parameter(adev,
......
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