Commit 4a33b3ca authored by Bjorn Helgaas's avatar Bjorn Helgaas

sparc32/PCI/LEON: Converge device enable path

Most architectures turn on PCI_COMMAND_IO and PCI_COMMAND_MEMORY in
pci_enable_device() when a driver claims the device.  Sparc LEON did it in
pcibios_fixup_bus(), which is called during enumeration, before any drivers
are attached.

Implement pcibios_enable_device() for LEON so it will do the same as other
architectures.  This implementation is copied verbatim from sparc64.
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent c2eead05
...@@ -60,50 +60,32 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info) ...@@ -60,50 +60,32 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
pci_bus_add_devices(root_bus); pci_bus_add_devices(root_bus);
} }
void pcibios_fixup_bus(struct pci_bus *pbus) int pcibios_enable_device(struct pci_dev *dev, int mask)
{ {
struct pci_dev *dev; u16 cmd, oldcmd;
int i, has_io, has_mem; int i;
u16 cmd;
list_for_each_entry(dev, &pbus->devices, bus_list) { pci_read_config_word(dev, PCI_COMMAND, &cmd);
/* oldcmd = cmd;
* We can not rely on that the bootloader has enabled I/O
* or memory access to PCI devices. Instead we enable it here for (i = 0; i < PCI_NUM_RESOURCES; i++) {
* if the device has BARs of respective type. struct resource *res = &dev->resource[i];
*/
has_io = has_mem = 0; /* Only set up the requested stuff */
for (i = 0; i < PCI_ROM_RESOURCE; i++) { if (!(mask & (1<<i)))
unsigned long f = dev->resource[i].flags; continue;
if (f & IORESOURCE_IO)
has_io = 1; if (res->flags & IORESOURCE_IO)
else if (f & IORESOURCE_MEM)
has_mem = 1;
}
/* ROM BARs are mapped into 32-bit memory space */
if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
dev->resource[PCI_ROM_RESOURCE].flags |=
IORESOURCE_ROM_ENABLE;
has_mem = 1;
}
pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
if (has_io && !(cmd & PCI_COMMAND_IO)) {
#ifdef CONFIG_PCI_DEBUG
printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
pci_name(dev));
#endif
cmd |= PCI_COMMAND_IO; cmd |= PCI_COMMAND_IO;
pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND, if (res->flags & IORESOURCE_MEM)
cmd);
}
if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
#ifdef CONFIG_PCI_DEBUG
printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
"%s\n", pci_name(dev));
#endif
cmd |= PCI_COMMAND_MEMORY; cmd |= PCI_COMMAND_MEMORY;
pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
cmd);
}
} }
if (cmd != oldcmd) {
printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
pci_name(dev), cmd);
/* Enable the appropriate bits in the PCI command register. */
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
return 0;
} }
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