Commit 4a47bb51 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Paul Mackerras

Fix cputable.c build (missing commas)

parent bc8f3582
...@@ -208,7 +208,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -208,7 +208,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_7400 __setup_cpu_7400
}, },
...@@ -217,7 +217,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -217,7 +217,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
CPU_FTR_CAN_NAP, CPU_FTR_CAN_NAP,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_7410 __setup_cpu_7410
}, },
...@@ -226,7 +226,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -226,7 +226,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_745x __setup_cpu_745x
}, },
...@@ -245,7 +245,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -245,7 +245,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_745x __setup_cpu_745x
}, },
...@@ -254,7 +254,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -254,7 +254,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_745x __setup_cpu_745x
}, },
...@@ -264,7 +264,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -264,7 +264,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
CPU_FTR_L3_DISABLE_NAP | CPU_FTR_HAS_HIGH_BATS, CPU_FTR_L3_DISABLE_NAP | CPU_FTR_HAS_HIGH_BATS,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_745x __setup_cpu_745x
}, },
...@@ -274,7 +274,7 @@ struct cpu_spec cpu_specs[] = { ...@@ -274,7 +274,7 @@ struct cpu_spec cpu_specs[] = {
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
CPU_FTR_HAS_HIGH_BATS, CPU_FTR_HAS_HIGH_BATS,
COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
32, 32, 32, 32,
__setup_cpu_745x __setup_cpu_745x
}, },
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment