Commit 4b707fa0 authored by Stefan Agner's avatar Stefan Agner Committed by Olof Johansson

ARM: dts: imx7d: fix LCDIF clock assignment

The eLCDIF IP of the i.MX 7 SoC knows multiple clocks and lists them
separately:

Clock      Clock Root              Description
apb_clk    MAIN_AXI_CLK_ROOT       AXI clock
pix_clk    LCDIF_PIXEL_CLK_ROOT    Pixel clock
ipg_clk_s  MAIN_AXI_CLK_ROOT       Peripheral access clock

All of them are switched by a single gate, which is part of the
IMX7D_LCDIF_PIXEL_ROOT_CLK clock. Hence using that clock also for
the AXI bus clock (clock-name "axi") makes sure the gate gets
enabled when accessing registers.

There seem to be no separate AXI display clock, and the clock is
optional. Hence remove the dummy clock.

This fixes kernel freezes when starting the X-Server (which
disables/re-enables the display controller).

Fixes: e8ed73f6 ("ARM: dts: imx7d: add lcdif support")
Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Acked-by: default avatarShawn Guo <shawnguo@kernel.org>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 4367c1d8
...@@ -643,9 +643,8 @@ lcdif: lcdif@30730000 { ...@@ -643,9 +643,8 @@ lcdif: lcdif@30730000 {
reg = <0x30730000 0x10000>; reg = <0x30730000 0x10000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>, clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
<&clks IMX7D_CLK_DUMMY>, <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
<&clks IMX7D_CLK_DUMMY>; clock-names = "pix", "axi";
clock-names = "pix", "axi", "disp_axi";
status = "disabled"; status = "disabled";
}; };
}; };
......
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