Commit 4e962e89 authored by Tarun Kanti DebBarma's avatar Tarun Kanti DebBarma Committed by Kevin Hilman

gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()

Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0
which are present on OMAP4+ processors. Now we can distinguish
conditions applicable to OMAP4,5 and those specific to OMAP24xx
and OMAP3xxx.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: default avatarTarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: default avatarGovindraj.R <govindraj.raja@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent 9c4ed9e6
...@@ -101,6 +101,8 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) ...@@ -101,6 +101,8 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->dataout = OMAP4_GPIO_DATAOUT; pdata->regs->dataout = OMAP4_GPIO_DATAOUT;
pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT; pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT;
pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT; pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
pdata->regs->irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0;
pdata->regs->irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1;
pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0; pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1; pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
......
...@@ -172,6 +172,8 @@ struct omap_gpio_reg_offs { ...@@ -172,6 +172,8 @@ struct omap_gpio_reg_offs {
u16 clr_dataout; u16 clr_dataout;
u16 irqstatus; u16 irqstatus;
u16 irqstatus2; u16 irqstatus2;
u16 irqstatus_raw0;
u16 irqstatus_raw1;
u16 irqenable; u16 irqenable;
u16 irqenable2; u16 irqenable2;
u16 set_irqenable; u16 set_irqenable;
......
...@@ -1286,14 +1286,14 @@ static int omap_gpio_runtime_resume(struct device *dev) ...@@ -1286,14 +1286,14 @@ static int omap_gpio_runtime_resume(struct device *dev)
old0 = __raw_readl(bank->base + bank->regs->leveldetect0); old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
old1 = __raw_readl(bank->base + bank->regs->leveldetect1); old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) { if (!bank->regs->irqstatus_raw0) {
__raw_writel(old0 | gen, bank->base + __raw_writel(old0 | gen, bank->base +
bank->regs->leveldetect0); bank->regs->leveldetect0);
__raw_writel(old1 | gen, bank->base + __raw_writel(old1 | gen, bank->base +
bank->regs->leveldetect1); bank->regs->leveldetect1);
} }
if (cpu_is_omap44xx()) { if (bank->regs->irqstatus_raw0) {
__raw_writel(old0 | l, bank->base + __raw_writel(old0 | l, bank->base +
bank->regs->leveldetect0); bank->regs->leveldetect0);
__raw_writel(old1 | l, bank->base + __raw_writel(old1 | l, bank->base +
......
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