Commit 4f277295 authored by Juergen Gross's avatar Juergen Gross

x86/xen: init %gs very early to avoid page faults with stack protector

When running as Xen pv guest %gs is initialized some time after
C code is started. Depending on stack protector usage this might be
too late, resulting in page faults.

So setup %gs and MSR_GS_BASE in assembly code already.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarJuergen Gross <jgross@suse.com>
Reviewed-by: default avatarBoris Ostrovsky <boris.ostrovsky@oracle.com>
Tested-by: default avatarChris Patterson <cjp256@gmail.com>
Signed-off-by: default avatarJuergen Gross <jgross@suse.com>
parent ddb9e13a
...@@ -9,7 +9,9 @@ ...@@ -9,7 +9,9 @@
#include <asm/boot.h> #include <asm/boot.h>
#include <asm/asm.h> #include <asm/asm.h>
#include <asm/msr.h>
#include <asm/page_types.h> #include <asm/page_types.h>
#include <asm/percpu.h>
#include <asm/unwind_hints.h> #include <asm/unwind_hints.h>
#include <xen/interface/elfnote.h> #include <xen/interface/elfnote.h>
...@@ -35,6 +37,20 @@ ENTRY(startup_xen) ...@@ -35,6 +37,20 @@ ENTRY(startup_xen)
mov %_ASM_SI, xen_start_info mov %_ASM_SI, xen_start_info
mov $init_thread_union+THREAD_SIZE, %_ASM_SP mov $init_thread_union+THREAD_SIZE, %_ASM_SP
#ifdef CONFIG_X86_64
/* Set up %gs.
*
* The base of %gs always points to the bottom of the irqstack
* union. If the stack protector canary is enabled, it is
* located at %gs:40. Note that, on SMP, the boot cpu uses
* init data section till per cpu areas are set up.
*/
movl $MSR_GS_BASE,%ecx
movq $INIT_PER_CPU_VAR(irq_stack_union),%rax
cdq
wrmsr
#endif
jmp xen_start_kernel jmp xen_start_kernel
END(startup_xen) END(startup_xen)
__FINIT __FINIT
......
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