ARM: dts: sk-rzg1m: add Ether pins

Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

arch/arm/boot/dts/r8a7743-sk-rzg1m.dts

@@ -44,6 +44,16 @@ scif0_pins: scif0 {
 		groups = "scif0_data_d";
 		function = "scif0";
 	};
+
+	ether_pins: ether {
+		groups = "eth_link", "eth_mdio", "eth_rmii";
+		function = "eth";
+	};
+
+	phy1_pins: phy1 {
+		groups = "intc_irq0";
+		function = "intc";
+	};
 };
 
 &scif0 {
@@ -54,6 +64,9 @@ &scif0 {
 };
 
 &ether {
+	pinctrl-0 = <&ether_pins &phy1_pins>;
+	pinctrl-names = "default";
+
 	phy-handle = <&phy1>;
 	renesas,ether-link-active-low;
 	status = "okay";