Commit 549f11c9 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A few minor fixlets in ARM SoC irq drivers and a fix for a memory leak
  which I introduced in the last round of cleanups :("

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  genirq: Fix memory leak when calling irq_free_hwirqs()
  irqchip: spear_shirq: Fix interrupt offset
  irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive
  irqchip: armada-370-xp: Mask all interrupts during initialization.
parents e1a08b85 8844aad8
...@@ -334,6 +334,15 @@ static void armada_mpic_send_doorbell(const struct cpumask *mask, ...@@ -334,6 +334,15 @@ static void armada_mpic_send_doorbell(const struct cpumask *mask,
static void armada_xp_mpic_smp_cpu_init(void) static void armada_xp_mpic_smp_cpu_init(void)
{ {
u32 control;
int nr_irqs, i;
control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
nr_irqs = (control >> 2) & 0x3ff;
for (i = 0; i < nr_irqs; i++)
writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
/* Clear pending IPIs */ /* Clear pending IPIs */
writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
...@@ -474,7 +483,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, ...@@ -474,7 +483,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
struct device_node *parent) struct device_node *parent)
{ {
struct resource main_int_res, per_cpu_int_res; struct resource main_int_res, per_cpu_int_res;
int parent_irq; int parent_irq, nr_irqs, i;
u32 control; u32 control;
BUG_ON(of_address_to_resource(node, 0, &main_int_res)); BUG_ON(of_address_to_resource(node, 0, &main_int_res));
...@@ -496,9 +505,13 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, ...@@ -496,9 +505,13 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
BUG_ON(!per_cpu_int_base); BUG_ON(!per_cpu_int_base);
control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
nr_irqs = (control >> 2) & 0x3ff;
for (i = 0; i < nr_irqs; i++)
writel(i, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
armada_370_xp_mpic_domain = armada_370_xp_mpic_domain =
irq_domain_add_linear(node, (control >> 2) & 0x3ff, irq_domain_add_linear(node, nr_irqs,
&armada_370_xp_mpic_irq_ops, NULL); &armada_370_xp_mpic_irq_ops, NULL);
BUG_ON(!armada_370_xp_mpic_domain); BUG_ON(!armada_370_xp_mpic_domain);
......
...@@ -150,7 +150,7 @@ int __init brcmstb_l2_intc_of_init(struct device_node *np, ...@@ -150,7 +150,7 @@ int __init brcmstb_l2_intc_of_init(struct device_node *np,
/* Allocate a single Generic IRQ chip for this node */ /* Allocate a single Generic IRQ chip for this node */
ret = irq_alloc_domain_generic_chips(data->domain, 32, 1, ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
np->full_name, handle_level_irq, clr, 0, 0); np->full_name, handle_edge_irq, clr, 0, 0);
if (ret) { if (ret) {
pr_err("failed to allocate generic irq chip\n"); pr_err("failed to allocate generic irq chip\n");
goto out_free_domain; goto out_free_domain;
......
...@@ -125,7 +125,7 @@ static struct spear_shirq spear320_shirq_ras2 = { ...@@ -125,7 +125,7 @@ static struct spear_shirq spear320_shirq_ras2 = {
}; };
static struct spear_shirq spear320_shirq_ras3 = { static struct spear_shirq spear320_shirq_ras3 = {
.irq_nr = 3, .irq_nr = 7,
.irq_bit_off = 0, .irq_bit_off = 0,
.invalid_irq = 1, .invalid_irq = 1,
.regs = { .regs = {
......
...@@ -455,9 +455,9 @@ EXPORT_SYMBOL_GPL(irq_alloc_hwirqs); ...@@ -455,9 +455,9 @@ EXPORT_SYMBOL_GPL(irq_alloc_hwirqs);
*/ */
void irq_free_hwirqs(unsigned int from, int cnt) void irq_free_hwirqs(unsigned int from, int cnt)
{ {
int i; int i, j;
for (i = from; cnt > 0; i++, cnt--) { for (i = from, j = cnt; j > 0; i++, j--) {
irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE); irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
arch_teardown_hwirq(i); arch_teardown_hwirq(i);
} }
......
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