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Commit 551d3417 authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/ibus: convert to new-style nvkm_subdev 

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 49bd8da5
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Inline Side-by-side
Showing with 101 additions and 209 deletions
drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h
View file @ 551d3417
......@@ -2,31 +2,7 @@
#define __NVKM_IBUS_H__
#include <core/subdev.h>
struct nvkm_ibus {
struct nvkm_subdev subdev;
};
static inline struct nvkm_ibus *
nvkm_ibus(void *obj)
{
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_IBUS);
}
#define nvkm_ibus_create(p,e,o,d) \
nvkm_subdev_create_((p), (e), (o), 0, "PIBUS", "ibus", \
sizeof(**d), (void **)d)
#define nvkm_ibus_destroy(p) \
nvkm_subdev_destroy(&(p)->subdev)
#define nvkm_ibus_init(p) \
nvkm_subdev_init_old(&(p)->subdev)
#define nvkm_ibus_fini(p,s) \
nvkm_subdev_fini_old(&(p)->subdev, (s))
#define _nvkm_ibus_dtor _nvkm_subdev_dtor
#define _nvkm_ibus_init _nvkm_subdev_init
#define _nvkm_ibus_fini _nvkm_subdev_fini
extern struct nvkm_oclass gf100_ibus_oclass;
extern struct nvkm_oclass gk104_ibus_oclass;
extern struct nvkm_oclass gk20a_ibus_oclass;
int gf100_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **);
int gk104_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **);
int gk20a_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **);
#endif
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View file @ 551d3417
......@@ -1298,7 +1298,7 @@ nvc0_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf100_mc_new,
......@@ -1333,7 +1333,7 @@ nvc1_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf106_mc_new,
......@@ -1367,7 +1367,7 @@ nvc3_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf106_mc_new,
......@@ -1401,7 +1401,7 @@ nvc4_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf100_mc_new,
......@@ -1436,7 +1436,7 @@ nvc8_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf100_mc_new,
......@@ -1471,7 +1471,7 @@ nvce_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf100_mc_new,
......@@ -1506,7 +1506,7 @@ nvcf_chipset = {
.fuse = gf100_fuse_new,
.gpio = g94_gpio_new,
.i2c = g94_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf106_mc_new,
......@@ -1540,7 +1540,7 @@ nvd7_chipset = {
.fuse = gf100_fuse_new,
.gpio = gf119_gpio_new,
.i2c = gf117_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf106_mc_new,
......@@ -1572,7 +1572,7 @@ nvd9_chipset = {
.fuse = gf100_fuse_new,
.gpio = gf119_gpio_new,
.i2c = gf119_i2c_new,
// .ibus = gf100_ibus_new,
.ibus = gf100_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gf100_ltc_new,
// .mc = gf106_mc_new,
......@@ -1606,7 +1606,7 @@ nve4_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gf106_mc_new,
......@@ -1642,7 +1642,7 @@ nve6_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gf106_mc_new,
......@@ -1678,7 +1678,7 @@ nve7_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gf106_mc_new,
......@@ -1710,7 +1710,7 @@ nvea_chipset = {
.clk = gk20a_clk_new,
.fb = gk20a_fb_new,
.fuse = gf100_fuse_new,
// .ibus = gk20a_ibus_new,
.ibus = gk20a_ibus_new,
// .imem = gk20a_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gk20a_mc_new,
......@@ -1738,7 +1738,7 @@ nvf0_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gf106_mc_new,
......@@ -1774,7 +1774,7 @@ nvf1_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gf119_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gf106_mc_new,
......@@ -1810,7 +1810,7 @@ nv106_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gk20a_mc_new,
......@@ -1845,7 +1845,7 @@ nv108_chipset = {
.fuse = gf100_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gk104_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gk104_ltc_new,
// .mc = gk20a_mc_new,
......@@ -1880,7 +1880,7 @@ nv117_chipset = {
.fuse = gm107_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gf119_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gm107_ltc_new,
// .mc = gk20a_mc_new,
......@@ -1909,7 +1909,7 @@ nv124_chipset = {
.fuse = gm107_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gm204_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gm107_ltc_new,
// .mc = gk20a_mc_new,
......@@ -1938,7 +1938,7 @@ nv126_chipset = {
.fuse = gm107_fuse_new,
.gpio = gk104_gpio_new,
.i2c = gm204_i2c_new,
// .ibus = gk104_ibus_new,
.ibus = gk104_ibus_new,
// .imem = nv50_instmem_new,
// .ltc = gm107_ltc_new,
// .mc = gk20a_mc_new,
......@@ -1963,7 +1963,7 @@ nv12b_chipset = {
.bus = gf100_bus_new,
.fb = gk20a_fb_new,
.fuse = gm107_fuse_new,
// .ibus = gk20a_ibus_new,
.ibus = gk20a_ibus_new,
// .imem = gk20a_instmem_new,
// .ltc = gm107_ltc_new,
// .mc = gk20a_mc_new,
......
drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
View file @ 551d3417
......@@ -33,7 +33,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -56,7 +55,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -79,7 +77,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -101,7 +98,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -124,7 +120,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -146,7 +141,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -168,7 +162,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass;
......@@ -191,7 +184,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
......@@ -213,7 +205,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
......
drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
View file @ 551d3417
......@@ -33,7 +33,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
......@@ -57,7 +56,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass;
......@@ -81,7 +79,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass;
......@@ -103,7 +100,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
......@@ -121,7 +117,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass;
......@@ -145,7 +140,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass;
......@@ -169,7 +163,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
......@@ -192,7 +185,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
......
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
View file @ 551d3417
......@@ -33,7 +33,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
......@@ -67,7 +66,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
......@@ -98,7 +96,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
......@@ -125,7 +122,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
View file @ 551d3417
......@@ -29,7 +29,6 @@
#include <subdev/bios/init.h>
#include <subdev/bios/pll.h>
#include <subdev/clk/pll.h>
#include <subdev/ibus.h>
#include <subdev/vga.h>
int
......@@ -97,7 +96,6 @@ nv50_devinit_preinit(struct nvkm_devinit *base)
struct nv50_devinit *init = nv50_devinit(base);
struct nvkm_subdev *subdev = &init->base.subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_subdev *ibus = device->ibus;
/* our heuristics can't detect whether the board has had its
* devinit scripts executed or not if the display engine is
......@@ -119,13 +117,6 @@ nv50_devinit_preinit(struct nvkm_devinit *base)
init->base.post = true;
}
}
/* some boards appear to require certain init register timeouts
* to be bumped before runing devinit scripts. not a clue why
* the vbios engineers didn't make the scripts just work...
*/
if (init->base.post && ibus)
nvkm_object_init(&ibus->object);
}
void
......
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c
View file @ 551d3417
......@@ -24,46 +24,42 @@
#include <subdev/ibus.h>
static void
gf100_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i)
{
struct nvkm_subdev *subdev = &ibus->subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400));
nvkm_error(subdev, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_error(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_mask(device, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
}
static void
gf100_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
gf100_ibus_intr_rop(struct nvkm_subdev *ibus, int i)
{
struct nvkm_subdev *subdev = &ibus->subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400));
nvkm_error(subdev, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_error(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_mask(device, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
}
static void
gf100_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
gf100_ibus_intr_gpc(struct nvkm_subdev *ibus, int i)
{
struct nvkm_subdev *subdev = &ibus->subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400));
nvkm_error(subdev, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_error(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_mask(device, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
}
static void
gf100_ibus_intr(struct nvkm_subdev *subdev)
gf100_ibus_intr(struct nvkm_subdev *ibus)
{
struct nvkm_ibus *ibus = (void *)subdev;
struct nvkm_device *device = ibus->subdev.device;
struct nvkm_device *device = ibus->device;
u32 intr0 = nvkm_rd32(device, 0x121c58);
u32 intr1 = nvkm_rd32(device, 0x121c5c);
u32 hubnr = nvkm_rd32(device, 0x121c70);
......@@ -96,30 +92,18 @@ gf100_ibus_intr(struct nvkm_subdev *subdev)
}
}
static int
gf100_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nvkm_ibus *ibus;
int ret;
ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
*pobject = nv_object(ibus);
if (ret)
return ret;
static const struct nvkm_subdev_func
gf100_ibus = {
.intr = gf100_ibus_intr,
};
nv_subdev(ibus)->intr = gf100_ibus_intr;
int
gf100_ibus_new(struct nvkm_device *device, int index,
struct nvkm_subdev **pibus)
{
struct nvkm_subdev *ibus;
if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL)))
return -ENOMEM;
nvkm_subdev_ctor(&gf100_ibus, device, index, 0, ibus);
return 0;
}
struct nvkm_oclass
gf100_ibus_oclass = {
.handle = NV_SUBDEV(IBUS, 0xc0),
.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_ibus_ctor,
.dtor = _nvkm_ibus_dtor,
.init = _nvkm_ibus_init,
.fini = _nvkm_ibus_fini,
},
};
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c
View file @ 551d3417
......@@ -24,46 +24,42 @@
#include <subdev/ibus.h>
static void
gk104_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i)
{
struct nvkm_subdev *subdev = &ibus->subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800));
nvkm_error(subdev, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_error(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
}
static void
gk104_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
gk104_ibus_intr_rop(struct nvkm_subdev *ibus, int i)
{
struct nvkm_subdev *subdev = &ibus->subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800));
nvkm_error(subdev, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_error(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
}
static void
gk104_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
gk104_ibus_intr_gpc(struct nvkm_subdev *ibus, int i)
{
struct nvkm_subdev *subdev = &ibus->subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_device *device = ibus->device;
u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800));
nvkm_error(subdev, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_error(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);
nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
}
static void
gk104_ibus_intr(struct nvkm_subdev *subdev)
gk104_ibus_intr(struct nvkm_subdev *ibus)
{
struct nvkm_ibus *ibus = (void *)subdev;
struct nvkm_device *device = ibus->subdev.device;
struct nvkm_device *device = ibus->device;
u32 intr0 = nvkm_rd32(device, 0x120058);
u32 intr1 = nvkm_rd32(device, 0x12005c);
u32 hubnr = nvkm_rd32(device, 0x120070);
......@@ -97,12 +93,9 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
}
static int
gk104_ibus_init(struct nvkm_object *object)
gk104_ibus_init(struct nvkm_subdev *ibus)
{
struct nvkm_ibus *ibus = (void *)object;
struct nvkm_device *device = ibus->subdev.device;
int ret = nvkm_ibus_init(ibus);
if (ret == 0) {
struct nvkm_device *device = ibus->device;
nvkm_mask(device, 0x122318, 0x0003ffff, 0x00001000);
nvkm_mask(device, 0x12231c, 0x0003ffff, 0x00000200);
nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800);
......@@ -110,34 +103,23 @@ gk104_ibus_init(struct nvkm_object *object)
nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff);
nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000200);
nvkm_mask(device, 0x122358, 0x0003ffff, 0x00002880);
}
return ret;
}
static int
gk104_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nvkm_ibus *ibus;
int ret;
ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
*pobject = nv_object(ibus);
if (ret)
return ret;
nv_subdev(ibus)->intr = gk104_ibus_intr;
return 0;
}
struct nvkm_oclass
gk104_ibus_oclass = {
.handle = NV_SUBDEV(IBUS, 0xe0),
.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gk104_ibus_ctor,
.dtor = _nvkm_ibus_dtor,
static const struct nvkm_subdev_func
gk104_ibus = {
.preinit = gk104_ibus_init,
.init = gk104_ibus_init,
.fini = _nvkm_ibus_fini,
},
.intr = gk104_ibus_intr,
};
int
gk104_ibus_new(struct nvkm_device *device, int index,
struct nvkm_subdev **pibus)
{
struct nvkm_subdev *ibus;
if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL)))
return -ENOMEM;
nvkm_subdev_ctor(&gk104_ibus, device, index, 0, ibus);
return 0;
}
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c
View file @ 551d3417
......@@ -23,9 +23,9 @@
#include <subdev/timer.h>
static void
gk20a_ibus_init_ibus_ring(struct nvkm_ibus *ibus)
gk20a_ibus_init_ibus_ring(struct nvkm_subdev *ibus)
{
struct nvkm_device *device = ibus->subdev.device;
struct nvkm_device *device = ibus->device;
nvkm_mask(device, 0x137250, 0x3f, 0);
nvkm_mask(device, 0x000200, 0x20, 0);
......@@ -46,14 +46,13 @@ gk20a_ibus_init_ibus_ring(struct nvkm_ibus *ibus)
}
static void
gk20a_ibus_intr(struct nvkm_subdev *subdev)
gk20a_ibus_intr(struct nvkm_subdev *ibus)
{
struct nvkm_ibus *ibus = (void *)subdev;
struct nvkm_device *device = ibus->subdev.device;
struct nvkm_device *device = ibus->device;
u32 status0 = nvkm_rd32(device, 0x120058);
if (status0 & 0x7) {
nvkm_debug(subdev, "resetting ibus ring\n");
nvkm_debug(ibus, "resetting ibus ring\n");
gk20a_ibus_init_ibus_ring(ibus);
}
......@@ -66,44 +65,25 @@ gk20a_ibus_intr(struct nvkm_subdev *subdev)
}
static int
gk20a_ibus_init(struct nvkm_object *object)
gk20a_ibus_init(struct nvkm_subdev *ibus)
{
struct nvkm_ibus *ibus = (void *)object;
int ret;
ret = _nvkm_ibus_init(object);
if (ret)
return ret;
gk20a_ibus_init_ibus_ring(ibus);
return 0;
}
static int
gk20a_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nvkm_ibus *ibus;
int ret;
ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
*pobject = nv_object(ibus);
if (ret)
return ret;
static const struct nvkm_subdev_func
gk20a_ibus = {
.init = gk20a_ibus_init,
.intr = gk20a_ibus_intr,
};
nv_subdev(ibus)->intr = gk20a_ibus_intr;
int
gk20a_ibus_new(struct nvkm_device *device, int index,
struct nvkm_subdev **pibus)
{
struct nvkm_subdev *ibus;
if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL)))
return -ENOMEM;
nvkm_subdev_ctor(&gk20a_ibus, device, index, 0, ibus);
return 0;
}
struct nvkm_oclass
gk20a_ibus_oclass = {
.handle = NV_SUBDEV(IBUS, 0xea),
.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gk20a_ibus_ctor,
.dtor = _nvkm_ibus_dtor,
.init = gk20a_ibus_init,
.fini = _nvkm_ibus_fini,
},
};
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