Commit 55a5fcaf authored by Sean Wang's avatar Sean Wang Committed by Stephen Boyd

dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4

Just add binding for a fixed-factor clock axisel_d4, which would be
referenced by PWM devices on MT7623 or MT2701 SoC.

Cc: stable@vger.kernel.org
Fixes: 1de9b216 ("clk: mediatek: Add dt-bindings for MT2701 clocks")
Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 7928b2cb
......@@ -176,7 +176,8 @@
#define CLK_TOP_AUD_EXT1 156
#define CLK_TOP_AUD_EXT2 157
#define CLK_TOP_NFI1X_PAD 158
#define CLK_TOP_NR 159
#define CLK_TOP_AXISEL_D4 159
#define CLK_TOP_NR 160
/* APMIXEDSYS */
......
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