Commit 574466e8 authored by Kai Germaschewski's avatar Kai Germaschewski

ISDN/HiSax: Remove broken home-made lock primitives

The HFC subdrivers chose to use atomic ops to re-implement sth
like broken spinlocks. That's now gone. Basically all races should
be taken care of by the fact that we take cs->lock before going down
to the hardware, this locks protects from concurrent accesses from
IRQ context. Well, some rare paths (setting mode etc) don't take the
lock yet, so it's not quite done yet.
parent 9abd1799
......@@ -75,7 +75,6 @@
const char *enternow_pci_rev = "$Revision: 1.1.2.1 $";
static spinlock_t enternow_pci_lock = SPIN_LOCK_UNLOCKED;
/* *************************** I/O-Interface functions ************************************* */
......@@ -231,13 +230,8 @@ enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
BYTE sval, ir;
unsigned long flags;
if (!cs) {
printk(KERN_WARNING "enter:now PCI: Spurious interrupt!\n");
return;
}
spin_lock(&cs->lock);
sval = InByte(cs->hw.njet.base + NETJET_IRQSTAT1);
......@@ -251,7 +245,6 @@ enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
/* DMA-Interrupt: B-channel-stuff */
/* set bits in sval to indicate which page is free */
spin_lock_irqsave(&enternow_pci_lock, flags);
/* set bits in sval to indicate which page is free */
if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
......@@ -265,14 +258,8 @@ enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
sval = sval | 0x02;
else /* the 1st read page is free */
sval = sval | 0x01;
if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
{
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
spin_unlock_irqrestore(&enternow_pci_lock, flags);
return;
}
if (sval != cs->hw.njet.last_is0) { /* we have a DMA interrupt */
cs->hw.njet.irqstat0 = sval;
spin_unlock_irqrestore(&enternow_pci_lock, flags);
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
/* we have a read dma int */
......@@ -281,9 +268,8 @@ enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
/* we have a write dma int */
write_tiger(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
spin_unlock_irqrestore(&enternow_pci_lock, flags);
}
spin_unlock(&cs->lock);
}
......@@ -296,7 +282,6 @@ setup_enternow_pci(struct IsdnCard *card)
int bytecnt;
struct IsdnCardState *cs = card->cs;
char tmp[64];
unsigned long flags;
#if CONFIG_PCI
#ifdef __BIG_ENDIAN
......@@ -306,7 +291,6 @@ setup_enternow_pci(struct IsdnCard *card)
printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_ENTERNOW)
return(0);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
for ( ;; )
{
......@@ -343,9 +327,6 @@ setup_enternow_pci(struct IsdnCard *card)
cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD
save_flags(flags);
sti();
/* Reset an */
cs->hw.njet.ctrl_reg = 0x07; // gendert von 0xff
OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
......@@ -360,8 +341,6 @@ setup_enternow_pci(struct IsdnCard *card)
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((10*HZ)/1000); /* Timeout 10ms */
restore_flags(flags);
cs->hw.njet.auxd = 0x00; // war 0xc0
cs->hw.njet.dmactrl = 0;
......
......@@ -121,13 +121,10 @@ static int
SelFiFo(struct IsdnCardState *cs, u_char FiFo)
{
u_char cip;
long flags;
if (cs->hw.hfcD.fifo == FiFo)
return(1);
save_flags(flags);
cli();
switch(FiFo) {
case 0: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B1;
break;
......@@ -142,16 +139,13 @@ SelFiFo(struct IsdnCardState *cs, u_char FiFo)
case 5: cip = HFCD_FIFO | HFCD_Z1 | HFCD_REC;
break;
default:
restore_flags(flags);
debugl1(cs, "SelFiFo Error");
return(0);
}
cs->hw.hfcD.fifo = FiFo;
WaitNoBusy(cs);
cs->BC_Write_Reg(cs, HFCD_DATA, cip, 0);
sti();
WaitForBusy(cs);
restore_flags(flags);
return(2);
}
static int
......@@ -202,22 +196,18 @@ static struct sk_buff
struct IsdnCardState *cs = bcs->cs;
int idx;
int chksum;
long flags;
u_char stat, cip;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "hfc_empty_fifo");
idx = 0;
save_flags(flags);
if (count > HSCX_BUFMAX + 3) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "hfc_empty_fifo: incoming packet too large");
cip = HFCB_FIFO | HFCB_FIFO_OUT | HFCB_REC | HFCB_CHANNEL(bcs->channel);
while (idx++ < count) {
cli();
WaitNoBusy(cs);
ReadReg(cs, HFCD_DATA_NODEB, cip);
sti();
}
skb = NULL;
} else if (count < 4) {
......@@ -227,7 +217,6 @@ static struct sk_buff
#ifdef ERROR_STATISTIC
bcs->err_inv++;
#endif
cli();
while ((idx++ < count) && WaitNoBusy(cs))
ReadReg(cs, HFCD_DATA_NODEB, cip);
skb = NULL;
......@@ -237,31 +226,25 @@ static struct sk_buff
ptr = skb_put(skb, count - 3);
idx = 0;
cip = HFCB_FIFO | HFCB_FIFO_OUT | HFCB_REC | HFCB_CHANNEL(bcs->channel);
cli();
while (idx < (count - 3)) {
cli();
if (!WaitNoBusy(cs))
break;
*ptr = ReadReg(cs, HFCD_DATA_NODEB, cip);
sti();
ptr++;
idx++;
}
if (idx != count - 3) {
sti();
debugl1(cs, "RFIFO BUSY error");
printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel);
dev_kfree_skb_irq(skb);
skb = NULL;
} else {
cli();
WaitNoBusy(cs);
chksum = (ReadReg(cs, HFCD_DATA, cip) << 8);
WaitNoBusy(cs);
chksum += ReadReg(cs, HFCD_DATA, cip);
WaitNoBusy(cs);
stat = ReadReg(cs, HFCD_DATA, cip);
sti();
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
bcs->channel, chksum, stat);
......@@ -275,15 +258,11 @@ static struct sk_buff
}
}
}
sti();
WaitForBusy(cs);
cli();
WaitNoBusy(cs);
stat = ReadReg(cs, HFCD_DATA, HFCB_FIFO | HFCB_F2_INC |
HFCB_REC | HFCB_CHANNEL(bcs->channel));
sti();
WaitForBusy(cs);
restore_flags(flags);
return (skb);
}
......@@ -291,7 +270,6 @@ static void
hfc_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
long flags;
int idx, fcnt;
int count;
u_char cip;
......@@ -300,8 +278,6 @@ hfc_fill_fifo(struct BCState *bcs)
return;
if (bcs->tx_skb->len <= 0)
return;
save_flags(flags);
cli();
SelFiFo(cs, HFCB_SEND | HFCB_CHANNEL(bcs->channel));
cip = HFCB_FIFO | HFCB_F1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel);
WaitNoBusy(cs);
......@@ -311,7 +287,6 @@ hfc_fill_fifo(struct BCState *bcs)
WaitNoBusy(cs);
bcs->hw.hfc.f2 = ReadReg(cs, HFCD_DATA, cip);
bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(cs, HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel));
sti();
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
......@@ -322,7 +297,6 @@ hfc_fill_fifo(struct BCState *bcs)
if (fcnt > 30) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo more as 30 frames");
restore_flags(flags);
return;
}
count = GetFreeFifoBytes_B(bcs);
......@@ -333,25 +307,20 @@ hfc_fill_fifo(struct BCState *bcs)
if (count < bcs->tx_skb->len) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo no fifo mem");
restore_flags(flags);
return;
}
cip = HFCB_FIFO | HFCB_FIFO_IN | HFCB_SEND | HFCB_CHANNEL(bcs->channel);
idx = 0;
cli();
WaitForBusy(cs);
WaitNoBusy(cs);
WriteReg(cs, HFCD_DATA_NODEB, cip, bcs->tx_skb->data[idx++]);
while (idx < bcs->tx_skb->len) {
cli();
if (!WaitNoBusy(cs))
break;
WriteReg(cs, HFCD_DATA_NODEB, cip, bcs->tx_skb->data[idx]);
sti();
idx++;
}
if (idx != bcs->tx_skb->len) {
sti();
debugl1(cs, "FIFO Send BUSY error");
printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel);
} else {
......@@ -359,47 +328,24 @@ hfc_fill_fifo(struct BCState *bcs)
xmit_complete_b(bcs);
}
WaitForBusy(cs);
cli();
WaitNoBusy(cs);
ReadReg(cs, HFCD_DATA, HFCB_FIFO | HFCB_F1_INC | HFCB_SEND | HFCB_CHANNEL(bcs->channel));
sti();
WaitForBusy(cs);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
restore_flags(flags);
return;
}
static void
hfc_send_data(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"send_data %d blocked", bcs->channel);
}
void
main_rec_2bds0(struct BCState *bcs)
{
long flags;
struct IsdnCardState *cs = bcs->cs;
int z1, z2, rcnt;
u_char f1, f2, cip;
int receive, count = 5;
struct sk_buff *skb;
save_flags(flags);
Begin:
count--;
cli();
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs,"rec_data %d blocked", bcs->channel);
restore_flags(flags);
return;
}
SelFiFo(cs, HFCB_REC | HFCB_CHANNEL(bcs->channel));
cip = HFCB_FIFO | HFCB_F1 | HFCB_REC | HFCB_CHANNEL(bcs->channel);
WaitNoBusy(cs);
......@@ -407,15 +353,12 @@ main_rec_2bds0(struct BCState *bcs)
cip = HFCB_FIFO | HFCB_F2 | HFCB_REC | HFCB_CHANNEL(bcs->channel);
WaitNoBusy(cs);
f2 = ReadReg(cs, HFCD_DATA, cip);
sti();
if (f1 != f2) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc rec %d f1(%d) f2(%d)",
bcs->channel, f1, f2);
cli();
z1 = ReadZReg(cs, HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_CHANNEL(bcs->channel));
z2 = ReadZReg(cs, HFCB_FIFO | HFCB_Z2 | HFCB_REC | HFCB_CHANNEL(bcs->channel));
sti();
rcnt = z1 - z2;
if (rcnt < 0)
rcnt += cs->hw.hfcD.bfifosize;
......@@ -424,9 +367,7 @@ main_rec_2bds0(struct BCState *bcs)
debugl1(cs, "hfc rec %d z1(%x) z2(%x) cnt(%d)",
bcs->channel, z1, z2, rcnt);
if ((skb = hfc_empty_fifo(bcs, rcnt))) {
cli();
skb_queue_tail(&bcs->rqueue, skb);
sti();
sched_b_event(bcs, B_RCVBUFREADY);
}
rcnt = f1 -f2;
......@@ -438,10 +379,8 @@ main_rec_2bds0(struct BCState *bcs)
receive = 0;
} else
receive = 0;
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
if (count && receive)
goto Begin;
restore_flags(flags);
return;
}
......@@ -500,7 +439,7 @@ hfc_l2l1(struct PStack *st, int pr, void *arg)
switch (pr) {
case (PH_DATA | REQUEST):
xmit_data_req(st->l1.bcs, skb);
xmit_data_req_b(st->l1.bcs, skb);
break;
case (PH_PULL | INDICATION):
xmit_pull_ind_b(st->l1.bcs, skb);
......@@ -607,7 +546,6 @@ static
int receive_dmsg(struct IsdnCardState *cs)
{
struct sk_buff *skb;
long flags;
int idx;
int rcnt, z1, z2;
u_char stat, cip, f1, f2;
......@@ -615,13 +553,6 @@ int receive_dmsg(struct IsdnCardState *cs)
int count=5;
u_char *ptr;
save_flags(flags);
cli();
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_dmsg blocked");
restore_flags(flags);
return(1);
}
SelFiFo(cs, 4 | HFCD_REC);
cip = HFCD_FIFO | HFCD_F1 | HFCD_REC;
WaitNoBusy(cs);
......@@ -639,39 +570,32 @@ int receive_dmsg(struct IsdnCardState *cs)
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "hfcd recd f1(%d) f2(%d) z1(%x) z2(%x) cnt(%d)",
f1, f2, z1, z2, rcnt);
sti();
idx = 0;
cip = HFCD_FIFO | HFCD_FIFO_OUT | HFCD_REC;
if (rcnt > MAX_DFRAME_LEN + 3) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "empty_fifo d: incoming packet too large");
while (idx < rcnt) {
cli();
if (!(WaitNoBusy(cs)))
break;
ReadReg(cs, HFCD_DATA_NODEB, cip);
sti();
idx++;
}
} else if (rcnt < 4) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, "empty_fifo d: incoming packet too small");
cli();
while ((idx++ < rcnt) && WaitNoBusy(cs))
ReadReg(cs, HFCD_DATA_NODEB, cip);
} else if ((skb = dev_alloc_skb(rcnt - 3))) {
ptr = skb_put(skb, rcnt - 3);
while (idx < (rcnt - 3)) {
cli();
if (!(WaitNoBusy(cs)))
break;
*ptr = ReadReg(cs, HFCD_DATA_NODEB, cip);
sti();
idx++;
ptr++;
}
if (idx != (rcnt - 3)) {
sti();
debugl1(cs, "RFIFO D BUSY error");
printk(KERN_WARNING "HFC DFIFO channel BUSY Error\n");
dev_kfree_skb_irq(skb);
......@@ -680,14 +604,12 @@ int receive_dmsg(struct IsdnCardState *cs)
cs->err_rx++;
#endif
} else {
cli();
WaitNoBusy(cs);
chksum = (ReadReg(cs, HFCD_DATA, cip) << 8);
WaitNoBusy(cs);
chksum += ReadReg(cs, HFCD_DATA, cip);
WaitNoBusy(cs);
stat = ReadReg(cs, HFCD_DATA, cip);
sti();
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "empty_dfifo chksum %x stat %x",
chksum, stat);
......@@ -705,28 +627,21 @@ int receive_dmsg(struct IsdnCardState *cs)
}
} else
printk(KERN_WARNING "HFC: D receive out of memory\n");
sti();
WaitForBusy(cs);
cip = HFCD_FIFO | HFCD_F2_INC | HFCD_REC;
cli();
WaitNoBusy(cs);
stat = ReadReg(cs, HFCD_DATA, cip);
sti();
WaitForBusy(cs);
cip = HFCD_FIFO | HFCD_F2 | HFCD_REC;
cli();
WaitNoBusy(cs);
f2 = cs->readisac(cs, cip) & 0xf;
}
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
restore_flags(flags);
return(1);
}
static void
hfc_fill_dfifo(struct IsdnCardState *cs)
{
long flags;
int idx, fcnt;
int count;
u_char cip;
......@@ -736,8 +651,6 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
if (cs->tx_skb->len <= 0)
return;
save_flags(flags);
cli();
SelFiFo(cs, 4 | HFCD_SEND);
cip = HFCD_FIFO | HFCD_F1 | HFCD_SEND;
WaitNoBusy(cs);
......@@ -746,7 +659,6 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
cip = HFCD_FIFO | HFCD_F2 | HFCD_SEND;
cs->hw.hfcD.f2 = ReadReg(cs, HFCD_DATA, cip) & 0xf;
cs->hw.hfcD.send[cs->hw.hfcD.f1] = ReadZReg(cs, HFCD_FIFO | HFCD_Z1 | HFCD_SEND);
sti();
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "hfc_fill_Dfifo f1(%d) f2(%d) z1(%x)",
cs->hw.hfcD.f1, cs->hw.hfcD.f2,
......@@ -757,7 +669,6 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
if (fcnt > 14) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_Dfifo more as 14 frames");
restore_flags(flags);
return;
}
count = GetFreeFifoBytes_D(cs);
......@@ -767,37 +678,29 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
if (count < cs->tx_skb->len) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "hfc_fill_Dfifo no fifo mem");
restore_flags(flags);
return;
}
cip = HFCD_FIFO | HFCD_FIFO_IN | HFCD_SEND;
idx = 0;
cli();
WaitForBusy(cs);
WaitNoBusy(cs);
WriteReg(cs, HFCD_DATA_NODEB, cip, cs->tx_skb->data[idx++]);
while (idx < cs->tx_skb->len) {
cli();
if (!(WaitNoBusy(cs)))
break;
WriteReg(cs, HFCD_DATA_NODEB, cip, cs->tx_skb->data[idx]);
sti();
idx++;
}
if (idx != cs->tx_skb->len) {
sti();
debugl1(cs, "DFIFO Send BUSY error");
printk(KERN_WARNING "HFC S DFIFO channel BUSY Error\n");
}
WaitForBusy(cs);
cli();
WaitNoBusy(cs);
ReadReg(cs, HFCD_DATA, HFCD_FIFO | HFCD_F1_INC | HFCD_SEND);
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
sti();
WaitForBusy(cs);
restore_flags(flags);
return;
}
......@@ -818,12 +721,10 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
u_char exval;
struct BCState *bcs;
int count=15;
long flags;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCD irq %x %s", val,
test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags) ?
"locked" : "unlocked");
debugl1(cs, "HFCD irq %x", val);
val &= cs->hw.hfcD.int_m1;
if (val & 0x40) { /* TE state machine irq */
exval = cs->readisac(cs, HFCD_STATES) & 0xf;
......@@ -835,13 +736,6 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
val &= ~0x40;
}
while (val) {
save_flags(flags);
cli();
if (test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
cs->hw.hfcD.int_s1 |= val;
restore_flags(flags);
return;
}
if (cs->hw.hfcD.int_s1 & 0x18) {
exval = val;
val = cs->hw.hfcD.int_s1;
......@@ -866,15 +760,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
if (cs->debug)
debugl1(cs, "hfcd spurious 0x01 IRQ");
} else {
if (bcs->tx_skb) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"fill_data %d blocked", bcs->channel);
} else {
xmit_ready_b(bcs);
}
xmit_xpr_b(bcs);
}
}
if (val & 0x02) {
......@@ -882,43 +768,15 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
if (cs->debug)
debugl1(cs, "hfcd spurious 0x02 IRQ");
} else {
if (bcs->tx_skb) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs,"fill_data %d blocked", bcs->channel);
} else {
xmit_ready_b(bcs);
}
xmit_xpr_b(bcs);
}
}
if (val & 0x20) { /* receive dframe */
receive_dmsg(cs);
}
if (val & 0x04) { /* dframe transmitted */
if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
del_timer(&cs->dbusytimer);
if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
sched_d_event(cs, D_CLEARBUSY);
if (cs->tx_skb) {
if (cs->tx_skb->len) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfc_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else {
debugl1(cs, "hfc_fill_dfifo irq blocked");
}
goto afterXPR;
} else {
dev_kfree_skb_irq(cs->tx_skb);
cs->tx_cnt = 0;
cs->tx_skb = NULL;
}
}
xmit_ready(cs);
xmit_xpr_d(cs);
}
afterXPR:
if (cs->hw.hfcD.int_s1 && count--) {
val = cs->hw.hfcD.int_s1;
cs->hw.hfcD.int_s1 = 0;
......@@ -926,7 +784,6 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
debugl1(cs, "HFCD irq %x loop %d", val, 15-count);
} else
val = 0;
restore_flags(flags);
}
}
......@@ -1013,7 +870,7 @@ init2bds0(struct IsdnCardState *cs)
cs->bcs[0].hw.hfc.send = init_send_hfcd(32);
if (!cs->bcs[1].hw.hfc.send)
cs->bcs[1].hw.hfc.send = init_send_hfcd(32);
cs->BC_Send_Data = hfc_send_data;
cs->BC_Send_Data = hfc_fill_fifo;
cs->DC_Send_Data = hfc_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
......
......@@ -21,18 +21,14 @@ static inline int
WaitForBusy(struct IsdnCardState *cs)
{
int to = 130;
long flags;
u_char val;
save_flags(flags);
cli();
while (!(cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
val = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2 |
(cs->hw.hfc.cip & 3));
udelay(1);
to--;
}
restore_flags(flags);
if (!to) {
printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
return (0);
......@@ -86,15 +82,13 @@ static void
hfc_clear_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
long flags;
int idx, cnt;
int rcnt, z1, z2;
u_char cip, f1, f2;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "hfc_clear_fifo");
save_flags(flags);
cli();
cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
......@@ -141,7 +135,6 @@ hfc_clear_fifo(struct BCState *bcs)
z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
}
restore_flags(flags);
return;
}
......@@ -244,7 +237,6 @@ static void
hfc_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
long flags;
int idx, fcnt;
int count;
int z1, z2;
......@@ -255,8 +247,6 @@ hfc_fill_fifo(struct BCState *bcs)
if (bcs->tx_skb->len <= 0)
return;
save_flags(flags);
cli();
cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel);
if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
......@@ -279,7 +269,6 @@ hfc_fill_fifo(struct BCState *bcs)
if (fcnt > 30) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo more as 30 frames");
restore_flags(flags);
return;
}
count = GetFreeFifoBytes(bcs);
......@@ -299,7 +288,6 @@ hfc_fill_fifo(struct BCState *bcs)
if (count < bcs->tx_skb->len) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc_fill_fifo no fifo mem");
restore_flags(flags);
return;
}
cip = HFC_CIP | HFC_FIFO_IN | HFC_SEND | HFC_CHANNEL(bcs->channel);
......@@ -323,23 +311,19 @@ hfc_fill_fifo(struct BCState *bcs)
}
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
}
restore_flags(flags);
return;
}
void
main_irq_hfc(struct BCState *bcs)
{
long flags;
struct IsdnCardState *cs = bcs->cs;
int z1, z2, rcnt;
u_char f1, f2, cip;
int receive, transmit, count = 5;
struct sk_buff *skb;
save_flags(flags);
Begin:
cli();
count--;
cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
......@@ -372,7 +356,6 @@ main_irq_hfc(struct BCState *bcs)
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfc rec %d z1(%x) z2(%x) cnt(%d)",
bcs->channel, z1, z2, rcnt);
/* sti(); */
if ((skb = hfc_empty_fifo(bcs, rcnt))) {
skb_queue_tail(&bcs->rqueue, skb);
sched_b_event(bcs, B_RCVBUFREADY);
......@@ -380,9 +363,7 @@ main_irq_hfc(struct BCState *bcs)
}
receive = 1;
}
restore_flags(flags);
udelay(1);
cli();
if (bcs->tx_skb) {
transmit = 1;
test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
......@@ -401,7 +382,6 @@ main_irq_hfc(struct BCState *bcs)
sched_b_event(bcs, B_XMTBUFREADY);
}
}
restore_flags(flags);
if ((receive || transmit) && count)
goto Begin;
return;
......
......@@ -73,17 +73,11 @@ static const PCI_ENTRY id_list[] =
void
release_io_hfcpci(struct IsdnCardState *cs)
{
unsigned long flags;
printk(KERN_INFO "HiSax: release hfcpci at %p\n",
cs->hw.hfcpci.pci_io);
save_flags(flags);
cli();
cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */
Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2);
restore_flags(flags);
Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */
sti();
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((30 * HZ) / 1000); /* Timeout 30ms */
Write_hfc(cs, HFCPCI_CIRM, 0); /* Reset Off */
......@@ -100,10 +94,6 @@ release_io_hfcpci(struct IsdnCardState *cs)
static void
reset_hfcpci(struct IsdnCardState *cs)
{
long flags;
save_flags(flags);
cli();
pci_disable_device(cs->hw.hfcpci.pdev);
cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */
Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2);
......@@ -111,7 +101,6 @@ reset_hfcpci(struct IsdnCardState *cs)
printk(KERN_INFO "HFC_PCI: resetting card\n");
pci_set_master(cs->hw.hfcpci.pdev);
Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */
sti();
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((30 * HZ) / 1000); /* Timeout 30ms */
Write_hfc(cs, HFCPCI_CIRM, 0); /* Reset Off */
......@@ -170,7 +159,6 @@ reset_hfcpci(struct IsdnCardState *cs)
cs->hw.hfcpci.int_m2 = HFCPCI_IRQ_ENABLE;
Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2);
if (Read_hfc(cs, HFCPCI_INT_S2));
restore_flags(flags);
}
/***************************************************/
......@@ -264,12 +252,9 @@ hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type * bz, u_char * bdata, int cou
u_char *ptr, *ptr1, new_f2;
struct sk_buff *skb;
struct IsdnCardState *cs = bcs->cs;
unsigned long flags;
int total, maxlen, new_z2;
z_type *zp;
save_flags(flags);
sti();
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "hfcpci_empty_fifo");
zp = &bz->za[bz->f2]; /* point to Z-Regs */
......@@ -312,7 +297,6 @@ hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type * bz, u_char * bdata, int cou
bz->f2 = new_f2; /* next buffer */
}
restore_flags(flags);
return (skb);
}
......@@ -332,10 +316,6 @@ receive_dmsg(struct IsdnCardState *cs)
z_type *zp;
df = &((fifo_area *) (cs->hw.hfcpci.fifos))->d_chan.d_rx;
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_dmsg blocked");
return (1);
}
while (((df->f1 & D_FREG_MASK) != (df->f2 & D_FREG_MASK)) && count--) {
zp = &df->za[df->f2 & D_FREG_MASK];
rcnt = le16_to_cpu(zp->z1) - le16_to_cpu(zp->z2);
......@@ -382,7 +362,6 @@ receive_dmsg(struct IsdnCardState *cs)
} else
printk(KERN_WARNING "HFC-PCI: D receive out of memory\n");
}
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
return (1);
}
......@@ -430,9 +409,7 @@ hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type * bz, u_char * bdata)
ptr1 = bdata; /* start of buffer */
memcpy(ptr, ptr1, fcnt); /* rest */
}
cli();
skb_queue_tail(&bcs->rqueue, skb);
sti();
sched_b_event(bcs, B_RCVBUFREADY);
}
......@@ -446,7 +423,6 @@ hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type * bz, u_char * bdata)
void
main_rec_hfcpci(struct BCState *bcs)
{
long flags;
struct IsdnCardState *cs = bcs->cs;
int rcnt, real_fifo;
int receive, count = 5;
......@@ -455,8 +431,6 @@ main_rec_hfcpci(struct BCState *bcs)
u_char *bdata;
z_type *zp;
save_flags(flags);
if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) {
bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2;
......@@ -468,13 +442,6 @@ main_rec_hfcpci(struct BCState *bcs)
}
Begin:
count--;
cli();
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_data %d blocked", bcs->channel);
restore_flags(flags);
return;
}
sti();
if (bz->f1 != bz->f2) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfcpci rec %d f1(%d) f2(%d)",
......@@ -489,9 +456,7 @@ main_rec_hfcpci(struct BCState *bcs)
debugl1(cs, "hfcpci rec %d z1(%x) z2(%x) cnt(%d)",
bcs->channel, le16_to_cpu(zp->z1), le16_to_cpu(zp->z2), rcnt);
if ((skb = hfcpci_empty_fifo(bcs, bz, bdata, rcnt))) {
cli();
skb_queue_tail(&bcs->rqueue, skb);
sti();
sched_b_event(bcs, B_RCVBUFREADY);
}
rcnt = bz->f1 - bz->f2;
......@@ -510,10 +475,9 @@ main_rec_hfcpci(struct BCState *bcs)
receive = hfcpci_empty_fifo_trans(bcs, bz, bdata);
else
receive = 0;
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
if (count && receive)
goto Begin;
restore_flags(flags);
return;
}
......@@ -523,7 +487,6 @@ main_rec_hfcpci(struct BCState *bcs)
static void
hfcpci_fill_dfifo(struct IsdnCardState *cs)
{
long flags;
int fcnt;
int count, new_z1, maxlen;
dfifo_type *df;
......@@ -580,12 +543,9 @@ hfcpci_fill_dfifo(struct IsdnCardState *cs)
src += maxlen; /* new position */
memcpy(dst, src, count);
}
save_flags(flags);
cli();
df->za[new_f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); /* for next buffer */
df->za[df->f1 & D_FREG_MASK].z1 = cpu_to_le16(new_z1); /* new pos actual buffer */
df->f1 = new_f1; /* next frame */
restore_flags(flags);
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
......@@ -599,7 +559,6 @@ static void
hfcpci_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
unsigned long flags;
int maxlen, fcnt;
int count, new_z1;
bzfifo_type *bz;
......@@ -612,9 +571,6 @@ hfcpci_fill_fifo(struct BCState *bcs)
if (bcs->tx_skb->len <= 0)
return;
save_flags(flags);
sti();
if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) {
bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2;
bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txdat_b2;
......@@ -663,12 +619,9 @@ hfcpci_fill_fifo(struct BCState *bcs)
bcs->channel, bcs->tx_skb->len);
dev_kfree_skb_any(bcs->tx_skb);
cli();
bcs->tx_skb = skb_dequeue(&bcs->squeue); /* fetch next data */
sti();
}
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
restore_flags(flags);
return;
}
if (cs->debug & L1_DEB_HSCX)
......@@ -682,7 +635,6 @@ hfcpci_fill_fifo(struct BCState *bcs)
if (fcnt > (MAX_B_FRAMES - 1)) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfcpci_fill_Bfifo more as 14 frames");
restore_flags(flags);
return;
}
/* now determine free bytes in FIFO buffer */
......@@ -698,7 +650,6 @@ hfcpci_fill_fifo(struct BCState *bcs)
if (count < bcs->tx_skb->len) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "hfcpci_fill_fifo no fifo mem");
restore_flags(flags);
return;
}
count = bcs->tx_skb->len; /* get frame len */
......@@ -723,10 +674,8 @@ hfcpci_fill_fifo(struct BCState *bcs)
bcs->tx_cnt -= bcs->tx_skb->len;
xmit_complete_b(bcs);
cli();
bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */
bz->f1 = new_f1; /* next frame */
restore_flags(flags);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
return;
......@@ -773,13 +722,10 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
static int
hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
{
unsigned long flags;
int i = *(unsigned int *) ic->parm.num;
if ((ic->arg == 98) &&
(!(cs->hw.hfcpci.int_m1 & (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC + HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC)))) {
save_flags(flags);
cli();
Write_hfc(cs, HFCPCI_CLKDEL, CLKDEL_NT); /* ST-Bit delay for NT-Mode */
Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 0); /* HFC ST G0 */
udelay(10);
......@@ -793,7 +739,6 @@ hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
cs->hw.hfcpci.nt_mode = 1;
cs->hw.hfcpci.nt_timer = 0;
cs->stlist->l1.l2l1 = dch_nt_l2l1;
restore_flags(flags);
debugl1(cs, "NT mode activated");
return (0);
}
......@@ -801,8 +746,6 @@ hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
(cs->hw.hfcpci.nt_mode) || (ic->arg != 12))
return (-EINVAL);
save_flags(flags);
cli();
if (i) {
cs->logecho = 1;
cs->hw.hfcpci.trm |= 0x20; /* enable echo chan */
......@@ -825,7 +768,6 @@ hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm);
Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
restore_flags(flags);
return (0);
} /* hfcpci_auxcmd */
......@@ -835,7 +777,6 @@ hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
static void
receive_emsg(struct IsdnCardState *cs)
{
long flags;
int rcnt;
int receive, count = 5;
bzfifo_type *bz;
......@@ -845,18 +786,10 @@ receive_emsg(struct IsdnCardState *cs)
int total, maxlen, new_z2;
u_char e_buffer[256];
save_flags(flags);
bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2;
Begin:
count--;
cli();
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "echo_rec_data blocked");
restore_flags(flags);
return;
}
sti();
if (bz->f1 != bz->f2) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "hfcpci e_rec f1(%d) f2(%d)",
......@@ -928,10 +861,8 @@ receive_emsg(struct IsdnCardState *cs)
receive = 0;
} else
receive = 0;
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
if (count && receive)
goto Begin;
restore_flags(flags);
return;
} /* receive_emsg */
......@@ -945,7 +876,6 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char exval;
struct BCState *bcs;
int count = 15;
long flags;
u_char val, stat;
if (!cs) {
......@@ -963,9 +893,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
return;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFC-PCI irq %x %s", val,
test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags) ?
"locked" : "unlocked");
debugl1(cs, "HFC-PCI irq %x", val);
val &= cs->hw.hfcpci.int_m1;
if (val & 0x40) { /* state machine irq */
exval = Read_hfc(cs, HFCPCI_STATES) & 0xf;
......@@ -985,13 +913,6 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
}
while (val) {
save_flags(flags);
cli();
if (test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
cs->hw.hfcpci.int_s1 |= val;
restore_flags(flags);
return;
}
if (cs->hw.hfcpci.int_s1 & 0x18) {
exval = val;
val = cs->hw.hfcpci.int_s1;
......@@ -1018,15 +939,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug)
debugl1(cs, "hfcpci spurious 0x01 IRQ");
} else {
if (bcs->tx_skb) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
xmit_buf_ready(bcs);
}
xmit_xpr_b(bcs);
}
}
if (val & 0x02) {
......@@ -1034,15 +947,7 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug)
debugl1(cs, "hfcpci spurious 0x02 IRQ");
} else {
if (bcs->tx_skb) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
xmit_buf_ready(bcs);
}
xmit_xpr_b(bcs);
}
}
if (val & 0x20) { /* receive dframe */
......@@ -1058,7 +963,6 @@ hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "HFC-PCI irq %x loop %d", val, 15 - count);
} else
val = 0;
restore_flags(flags);
}
}
......@@ -1078,45 +982,16 @@ HFCPCI_l1hw(struct PStack *st, int pr, void *arg)
{
struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
struct sk_buff *skb = arg;
unsigned long flags;
switch (pr) {
case (PH_DATA | REQUEST):
xmit_data_req(cs, skb);
xmit_data_req_d(cs, skb);
break;
case (PH_PULL | INDICATION):
if (cs->tx_skb) {
if (cs->debug & L1_DEB_WARN)
debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
skb_queue_tail(&cs->sq, skb);
break;
}
if (cs->debug & DEB_DLOG_HEX)
LogFrame(cs, skb->data, skb->len);
if (cs->debug & DEB_DLOG_VERBOSE)
dlogframe(cs, skb, 0);
cs->tx_skb = skb;
cs->tx_cnt = 0;
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
#endif
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_dfifo(cs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "hfcpci_fill_dfifo blocked");
xmit_pull_ind_d(cs, skb);
break;
case (PH_PULL | REQUEST):
#ifdef L2FRAME_DEBUG /* psa */
if (cs->debug & L1_DEB_LAPD)
debugl1(cs, "-> PH_REQUEST_PULL");
#endif
if (!cs->tx_skb) {
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
L1L2(st, PH_PULL | CONFIRM, NULL);
} else
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
xmit_pull_req_d(st);
break;
case (HW_RESET | REQUEST):
Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 3); /* HFC ST 3 */
......@@ -1143,21 +1018,15 @@ HFCPCI_l1hw(struct PStack *st, int pr, void *arg)
case (1):
Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* tx slot */
Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* rx slot */
save_flags(flags);
cli();
cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1;
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
restore_flags(flags);
break;
case (2):
Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* tx slot */
Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* rx slot */
save_flags(flags);
cli();
cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08;
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
restore_flags(flags);
break;
default:
......@@ -1165,11 +1034,8 @@ HFCPCI_l1hw(struct PStack *st, int pr, void *arg)
debugl1(cs, "hfcpci_l1hw loop invalid %4x", (int) arg);
return;
}
save_flags(flags);
cli();
cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */
Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm);
restore_flags(flags);
break;
default:
if (cs->debug & L1_DEB_WARN)
......@@ -1187,21 +1053,6 @@ setstack_hfcpci(struct PStack *st, struct IsdnCardState *cs)
st->l1.l1hw = HFCPCI_l1hw;
}
/**************************************/
/* send B-channel data if not blocked */
/**************************************/
static void
hfcpci_send_data(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcpci_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "send_data %d blocked", bcs->channel);
}
/***************************************************************/
/* activate/deactivate hardware for selected channels and mode */
/***************************************************************/
......@@ -1209,7 +1060,6 @@ void
mode_hfcpci(struct BCState *bcs, int mode, int bc)
{
struct IsdnCardState *cs = bcs->cs;
unsigned long flags;
int fifo2;
if (cs->debug & L1_DEB_HSCX)
......@@ -1218,8 +1068,6 @@ mode_hfcpci(struct BCState *bcs, int mode, int bc)
bcs->mode = mode;
bcs->channel = bc;
fifo2 = bc;
save_flags(flags);
cli();
if (cs->chanlimit > 1) {
cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */
cs->hw.hfcpci.sctrl_e &= ~0x80;
......@@ -1324,7 +1172,6 @@ mode_hfcpci(struct BCState *bcs, int mode, int bc)
Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r);
Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt);
Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
restore_flags(flags);
}
/******************************/
......@@ -1337,7 +1184,7 @@ hfcpci_l2l1(struct PStack *st, int pr, void *arg)
switch (pr) {
case (PH_DATA | REQUEST):
xmit_data_req(st->l1.bcs, skb);
xmit_data_req_b(st->l1.bcs, skb);
break;
case (PH_PULL | INDICATION):
xmit_pull_ind_b(st->l1.bcs, skb);
......@@ -1421,7 +1268,6 @@ static void
hfcpci_bh(void *data)
{
struct IsdnCardState *cs = data;
unsigned long flags;
/* struct PStack *stptr;
*/
if (!cs)
......@@ -1449,8 +1295,6 @@ hfcpci_bh(void *data)
} else {
switch (cs->dc.hfcpci.ph_state) {
case (2):
save_flags(flags);
cli();
if (cs->hw.hfcpci.nt_timer < 0) {
cs->hw.hfcpci.nt_timer = 0;
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
......@@ -1472,17 +1316,13 @@ hfcpci_bh(void *data)
cs->hw.hfcpci.nt_timer = NT_T1_COUNT;
Write_hfc(cs, HFCPCI_STATES, 2 | HFCPCI_NT_G2_G3); /* allow G2 -> G3 transition */
}
restore_flags(flags);
break;
case (1):
case (3):
case (4):
save_flags(flags);
cli();
cs->hw.hfcpci.nt_timer = 0;
cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
restore_flags(flags);
break;
default:
break;
......@@ -1507,8 +1347,8 @@ inithfcpci(struct IsdnCardState *cs)
cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer);
INIT_WORK(&cs->work, hfcpci_bh, cs);
cs->BC_Send_Data = &hfcpci_send_data;
cs->DC_Send_Data = &hfcpci_fill_dfifo;
cs->BC_Send_Data = hfcpci_fill_fifo;
cs->DC_Send_Data = hfcpci_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
cs->bcs[0].BC_Close = close_hfcpci;
......@@ -1525,8 +1365,6 @@ inithfcpci(struct IsdnCardState *cs)
static int
hfcpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
long flags;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCPCI: card_msg %x", mt);
switch (mt) {
......@@ -1538,8 +1376,6 @@ hfcpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
return (0);
case CARD_INIT:
inithfcpci(cs);
save_flags(flags);
sti();
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((80 * HZ) / 1000); /* Timeout 80ms */
/* now switch timer interrupt off */
......@@ -1547,7 +1383,6 @@ hfcpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
/* reinit mode reg */
Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
restore_flags(flags);
return (0);
case CARD_TEST:
return (0);
......
......@@ -61,25 +61,19 @@ static u_char ccd_sp_irqtab[16] = {
/******************************/
static inline void
Write_hfc(struct IsdnCardState *cs, u_char regnum, u_char val)
{ unsigned long flags;
{
save_flags(flags);
cli();
byteout(cs->hw.hfcsx.base+1, regnum);
byteout(cs->hw.hfcsx.base, val);
restore_flags(flags);
}
static inline u_char
Read_hfc(struct IsdnCardState *cs, u_char regnum)
{ unsigned long flags;
{
u_char ret;
save_flags(flags);
cli();
byteout(cs->hw.hfcsx.base+1, regnum);
ret = bytein(cs->hw.hfcsx.base);
restore_flags(flags);
return(ret);
}
......@@ -89,20 +83,16 @@ Read_hfc(struct IsdnCardState *cs, u_char regnum)
/**************************************************/
static void
fifo_select(struct IsdnCardState *cs, u_char fifo)
{ unsigned long flags;
{
if (fifo == cs->hw.hfcsx.last_fifo)
return; /* still valid */
save_flags(flags);
cli();
byteout(cs->hw.hfcsx.base+1, HFCSX_FIF_SEL);
byteout(cs->hw.hfcsx.base, fifo);
while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */
udelay(4);
byteout(cs->hw.hfcsx.base, fifo);
while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */
restore_flags(flags);
}
/******************************************/
......@@ -111,16 +101,12 @@ fifo_select(struct IsdnCardState *cs, u_char fifo)
/******************************************/
static void
reset_fifo(struct IsdnCardState *cs, u_char fifo)
{ unsigned long flags;
save_flags(flags);
cli();
{
fifo_select(cs, fifo); /* first select the fifo */
byteout(cs->hw.hfcsx.base+1, HFCSX_CIRM);
byteout(cs->hw.hfcsx.base, cs->hw.hfcsx.cirm | 0x80); /* reset cmd */
udelay(1);
while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */
restore_flags(flags);
}
......@@ -325,15 +311,9 @@ read_fifo(struct IsdnCardState *cs, u_char fifo, int trans_max)
void
release_io_hfcsx(struct IsdnCardState *cs)
{
unsigned long flags;
save_flags(flags);
cli();
cs->hw.hfcsx.int_m2 = 0; /* interrupt output off ! */
Write_hfc(cs, HFCSX_INT_M2, cs->hw.hfcsx.int_m2);
restore_flags(flags);
Write_hfc(cs, HFCSX_CIRM, HFCSX_RESET); /* Reset On */
sti();
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((30 * HZ) / 1000); /* Timeout 30ms */
Write_hfc(cs, HFCSX_CIRM, 0); /* Reset Off */
......@@ -370,17 +350,12 @@ static int set_fifo_size(struct IsdnCardState *cs)
static void
reset_hfcsx(struct IsdnCardState *cs)
{
long flags;
save_flags(flags);
cli();
cs->hw.hfcsx.int_m2 = 0; /* interrupt output off ! */
Write_hfc(cs, HFCSX_INT_M2, cs->hw.hfcsx.int_m2);
printk(KERN_INFO "HFC_SX: resetting card\n");
while (1) {
Write_hfc(cs, HFCSX_CIRM, HFCSX_RESET | cs->hw.hfcsx.cirm ); /* Reset */
sti();
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((30 * HZ) / 1000); /* Timeout 30ms */
Write_hfc(cs, HFCSX_CIRM, cs->hw.hfcsx.cirm); /* Reset Off */
......@@ -440,7 +415,6 @@ reset_hfcsx(struct IsdnCardState *cs)
cs->hw.hfcsx.int_m2 = HFCSX_IRQ_ENABLE;
Write_hfc(cs, HFCSX_INT_M2, cs->hw.hfcsx.int_m2);
if (Read_hfc(cs, HFCSX_INT_S2));
restore_flags(flags);
}
/***************************************************/
......@@ -475,18 +449,12 @@ Sel_BCS(struct IsdnCardState *cs, int channel)
/*******************************/
/* D-channel receive procedure */
/*******************************/
static
int
static int
receive_dmsg(struct IsdnCardState *cs)
{
struct sk_buff *skb;
int count = 5;
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_dmsg blocked");
return (1);
}
do {
skb = read_fifo(cs, HFCSX_SEL_D_RX, 0);
if (skb) {
......@@ -495,7 +463,6 @@ receive_dmsg(struct IsdnCardState *cs)
}
} while (--count && skb);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
return (1);
}
......@@ -505,38 +472,24 @@ receive_dmsg(struct IsdnCardState *cs)
void
main_rec_hfcsx(struct BCState *bcs)
{
long flags;
struct IsdnCardState *cs = bcs->cs;
int count = 5;
struct sk_buff *skb;
save_flags(flags);
Begin:
count--;
cli();
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "rec_data %d blocked", bcs->channel);
restore_flags(flags);
return;
}
sti();
skb = read_fifo(cs, ((bcs->channel) && (!cs->hw.hfcsx.bswapped)) ?
HFCSX_SEL_B2_RX : HFCSX_SEL_B1_RX,
(bcs->mode == L1_MODE_TRANS) ?
HFCSX_BTRANS_THRESHOLD : 0);
if (skb) {
cli();
skb_queue_tail(&bcs->rqueue, skb);
sti();
sched_b_event(bcs, B_RCVBUFREADY);
}
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
if (count && skb)
goto Begin;
restore_flags(flags);
return;
}
......@@ -555,7 +508,6 @@ hfcsx_fill_dfifo(struct IsdnCardState *cs)
dev_kfree_skb_any(cs->tx_skb);
cs->tx_skb = NULL;
}
return;
}
/**************************/
......@@ -565,16 +517,12 @@ static void
hfcsx_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
unsigned long flags;
if (!bcs->tx_skb)
return;
if (bcs->tx_skb->len <= 0)
return;
save_flags(flags);
sti();
if (write_fifo(cs, bcs->tx_skb,
((bcs->channel) && (!cs->hw.hfcsx.bswapped)) ?
HFCSX_SEL_B2_TX : HFCSX_SEL_B1_TX,
......@@ -585,10 +533,6 @@ hfcsx_fill_fifo(struct BCState *bcs)
xmit_complete_b(bcs);
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
}
cli();
restore_flags(flags);
return;
}
/**********************************************/
......@@ -632,13 +576,10 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
static int
hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
{
unsigned long flags;
int i = *(unsigned int *) ic->parm.num;
if ((ic->arg == 98) &&
(!(cs->hw.hfcsx.int_m1 & (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC + HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC)))) {
save_flags(flags);
cli();
Write_hfc(cs, HFCSX_STATES, HFCSX_LOAD_STATE | 0); /* HFC ST G0 */
udelay(10);
cs->hw.hfcsx.sctrl |= SCTRL_MODE_NT;
......@@ -651,7 +592,6 @@ hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
cs->hw.hfcsx.nt_mode = 1;
cs->hw.hfcsx.nt_timer = 0;
cs->stlist->l1.l2l1 = dch_nt_l2l1;
restore_flags(flags);
debugl1(cs, "NT mode activated");
return (0);
}
......@@ -659,8 +599,6 @@ hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
(cs->hw.hfcsx.nt_mode) || (ic->arg != 12))
return (-EINVAL);
save_flags(flags);
cli();
if (i) {
cs->logecho = 1;
cs->hw.hfcsx.trm |= 0x20; /* enable echo chan */
......@@ -681,7 +619,6 @@ hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
Write_hfc(cs, HFCSX_TRM, cs->hw.hfcsx.trm);
Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
restore_flags(flags);
return (0);
} /* hfcsx_auxcmd */
......@@ -691,21 +628,10 @@ hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic)
static void
receive_emsg(struct IsdnCardState *cs)
{
unsigned long flags;
int count = 5;
u_char *ptr;
struct sk_buff *skb;
save_flags(flags);
cli();
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
debugl1(cs, "echo_rec_data blocked");
restore_flags(flags);
return;
}
sti();
do {
skb = read_fifo(cs, HFCSX_SEL_B2_RX, 0);
if (skb) {
......@@ -728,10 +654,6 @@ receive_emsg(struct IsdnCardState *cs)
dev_kfree_skb_any(skb);
}
} while (--count && skb);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
restore_flags(flags);
return;
} /* receive_emsg */
......@@ -745,7 +667,6 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u_char exval;
struct BCState *bcs;
int count = 15;
long flags;
u_char val, stat;
if (!cs) {
......@@ -763,9 +684,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
return;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFC-SX irq %x %s", val,
test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags) ?
"locked" : "unlocked");
debugl1(cs, "HFC-SX irq %x", val);
val &= cs->hw.hfcsx.int_m1;
if (val & 0x40) { /* state machine irq */
exval = Read_hfc(cs, HFCSX_STATES) & 0xf;
......@@ -785,13 +704,6 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER);
}
while (val) {
save_flags(flags);
cli();
if (test_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
cs->hw.hfcsx.int_s1 |= val;
restore_flags(flags);
return;
}
if (cs->hw.hfcsx.int_s1 & 0x18) {
exval = val;
val = cs->hw.hfcsx.int_s1;
......@@ -818,15 +730,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug)
debugl1(cs, "hfcsx spurious 0x01 IRQ");
} else {
if (bcs->tx_skb) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcsx_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
xmit_ready_b(bcs);
}
xmit_xpr_b(bcs);
}
}
if (val & 0x02) {
......@@ -834,15 +738,7 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug)
debugl1(cs, "hfcsx spurious 0x02 IRQ");
} else {
if (bcs->tx_skb) {
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcsx_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "fill_data %d blocked", bcs->channel);
} else {
xmit_ready_b(bcs);
}
xmit_xpr_b(bcs);
}
}
if (val & 0x20) { /* receive dframe */
......@@ -858,7 +754,6 @@ hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
debugl1(cs, "HFC-SX irq %x loop %d", val, 15 - count);
} else
val = 0;
restore_flags(flags);
}
}
......@@ -878,7 +773,6 @@ HFCSX_l1hw(struct PStack *st, int pr, void *arg)
{
struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
struct sk_buff *skb = arg;
unsigned long flags;
switch (pr) {
case (PH_DATA | REQUEST):
......@@ -915,21 +809,15 @@ HFCSX_l1hw(struct PStack *st, int pr, void *arg)
case (1):
Write_hfc(cs, HFCSX_B1_SSL, 0x80); /* tx slot */
Write_hfc(cs, HFCSX_B1_RSL, 0x80); /* rx slot */
save_flags(flags);
cli();
cs->hw.hfcsx.conn = (cs->hw.hfcsx.conn & ~7) | 1;
Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
restore_flags(flags);
break;
case (2):
Write_hfc(cs, HFCSX_B2_SSL, 0x81); /* tx slot */
Write_hfc(cs, HFCSX_B2_RSL, 0x81); /* rx slot */
save_flags(flags);
cli();
cs->hw.hfcsx.conn = (cs->hw.hfcsx.conn & ~0x38) | 0x08;
Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
restore_flags(flags);
break;
default:
......@@ -937,11 +825,8 @@ HFCSX_l1hw(struct PStack *st, int pr, void *arg)
debugl1(cs, "hfcsx_l1hw loop invalid %4x", (int) arg);
return;
}
save_flags(flags);
cli();
cs->hw.hfcsx.trm |= 0x80; /* enable IOM-loop */
Write_hfc(cs, HFCSX_TRM, cs->hw.hfcsx.trm);
restore_flags(flags);
break;
default:
if (cs->debug & L1_DEB_WARN)
......@@ -959,21 +844,6 @@ setstack_hfcsx(struct PStack *st, struct IsdnCardState *cs)
st->l1.l1hw = HFCSX_l1hw;
}
/**************************************/
/* send B-channel data if not blocked */
/**************************************/
static void
hfcsx_send_data(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
hfcsx_fill_fifo(bcs);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
} else
debugl1(cs, "send_data %d blocked", bcs->channel);
}
/***************************************************************/
/* activate/deactivate hardware for selected channels and mode */
/***************************************************************/
......@@ -981,7 +851,6 @@ void
mode_hfcsx(struct BCState *bcs, int mode, int bc)
{
struct IsdnCardState *cs = bcs->cs;
unsigned long flags;
int fifo2;
if (cs->debug & L1_DEB_HSCX)
......@@ -990,8 +859,6 @@ mode_hfcsx(struct BCState *bcs, int mode, int bc)
bcs->mode = mode;
bcs->channel = bc;
fifo2 = bc;
save_flags(flags);
cli();
if (cs->chanlimit > 1) {
cs->hw.hfcsx.bswapped = 0; /* B1 and B2 normal mode */
cs->hw.hfcsx.sctrl_e &= ~0x80;
......@@ -1085,7 +952,6 @@ mode_hfcsx(struct BCState *bcs, int mode, int bc)
reset_fifo(cs, fifo2 ? HFCSX_SEL_B2_RX : HFCSX_SEL_B1_RX);
reset_fifo(cs, fifo2 ? HFCSX_SEL_B2_TX : HFCSX_SEL_B1_TX);
}
restore_flags(flags);
}
/******************************/
......@@ -1098,7 +964,7 @@ hfcsx_l2l1(struct PStack *st, int pr, void *arg)
switch (pr) {
case (PH_DATA | REQUEST):
xmit_data_req(st->l1.bcs, skb);
xmit_data_req_b(st->l1.bcs, skb);
break;
case (PH_PULL | INDICATION):
xmit_pull_ind_b(st->l1.bcs, skb);
......@@ -1182,11 +1048,7 @@ static void
hfcsx_bh(void *data)
{
struct IsdnCardState *cs = data;
unsigned long flags;
/* struct PStack *stptr;
*/
if (!cs)
return;
if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
if (!cs->hw.hfcsx.nt_mode)
switch (cs->dc.hfcsx.ph_state) {
......@@ -1210,8 +1072,6 @@ hfcsx_bh(void *data)
} else {
switch (cs->dc.hfcsx.ph_state) {
case (2):
save_flags(flags);
cli();
if (cs->hw.hfcsx.nt_timer < 0) {
cs->hw.hfcsx.nt_timer = 0;
cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER;
......@@ -1233,17 +1093,13 @@ hfcsx_bh(void *data)
cs->hw.hfcsx.nt_timer = NT_T1_COUNT;
Write_hfc(cs, HFCSX_STATES, 2 | HFCSX_NT_G2_G3); /* allow G2 -> G3 transition */
}
restore_flags(flags);
break;
case (1):
case (3):
case (4):
save_flags(flags);
cli();
cs->hw.hfcsx.nt_timer = 0;
cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER;
Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
restore_flags(flags);
break;
default:
break;
......@@ -1268,8 +1124,8 @@ inithfcsx(struct IsdnCardState *cs)
cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer);
INIT_WORK(&cs->work, hfcsx_bh, cs);
cs->BC_Send_Data = &hfcsx_send_data;
cs->DC_Send_Data = &hfcsx_fill_dfifo;
cs->BC_Send_Data = hfcsx_fill_fifo;
cs->DC_Send_Data = hfcsx_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
cs->bcs[0].BC_Close = close_hfcsx;
......@@ -1286,8 +1142,6 @@ inithfcsx(struct IsdnCardState *cs)
static int
hfcsx_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
long flags;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCSX: card_msg %x", mt);
switch (mt) {
......@@ -1299,8 +1153,6 @@ hfcsx_card_msg(struct IsdnCardState *cs, int mt, void *arg)
return (0);
case CARD_INIT:
inithfcsx(cs);
save_flags(flags);
sti();
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((80 * HZ) / 1000); /* Timeout 80ms */
/* now switch timer interrupt off */
......@@ -1308,7 +1160,6 @@ hfcsx_card_msg(struct IsdnCardState *cs, int mt, void *arg)
Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
/* reinit mode reg */
Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m);
restore_flags(flags);
return (0);
case CARD_TEST:
return (0);
......@@ -1333,7 +1184,6 @@ setup_hfcsx(struct IsdnCard *card)
{
struct IsdnCardState *cs = card->cs;
char tmp[64];
unsigned long flags;
strcpy(tmp, hfcsx_revision);
printk(KERN_INFO "HiSax: HFC-SX driver Rev. %s\n", HiSax_getrev(tmp));
......@@ -1417,16 +1267,12 @@ setup_hfcsx(struct IsdnCard *card)
release_region(cs->hw.hfcsx.base, 2);
return(0);
}
save_flags(flags);
cli();
if (!(cs->hw.hfcsx.extra = (void *)
kmalloc(sizeof(struct hfcsx_extra), GFP_ATOMIC))) {
restore_flags(flags);
release_region(cs->hw.hfcsx.base, 2);
printk(KERN_WARNING "HFC-SX: unable to allocate memory\n");
return(0);
}
restore_flags(flags);
printk(KERN_INFO
"HFC-S%c chip detected at base 0x%x IRQ %d HZ %d\n",
......
......@@ -866,7 +866,6 @@ struct icc_chip {
#define FLG_TWO_DCHAN 4
#define FLG_L1_DBUSY 5
#define FLG_DBUSY_TIMER 6
#define FLG_LOCK_ATOMIC 7
#define FLG_ARCOFI_TIMER 8
#define FLG_ARCOFI_ERROR 9
#define FLG_HW_L1_UINT 10
......
......@@ -60,10 +60,6 @@ netjet_s_interrupt(int intno, void *dev_id, struct pt_regs *regs)
sval = sval | 0x01;
if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
{
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
goto unlock;
}
cs->hw.njet.irqstat0 = sval;
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
......@@ -74,7 +70,6 @@ netjet_s_interrupt(int intno, void *dev_id, struct pt_regs *regs)
/* we have a write dma int */
write_tiger(cs);
/* end new code 13/07/00 GE */
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
}
/* if (!testcnt--) {
cs->hw.njet.dmactrl = 0;
......@@ -83,7 +78,6 @@ netjet_s_interrupt(int intno, void *dev_id, struct pt_regs *regs)
byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
}
*/
unlock:
spin_unlock(&cs->lock);
}
......@@ -142,7 +136,6 @@ setup_netjet_s(struct IsdnCard *card)
printk(KERN_INFO "HiSax: Traverse Tech. NETjet-S driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_NETJET_S)
return(0);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
#if CONFIG_PCI
......
......@@ -60,9 +60,6 @@ netjet_u_interrupt(int intno, void *dev_id, struct pt_regs *regs)
sval = sval | 0x01;
if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
{
if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
goto unlock;
}
cs->hw.njet.irqstat0 = sval;
if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
......@@ -73,7 +70,6 @@ netjet_u_interrupt(int intno, void *dev_id, struct pt_regs *regs)
/* we have a write dma int */
write_tiger(cs);
/* end new code 13/07/00 GE */
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
}
/* if (!testcnt--) {
cs->hw.njet.dmactrl = 0;
......@@ -82,7 +78,6 @@ netjet_u_interrupt(int intno, void *dev_id, struct pt_regs *regs)
byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
}
*/
unlock:
spin_unlock(&cs->lock);
}
......@@ -146,7 +141,6 @@ setup_netjet_u(struct IsdnCard *card)
printk(KERN_INFO "HiSax: Traverse Tech. NETspider-U driver Rev. %s\n", HiSax_getrev(tmp));
if (cs->typ != ISDN_CTYPE_NETJET_U)
return(0);
test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
#if CONFIG_PCI
......
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