Commit 57f04102 authored by David S. Miller's avatar David S. Miller

Merge branch 'mscc-ocelot-tc-flower'

Horatiu Vultur says:

====================
Add hw offload of TC flower on MSCC Ocelot

This patch series enables hardware offload for flower filter used in
traffic controller on MSCC Ocelot board.

v2->v3 changes:
 - remove the check for shared blocks

v1->v2 changes:
 - when declaring variables use reverse christmas tree
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 6345266a fe3490e6
......@@ -132,11 +132,12 @@ switch@1010000 {
<0x1270000 0x100>,
<0x1280000 0x100>,
<0x1800000 0x80000>,
<0x1880000 0x10000>;
<0x1880000 0x10000>,
<0x1060000 0x10000>;
reg-names = "sys", "rew", "qs", "port0", "port1",
"port2", "port3", "port4", "port5", "port6",
"port7", "port8", "port9", "port10", "qsys",
"ana";
"ana", "s2";
interrupts = <21 22>;
interrupt-names = "xtr", "inj";
......
# SPDX-License-Identifier: (GPL-2.0 OR MIT)
obj-$(CONFIG_MSCC_OCELOT_SWITCH) += mscc_ocelot_common.o
mscc_ocelot_common-y := ocelot.o ocelot_io.o
mscc_ocelot_common-y += ocelot_regs.o ocelot_tc.o ocelot_police.o
mscc_ocelot_common-y += ocelot_regs.o ocelot_tc.o ocelot_police.o ocelot_ace.o ocelot_flower.o
obj-$(CONFIG_MSCC_OCELOT_SWITCH_OCELOT) += ocelot_board.o
......@@ -22,6 +22,7 @@
#include <net/switchdev.h>
#include "ocelot.h"
#include "ocelot_ace.h"
#define TABLE_UPDATE_SLEEP_US 10
#define TABLE_UPDATE_TIMEOUT_US 100000
......@@ -130,6 +131,13 @@ static void ocelot_mact_init(struct ocelot *ocelot)
ocelot_write(ocelot, MACACCESS_CMD_INIT, ANA_TABLES_MACACCESS);
}
static void ocelot_vcap_enable(struct ocelot *ocelot, struct ocelot_port *port)
{
ocelot_write_gix(ocelot, ANA_PORT_VCAP_S2_CFG_S2_ENA |
ANA_PORT_VCAP_S2_CFG_S2_IP6_CFG(0xa),
ANA_PORT_VCAP_S2_CFG, port->chip_port);
}
static inline u32 ocelot_vlant_read_vlanaccess(struct ocelot *ocelot)
{
return ocelot_read(ocelot, ANA_TABLES_VLANACCESS);
......@@ -1662,6 +1670,9 @@ int ocelot_probe_port(struct ocelot *ocelot, u8 port,
/* Basic L2 initialization */
ocelot_vlan_port_apply(ocelot, ocelot_port);
/* Enable vcap lookups */
ocelot_vcap_enable(ocelot, ocelot_port);
return 0;
err_register_netdev:
......@@ -1696,6 +1707,7 @@ int ocelot_init(struct ocelot *ocelot)
ocelot_mact_init(ocelot);
ocelot_vlan_init(ocelot);
ocelot_ace_init(ocelot);
for (port = 0; port < ocelot->num_phys_ports; port++) {
/* Clear all counters (5 groups) */
......@@ -1808,6 +1820,7 @@ void ocelot_deinit(struct ocelot *ocelot)
{
destroy_workqueue(ocelot->stats_queue);
mutex_destroy(&ocelot->stats_lock);
ocelot_ace_deinit();
}
EXPORT_SYMBOL(ocelot_deinit);
......
......@@ -69,6 +69,7 @@ enum ocelot_target {
QSYS,
REW,
SYS,
S2,
HSIO,
TARGET_MAX,
};
......@@ -335,6 +336,13 @@ enum ocelot_reg {
SYS_CM_DATA_RD,
SYS_CM_OP,
SYS_CM_DATA,
S2_CORE_UPDATE_CTRL = S2 << TARGET_OFFSET,
S2_CORE_MV_CFG,
S2_CACHE_ENTRY_DAT,
S2_CACHE_MASK_DAT,
S2_CACHE_ACTION_DAT,
S2_CACHE_CNT_DAT,
S2_CACHE_TG_DAT,
};
enum ocelot_regfield {
......
This diff is collapsed.
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/* Microsemi Ocelot Switch driver
* Copyright (c) 2019 Microsemi Corporation
*/
#ifndef _MSCC_OCELOT_ACE_H_
#define _MSCC_OCELOT_ACE_H_
#include "ocelot.h"
#include <net/sch_generic.h>
#include <net/pkt_cls.h>
struct ocelot_ipv4 {
u8 addr[4];
};
enum ocelot_vcap_bit {
OCELOT_VCAP_BIT_ANY,
OCELOT_VCAP_BIT_0,
OCELOT_VCAP_BIT_1
};
struct ocelot_vcap_u8 {
u8 value[1];
u8 mask[1];
};
struct ocelot_vcap_u16 {
u8 value[2];
u8 mask[2];
};
struct ocelot_vcap_u24 {
u8 value[3];
u8 mask[3];
};
struct ocelot_vcap_u32 {
u8 value[4];
u8 mask[4];
};
struct ocelot_vcap_u40 {
u8 value[5];
u8 mask[5];
};
struct ocelot_vcap_u48 {
u8 value[6];
u8 mask[6];
};
struct ocelot_vcap_u64 {
u8 value[8];
u8 mask[8];
};
struct ocelot_vcap_u128 {
u8 value[16];
u8 mask[16];
};
struct ocelot_vcap_vid {
u16 value;
u16 mask;
};
struct ocelot_vcap_ipv4 {
struct ocelot_ipv4 value;
struct ocelot_ipv4 mask;
};
struct ocelot_vcap_udp_tcp {
u16 value;
u16 mask;
};
enum ocelot_ace_type {
OCELOT_ACE_TYPE_ANY,
OCELOT_ACE_TYPE_ETYPE,
OCELOT_ACE_TYPE_LLC,
OCELOT_ACE_TYPE_SNAP,
OCELOT_ACE_TYPE_ARP,
OCELOT_ACE_TYPE_IPV4,
OCELOT_ACE_TYPE_IPV6
};
struct ocelot_ace_vlan {
struct ocelot_vcap_vid vid; /* VLAN ID (12 bit) */
struct ocelot_vcap_u8 pcp; /* PCP (3 bit) */
enum ocelot_vcap_bit dei; /* DEI */
enum ocelot_vcap_bit tagged; /* Tagged/untagged frame */
};
struct ocelot_ace_frame_etype {
struct ocelot_vcap_u48 dmac;
struct ocelot_vcap_u48 smac;
struct ocelot_vcap_u16 etype;
struct ocelot_vcap_u16 data; /* MAC data */
};
struct ocelot_ace_frame_llc {
struct ocelot_vcap_u48 dmac;
struct ocelot_vcap_u48 smac;
/* LLC header: DSAP at byte 0, SSAP at byte 1, Control at byte 2 */
struct ocelot_vcap_u32 llc;
};
struct ocelot_ace_frame_snap {
struct ocelot_vcap_u48 dmac;
struct ocelot_vcap_u48 smac;
/* SNAP header: Organization Code at byte 0, Type at byte 3 */
struct ocelot_vcap_u40 snap;
};
struct ocelot_ace_frame_arp {
struct ocelot_vcap_u48 smac;
enum ocelot_vcap_bit arp; /* Opcode ARP/RARP */
enum ocelot_vcap_bit req; /* Opcode request/reply */
enum ocelot_vcap_bit unknown; /* Opcode unknown */
enum ocelot_vcap_bit smac_match; /* Sender MAC matches SMAC */
enum ocelot_vcap_bit dmac_match; /* Target MAC matches DMAC */
/**< Protocol addr. length 4, hardware length 6 */
enum ocelot_vcap_bit length;
enum ocelot_vcap_bit ip; /* Protocol address type IP */
enum ocelot_vcap_bit ethernet; /* Hardware address type Ethernet */
struct ocelot_vcap_ipv4 sip; /* Sender IP address */
struct ocelot_vcap_ipv4 dip; /* Target IP address */
};
struct ocelot_ace_frame_ipv4 {
enum ocelot_vcap_bit ttl; /* TTL zero */
enum ocelot_vcap_bit fragment; /* Fragment */
enum ocelot_vcap_bit options; /* Header options */
struct ocelot_vcap_u8 ds;
struct ocelot_vcap_u8 proto; /* Protocol */
struct ocelot_vcap_ipv4 sip; /* Source IP address */
struct ocelot_vcap_ipv4 dip; /* Destination IP address */
struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */
struct ocelot_vcap_udp_tcp sport; /* UDP/TCP: Source port */
struct ocelot_vcap_udp_tcp dport; /* UDP/TCP: Destination port */
enum ocelot_vcap_bit tcp_fin;
enum ocelot_vcap_bit tcp_syn;
enum ocelot_vcap_bit tcp_rst;
enum ocelot_vcap_bit tcp_psh;
enum ocelot_vcap_bit tcp_ack;
enum ocelot_vcap_bit tcp_urg;
enum ocelot_vcap_bit sip_eq_dip; /* SIP equals DIP */
enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT */
enum ocelot_vcap_bit seq_zero; /* TCP sequence number is zero */
};
struct ocelot_ace_frame_ipv6 {
struct ocelot_vcap_u8 proto; /* IPv6 protocol */
struct ocelot_vcap_u128 sip; /* IPv6 source (byte 0-7 ignored) */
enum ocelot_vcap_bit ttl; /* TTL zero */
struct ocelot_vcap_u8 ds;
struct ocelot_vcap_u48 data; /* Not UDP/TCP: IP data */
struct ocelot_vcap_udp_tcp sport;
struct ocelot_vcap_udp_tcp dport;
enum ocelot_vcap_bit tcp_fin;
enum ocelot_vcap_bit tcp_syn;
enum ocelot_vcap_bit tcp_rst;
enum ocelot_vcap_bit tcp_psh;
enum ocelot_vcap_bit tcp_ack;
enum ocelot_vcap_bit tcp_urg;
enum ocelot_vcap_bit sip_eq_dip; /* SIP equals DIP */
enum ocelot_vcap_bit sport_eq_dport; /* SPORT equals DPORT */
enum ocelot_vcap_bit seq_zero; /* TCP sequence number is zero */
};
enum ocelot_ace_action {
OCELOT_ACL_ACTION_DROP,
OCELOT_ACL_ACTION_TRAP,
};
struct ocelot_ace_stats {
u64 bytes;
u64 pkts;
u64 used;
};
struct ocelot_ace_rule {
struct list_head list;
struct ocelot_port *port;
u16 prio;
u32 id;
enum ocelot_ace_action action;
struct ocelot_ace_stats stats;
int chip_port;
enum ocelot_vcap_bit dmac_mc;
enum ocelot_vcap_bit dmac_bc;
struct ocelot_ace_vlan vlan;
enum ocelot_ace_type type;
union {
/* ocelot_ACE_TYPE_ANY: No specific fields */
struct ocelot_ace_frame_etype etype;
struct ocelot_ace_frame_llc llc;
struct ocelot_ace_frame_snap snap;
struct ocelot_ace_frame_arp arp;
struct ocelot_ace_frame_ipv4 ipv4;
struct ocelot_ace_frame_ipv6 ipv6;
} frame;
};
struct ocelot_acl_block {
struct list_head rules;
struct ocelot *ocelot;
int count;
};
int ocelot_ace_rule_offload_add(struct ocelot_ace_rule *rule);
int ocelot_ace_rule_offload_del(struct ocelot_ace_rule *rule);
int ocelot_ace_rule_stats_update(struct ocelot_ace_rule *rule);
int ocelot_ace_init(struct ocelot *ocelot);
void ocelot_ace_deinit(void);
int ocelot_setup_tc_block_flower_bind(struct ocelot_port *port,
struct tc_block_offload *f);
void ocelot_setup_tc_block_flower_unbind(struct ocelot_port *port,
struct tc_block_offload *f);
#endif /* _MSCC_OCELOT_ACE_H_ */
......@@ -188,6 +188,7 @@ static int mscc_ocelot_probe(struct platform_device *pdev)
{ QSYS, "qsys" },
{ ANA, "ana" },
{ QS, "qs" },
{ S2, "s2" },
};
if (!np && !pdev->dev.platform_data)
......
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Microsemi Ocelot Switch driver
* Copyright (c) 2019 Microsemi Corporation
*/
#include <net/pkt_cls.h>
#include <net/tc_act/tc_gact.h>
#include "ocelot_ace.h"
struct ocelot_port_block {
struct ocelot_acl_block *block;
struct ocelot_port *port;
};
static u16 get_prio(u32 prio)
{
/* prio starts from 0x1000 while the ids starts from 0 */
return prio >> 16;
}
static int ocelot_flower_parse_action(struct tc_cls_flower_offload *f,
struct ocelot_ace_rule *rule)
{
const struct flow_action_entry *a;
int i;
if (f->rule->action.num_entries != 1)
return -EOPNOTSUPP;
flow_action_for_each(i, a, &f->rule->action) {
switch (a->id) {
case FLOW_ACTION_DROP:
rule->action = OCELOT_ACL_ACTION_DROP;
break;
case FLOW_ACTION_TRAP:
rule->action = OCELOT_ACL_ACTION_TRAP;
break;
default:
return -EOPNOTSUPP;
}
}
return 0;
}
static int ocelot_flower_parse(struct tc_cls_flower_offload *f,
struct ocelot_ace_rule *ocelot_rule)
{
struct flow_rule *rule = tc_cls_flower_offload_flow_rule(f);
struct flow_dissector *dissector = rule->match.dissector;
if (dissector->used_keys &
~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
BIT(FLOW_DISSECTOR_KEY_BASIC) |
BIT(FLOW_DISSECTOR_KEY_PORTS) |
BIT(FLOW_DISSECTOR_KEY_VLAN) |
BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS))) {
return -EOPNOTSUPP;
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
struct flow_match_control match;
flow_rule_match_control(rule, &match);
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
struct flow_match_eth_addrs match;
u16 proto = ntohs(f->common.protocol);
/* The hw support mac matches only for MAC_ETYPE key,
* therefore if other matches(port, tcp flags, etc) are added
* then just bail out
*/
if ((dissector->used_keys &
(BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
BIT(FLOW_DISSECTOR_KEY_BASIC) |
BIT(FLOW_DISSECTOR_KEY_CONTROL))) !=
(BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
BIT(FLOW_DISSECTOR_KEY_BASIC) |
BIT(FLOW_DISSECTOR_KEY_CONTROL)))
return -EOPNOTSUPP;
if (proto == ETH_P_IP ||
proto == ETH_P_IPV6 ||
proto == ETH_P_ARP)
return -EOPNOTSUPP;
flow_rule_match_eth_addrs(rule, &match);
ocelot_rule->type = OCELOT_ACE_TYPE_ETYPE;
ether_addr_copy(ocelot_rule->frame.etype.dmac.value,
match.key->dst);
ether_addr_copy(ocelot_rule->frame.etype.smac.value,
match.key->src);
ether_addr_copy(ocelot_rule->frame.etype.dmac.mask,
match.mask->dst);
ether_addr_copy(ocelot_rule->frame.etype.smac.mask,
match.mask->src);
goto finished_key_parsing;
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
struct flow_match_basic match;
flow_rule_match_basic(rule, &match);
if (ntohs(match.key->n_proto) == ETH_P_IP) {
ocelot_rule->type = OCELOT_ACE_TYPE_IPV4;
ocelot_rule->frame.ipv4.proto.value[0] =
match.key->ip_proto;
ocelot_rule->frame.ipv4.proto.mask[0] =
match.mask->ip_proto;
}
if (ntohs(match.key->n_proto) == ETH_P_IPV6) {
ocelot_rule->type = OCELOT_ACE_TYPE_IPV6;
ocelot_rule->frame.ipv6.proto.value[0] =
match.key->ip_proto;
ocelot_rule->frame.ipv6.proto.mask[0] =
match.mask->ip_proto;
}
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV4_ADDRS) &&
ntohs(f->common.protocol) == ETH_P_IP) {
struct flow_match_ipv4_addrs match;
u8 *tmp;
flow_rule_match_ipv4_addrs(rule, &match);
tmp = &ocelot_rule->frame.ipv4.sip.value.addr[0];
memcpy(tmp, &match.key->src, 4);
tmp = &ocelot_rule->frame.ipv4.sip.mask.addr[0];
memcpy(tmp, &match.mask->src, 4);
tmp = &ocelot_rule->frame.ipv4.dip.value.addr[0];
memcpy(tmp, &match.key->dst, 4);
tmp = &ocelot_rule->frame.ipv4.dip.mask.addr[0];
memcpy(tmp, &match.mask->dst, 4);
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV6_ADDRS) &&
ntohs(f->common.protocol) == ETH_P_IPV6) {
return -EOPNOTSUPP;
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
struct flow_match_ports match;
flow_rule_match_ports(rule, &match);
ocelot_rule->frame.ipv4.sport.value = ntohs(match.key->src);
ocelot_rule->frame.ipv4.sport.mask = ntohs(match.mask->src);
ocelot_rule->frame.ipv4.dport.value = ntohs(match.key->dst);
ocelot_rule->frame.ipv4.dport.mask = ntohs(match.mask->dst);
}
if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
struct flow_match_vlan match;
flow_rule_match_vlan(rule, &match);
ocelot_rule->type = OCELOT_ACE_TYPE_ANY;
ocelot_rule->vlan.vid.value = match.key->vlan_id;
ocelot_rule->vlan.vid.mask = match.mask->vlan_id;
ocelot_rule->vlan.pcp.value[0] = match.key->vlan_priority;
ocelot_rule->vlan.pcp.mask[0] = match.mask->vlan_priority;
}
finished_key_parsing:
ocelot_rule->prio = get_prio(f->common.prio);
ocelot_rule->id = f->cookie;
return ocelot_flower_parse_action(f, ocelot_rule);
}
static
struct ocelot_ace_rule *ocelot_ace_rule_create(struct tc_cls_flower_offload *f,
struct ocelot_port_block *block)
{
struct ocelot_ace_rule *rule;
rule = kzalloc(sizeof(*rule), GFP_KERNEL);
if (!rule)
return NULL;
rule->port = block->port;
rule->chip_port = block->port->chip_port;
return rule;
}
static int ocelot_flower_replace(struct tc_cls_flower_offload *f,
struct ocelot_port_block *port_block)
{
struct ocelot_ace_rule *rule;
int ret;
rule = ocelot_ace_rule_create(f, port_block);
if (!rule)
return -ENOMEM;
ret = ocelot_flower_parse(f, rule);
if (ret) {
kfree(rule);
return ret;
}
ret = ocelot_ace_rule_offload_add(rule);
if (ret)
return ret;
port_block->port->tc.offload_cnt++;
return 0;
}
static int ocelot_flower_destroy(struct tc_cls_flower_offload *f,
struct ocelot_port_block *port_block)
{
struct ocelot_ace_rule rule;
int ret;
rule.prio = get_prio(f->common.prio);
rule.port = port_block->port;
rule.id = f->cookie;
ret = ocelot_ace_rule_offload_del(&rule);
if (ret)
return ret;
port_block->port->tc.offload_cnt--;
return 0;
}
static int ocelot_flower_stats_update(struct tc_cls_flower_offload *f,
struct ocelot_port_block *port_block)
{
struct ocelot_ace_rule rule;
int ret;
rule.prio = get_prio(f->common.prio);
rule.port = port_block->port;
rule.id = f->cookie;
ret = ocelot_ace_rule_stats_update(&rule);
if (ret)
return ret;
flow_stats_update(&f->stats, 0x0, rule.stats.pkts, 0x0);
return 0;
}
static int ocelot_setup_tc_cls_flower(struct tc_cls_flower_offload *f,
struct ocelot_port_block *port_block)
{
switch (f->command) {
case TC_CLSFLOWER_REPLACE:
return ocelot_flower_replace(f, port_block);
case TC_CLSFLOWER_DESTROY:
return ocelot_flower_destroy(f, port_block);
case TC_CLSFLOWER_STATS:
return ocelot_flower_stats_update(f, port_block);
default:
return -EOPNOTSUPP;
}
}
static int ocelot_setup_tc_block_cb_flower(enum tc_setup_type type,
void *type_data, void *cb_priv)
{
struct ocelot_port_block *port_block = cb_priv;
if (!tc_cls_can_offload_and_chain0(port_block->port->dev, type_data))
return -EOPNOTSUPP;
switch (type) {
case TC_SETUP_CLSFLOWER:
return ocelot_setup_tc_cls_flower(type_data, cb_priv);
case TC_SETUP_CLSMATCHALL:
return 0;
default:
return -EOPNOTSUPP;
}
}
static struct ocelot_port_block*
ocelot_port_block_create(struct ocelot_port *port)
{
struct ocelot_port_block *port_block;
port_block = kzalloc(sizeof(*port_block), GFP_KERNEL);
if (!port_block)
return NULL;
port_block->port = port;
return port_block;
}
static void ocelot_port_block_destroy(struct ocelot_port_block *block)
{
kfree(block);
}
int ocelot_setup_tc_block_flower_bind(struct ocelot_port *port,
struct tc_block_offload *f)
{
struct ocelot_port_block *port_block;
struct tcf_block_cb *block_cb;
int ret;
if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_EGRESS)
return -EOPNOTSUPP;
block_cb = tcf_block_cb_lookup(f->block,
ocelot_setup_tc_block_cb_flower, port);
if (!block_cb) {
port_block = ocelot_port_block_create(port);
if (!port_block)
return -ENOMEM;
block_cb =
__tcf_block_cb_register(f->block,
ocelot_setup_tc_block_cb_flower,
port, port_block, f->extack);
if (IS_ERR(block_cb)) {
ret = PTR_ERR(block_cb);
goto err_cb_register;
}
} else {
port_block = tcf_block_cb_priv(block_cb);
}
tcf_block_cb_incref(block_cb);
return 0;
err_cb_register:
ocelot_port_block_destroy(port_block);
return ret;
}
void ocelot_setup_tc_block_flower_unbind(struct ocelot_port *port,
struct tc_block_offload *f)
{
struct ocelot_port_block *port_block;
struct tcf_block_cb *block_cb;
block_cb = tcf_block_cb_lookup(f->block,
ocelot_setup_tc_block_cb_flower, port);
if (!block_cb)
return;
port_block = tcf_block_cb_priv(block_cb);
if (!tcf_block_cb_decref(block_cb)) {
tcf_block_cb_unregister(f->block,
ocelot_setup_tc_block_cb_flower, port);
ocelot_port_block_destroy(port_block);
}
}
......@@ -224,12 +224,23 @@ static const u32 ocelot_sys_regmap[] = {
REG(SYS_PTP_CFG, 0x0006c4),
};
static const u32 ocelot_s2_regmap[] = {
REG(S2_CORE_UPDATE_CTRL, 0x000000),
REG(S2_CORE_MV_CFG, 0x000004),
REG(S2_CACHE_ENTRY_DAT, 0x000008),
REG(S2_CACHE_MASK_DAT, 0x000108),
REG(S2_CACHE_ACTION_DAT, 0x000208),
REG(S2_CACHE_CNT_DAT, 0x000308),
REG(S2_CACHE_TG_DAT, 0x000388),
};
static const u32 *ocelot_regmap[] = {
[ANA] = ocelot_ana_regmap,
[QS] = ocelot_qs_regmap,
[QSYS] = ocelot_qsys_regmap,
[REW] = ocelot_rew_regmap,
[SYS] = ocelot_sys_regmap,
[S2] = ocelot_s2_regmap,
};
static const struct reg_field ocelot_regfields[] = {
......
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/* Microsemi Ocelot Switch driver
* Copyright (c) 2018 Microsemi Corporation
*/
#ifndef _OCELOT_S2_CORE_H_
#define _OCELOT_S2_CORE_H_
#define S2_CORE_UPDATE_CTRL_UPDATE_CMD(x) (((x) << 22) & GENMASK(24, 22))
#define S2_CORE_UPDATE_CTRL_UPDATE_CMD_M GENMASK(24, 22)
#define S2_CORE_UPDATE_CTRL_UPDATE_CMD_X(x) (((x) & GENMASK(24, 22)) >> 22)
#define S2_CORE_UPDATE_CTRL_UPDATE_ENTRY_DIS BIT(21)
#define S2_CORE_UPDATE_CTRL_UPDATE_ACTION_DIS BIT(20)
#define S2_CORE_UPDATE_CTRL_UPDATE_CNT_DIS BIT(19)
#define S2_CORE_UPDATE_CTRL_UPDATE_ADDR(x) (((x) << 3) & GENMASK(18, 3))
#define S2_CORE_UPDATE_CTRL_UPDATE_ADDR_M GENMASK(18, 3)
#define S2_CORE_UPDATE_CTRL_UPDATE_ADDR_X(x) (((x) & GENMASK(18, 3)) >> 3)
#define S2_CORE_UPDATE_CTRL_UPDATE_SHOT BIT(2)
#define S2_CORE_UPDATE_CTRL_CLEAR_CACHE BIT(1)
#define S2_CORE_UPDATE_CTRL_MV_TRAFFIC_IGN BIT(0)
#define S2_CORE_MV_CFG_MV_NUM_POS(x) (((x) << 16) & GENMASK(31, 16))
#define S2_CORE_MV_CFG_MV_NUM_POS_M GENMASK(31, 16)
#define S2_CORE_MV_CFG_MV_NUM_POS_X(x) (((x) & GENMASK(31, 16)) >> 16)
#define S2_CORE_MV_CFG_MV_SIZE(x) ((x) & GENMASK(15, 0))
#define S2_CORE_MV_CFG_MV_SIZE_M GENMASK(15, 0)
#define S2_CACHE_ENTRY_DAT_RSZ 0x4
#define S2_CACHE_MASK_DAT_RSZ 0x4
#define S2_CACHE_ACTION_DAT_RSZ 0x4
#define S2_CACHE_CNT_DAT_RSZ 0x4
#define S2_STICKY_VCAP_ROW_DELETED_STICKY BIT(0)
#define S2_BIST_CTRL_TCAM_BIST BIT(1)
#define S2_BIST_CTRL_TCAM_INIT BIT(0)
#define S2_BIST_CFG_TCAM_BIST_SOE_ENA BIT(8)
#define S2_BIST_CFG_TCAM_HCG_DIS BIT(7)
#define S2_BIST_CFG_TCAM_CG_DIS BIT(6)
#define S2_BIST_CFG_TCAM_BIAS(x) ((x) & GENMASK(5, 0))
#define S2_BIST_CFG_TCAM_BIAS_M GENMASK(5, 0)
#define S2_BIST_STAT_BIST_RT_ERR BIT(15)
#define S2_BIST_STAT_BIST_PENC_ERR BIT(14)
#define S2_BIST_STAT_BIST_COMP_ERR BIT(13)
#define S2_BIST_STAT_BIST_ADDR_ERR BIT(12)
#define S2_BIST_STAT_BIST_BL1E_ERR BIT(11)
#define S2_BIST_STAT_BIST_BL1_ERR BIT(10)
#define S2_BIST_STAT_BIST_BL0E_ERR BIT(9)
#define S2_BIST_STAT_BIST_BL0_ERR BIT(8)
#define S2_BIST_STAT_BIST_PH1_ERR BIT(7)
#define S2_BIST_STAT_BIST_PH0_ERR BIT(6)
#define S2_BIST_STAT_BIST_PV1_ERR BIT(5)
#define S2_BIST_STAT_BIST_PV0_ERR BIT(4)
#define S2_BIST_STAT_BIST_RUN BIT(3)
#define S2_BIST_STAT_BIST_ERR BIT(2)
#define S2_BIST_STAT_BIST_BUSY BIT(1)
#define S2_BIST_STAT_TCAM_RDY BIT(0)
#endif /* _OCELOT_S2_CORE_H_ */
......@@ -6,6 +6,7 @@
#include "ocelot_tc.h"
#include "ocelot_police.h"
#include "ocelot_ace.h"
#include <net/pkt_cls.h>
static int ocelot_setup_tc_cls_matchall(struct ocelot_port *port,
......@@ -101,10 +102,7 @@ static int ocelot_setup_tc_block_cb(enum tc_setup_type type,
return ocelot_setup_tc_cls_matchall(port, type_data, ingress);
case TC_SETUP_CLSFLOWER:
netdev_dbg(port->dev, "tc_block_cb: TC_SETUP_CLSFLOWER %s\n",
ingress ? "ingress" : "egress");
return -EOPNOTSUPP;
return 0;
default:
netdev_dbg(port->dev, "tc_block_cb: type %d %s\n",
type,
......@@ -134,6 +132,7 @@ static int ocelot_setup_tc_block(struct ocelot_port *port,
struct tc_block_offload *f)
{
tc_setup_cb_t *cb;
int ret;
netdev_dbg(port->dev, "tc_block command %d, binder_type %d\n",
f->command, f->binder_type);
......@@ -149,9 +148,14 @@ static int ocelot_setup_tc_block(struct ocelot_port *port,
switch (f->command) {
case TC_BLOCK_BIND:
return tcf_block_cb_register(f->block, cb, port,
ret = tcf_block_cb_register(f->block, cb, port,
port, f->extack);
if (ret)
return ret;
return ocelot_setup_tc_block_flower_bind(port, f);
case TC_BLOCK_UNBIND:
ocelot_setup_tc_block_flower_unbind(port, f);
tcf_block_cb_unregister(f->block, cb, port);
return 0;
default:
......
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