Commit 5acc4ce4 authored by Bjorn Helgaas's avatar Bjorn Helgaas

agp/intel: Rename gtt_bus_addr to gtt_phys_addr

The only use of gtt_bus_addr is as an argument to ioremap(), so it is a CPU
physical address, not a bus address.  Rename it to gtt_phys_addr to reflect
this.

No functional change.
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 21c34607
...@@ -64,7 +64,7 @@ static struct _intel_private { ...@@ -64,7 +64,7 @@ static struct _intel_private {
struct pci_dev *pcidev; /* device one */ struct pci_dev *pcidev; /* device one */
struct pci_dev *bridge_dev; struct pci_dev *bridge_dev;
u8 __iomem *registers; u8 __iomem *registers;
phys_addr_t gtt_bus_addr; phys_addr_t gtt_phys_addr;
u32 PGETBL_save; u32 PGETBL_save;
u32 __iomem *gtt; /* I915G */ u32 __iomem *gtt; /* I915G */
bool clear_fake_agp; /* on first access via agp, fill with scratch */ bool clear_fake_agp; /* on first access via agp, fill with scratch */
...@@ -191,7 +191,7 @@ static int i810_setup(void) ...@@ -191,7 +191,7 @@ static int i810_setup(void)
writel(virt_to_phys(gtt_table) | I810_PGETBL_ENABLED, writel(virt_to_phys(gtt_table) | I810_PGETBL_ENABLED,
intel_private.registers+I810_PGETBL_CTL); intel_private.registers+I810_PGETBL_CTL);
intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE;
if ((readl(intel_private.registers+I810_DRAM_CTL) if ((readl(intel_private.registers+I810_DRAM_CTL)
& I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) { & I810_DRAM_ROW_0) == I810_DRAM_ROW_0_SDRAM) {
...@@ -636,10 +636,10 @@ static int intel_gtt_init(void) ...@@ -636,10 +636,10 @@ static int intel_gtt_init(void)
intel_private.gtt = NULL; intel_private.gtt = NULL;
if (intel_gtt_can_wc()) if (intel_gtt_can_wc())
intel_private.gtt = ioremap_wc(intel_private.gtt_bus_addr, intel_private.gtt = ioremap_wc(intel_private.gtt_phys_addr,
gtt_map_size); gtt_map_size);
if (intel_private.gtt == NULL) if (intel_private.gtt == NULL)
intel_private.gtt = ioremap(intel_private.gtt_bus_addr, intel_private.gtt = ioremap(intel_private.gtt_phys_addr,
gtt_map_size); gtt_map_size);
if (intel_private.gtt == NULL) { if (intel_private.gtt == NULL) {
intel_private.driver->cleanup(); intel_private.driver->cleanup();
...@@ -796,7 +796,7 @@ static int i830_setup(void) ...@@ -796,7 +796,7 @@ static int i830_setup(void)
if (!intel_private.registers) if (!intel_private.registers)
return -ENOMEM; return -ENOMEM;
intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; intel_private.gtt_phys_addr = reg_addr + I810_PTE_BASE;
return 0; return 0;
} }
...@@ -1123,13 +1123,13 @@ static int i9xx_setup(void) ...@@ -1123,13 +1123,13 @@ static int i9xx_setup(void)
case 3: case 3:
pci_read_config_dword(intel_private.pcidev, pci_read_config_dword(intel_private.pcidev,
I915_PTEADDR, &gtt_addr); I915_PTEADDR, &gtt_addr);
intel_private.gtt_bus_addr = gtt_addr; intel_private.gtt_phys_addr = gtt_addr;
break; break;
case 5: case 5:
intel_private.gtt_bus_addr = reg_addr + MB(2); intel_private.gtt_phys_addr = reg_addr + MB(2);
break; break;
default: default:
intel_private.gtt_bus_addr = reg_addr + KB(512); intel_private.gtt_phys_addr = reg_addr + KB(512);
break; break;
} }
......
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