Commit 5af366ff authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: pcl818: define the mode register bits

Define the bits in the register to remove the magic values.

Tidy up pcl818_ai_cancel(). The 0x73 mask of the value read from
the control register will disable dma and interrupts but it does
not change the trigger mode. So the software trigger following it
might not work.

Just disable the trigger and clear any pending end-of-conversion.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 6cf215d7
...@@ -119,8 +119,6 @@ A word or two about DMA. Driver support DMA operations at two ways: ...@@ -119,8 +119,6 @@ A word or two about DMA. Driver support DMA operations at two ways:
#define boardPCL818 4 #define boardPCL818 4
#define boardPCL718 5 #define boardPCL718 5
/* R/W: operation control register */
#define PCL818_CONTROL 9
/* W: counter enable */ /* W: counter enable */
#define PCL818_CNTENABLE 10 #define PCL818_CNTENABLE 10
...@@ -138,6 +136,14 @@ A word or two about DMA. Driver support DMA operations at two ways: ...@@ -138,6 +136,14 @@ A word or two about DMA. Driver support DMA operations at two ways:
#define PCL818_STATUS_MUX (1 << 5) #define PCL818_STATUS_MUX (1 << 5)
#define PCL818_STATUS_UNI (1 << 6) #define PCL818_STATUS_UNI (1 << 6)
#define PCL818_STATUS_EOC (1 << 7) #define PCL818_STATUS_EOC (1 << 7)
#define PCL818_CTRL_REG 0x09
#define PCL818_CTRL_DISABLE_TRIG (0 << 0)
#define PCL818_CTRL_SOFT_TRIG (1 << 0)
#define PCL818_CTRL_EXT_TRIG (2 << 0)
#define PCL818_CTRL_PACER_TRIG (3 << 0)
#define PCL818_CTRL_DMAE (1 << 2)
#define PCL818_CTRL_IRQ(x) ((x) << 4)
#define PCL818_CTRL_INTE (1 << 7)
#define PCL818_DO_DI_MSB_REG 0x0b #define PCL818_DO_DI_MSB_REG 0x0b
#define PCL818_TIMER_BASE 0x0c #define PCL818_TIMER_BASE 0x0c
...@@ -674,12 +680,17 @@ static irqreturn_t pcl818_interrupt(int irq, void *d) ...@@ -674,12 +680,17 @@ static irqreturn_t pcl818_interrupt(int irq, void *d)
static void pcl818_ai_mode13dma_int(int mode, struct comedi_device *dev, static void pcl818_ai_mode13dma_int(int mode, struct comedi_device *dev,
struct comedi_subdevice *s) struct comedi_subdevice *s)
{ {
unsigned int ctrl = 0;
pcl818_ai_setup_dma(dev, s); pcl818_ai_setup_dma(dev, s);
if (mode == 1) /* Pacer+IRQ+DMA */ ctrl |= PCL818_CTRL_INTE | PCL818_CTRL_IRQ(dev->irq) | PCL818_CTRL_DMAE;
outb(0x87 | (dev->irq << 4), dev->iobase + PCL818_CONTROL); if (mode == 1)
else /* Ext trig+IRQ+DMA */ ctrl |= PCL818_CTRL_PACER_TRIG;
outb(0x86 | (dev->irq << 4), dev->iobase + PCL818_CONTROL); else
ctrl |= PCL818_CTRL_EXT_TRIG;
outb(ctrl, dev->iobase + PCL818_CTRL_REG);
} }
static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev, static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
...@@ -687,6 +698,7 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev, ...@@ -687,6 +698,7 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
{ {
struct pcl818_private *devpriv = dev->private; struct pcl818_private *devpriv = dev->private;
struct comedi_cmd *cmd = &s->async->cmd; struct comedi_cmd *cmd = &s->async->cmd;
unsigned int ctrl = 0;
unsigned int seglen; unsigned int seglen;
if (devpriv->ai_cmd_running) if (devpriv->ai_cmd_running)
...@@ -717,22 +729,20 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev, ...@@ -717,22 +729,20 @@ static int pcl818_ai_cmd_mode(int mode, struct comedi_device *dev,
break; break;
case 0: case 0:
if (!devpriv->usefifo) { if (!devpriv->usefifo) {
/* IRQ */ ctrl |= PCL818_CTRL_INTE | PCL818_CTRL_IRQ(dev->irq);
if (mode == 1) /* Pacer+IRQ */ if (mode == 1)
outb(0x83 | (dev->irq << 4), ctrl |= PCL818_CTRL_PACER_TRIG;
dev->iobase + PCL818_CONTROL); else
else /* Ext trig+IRQ */ ctrl |= PCL818_CTRL_EXT_TRIG;
outb(0x82 | (dev->irq << 4),
dev->iobase + PCL818_CONTROL);
} else { } else {
/* FIFO */
/* enable FIFO */ /* enable FIFO */
outb(1, dev->iobase + PCL818_FI_ENABLE); outb(1, dev->iobase + PCL818_FI_ENABLE);
if (mode == 1) /* Pacer */ if (mode == 1)
outb(0x03, dev->iobase + PCL818_CONTROL); ctrl |= PCL818_CTRL_PACER_TRIG;
else /* Ext trig */ else
outb(0x02, dev->iobase + PCL818_CONTROL); ctrl |= PCL818_CTRL_EXT_TRIG;
} }
outb(ctrl, dev->iobase + PCL818_CTRL_REG);
} }
pcl818_start_pacer(dev, mode == 1); pcl818_start_pacer(dev, mode == 1);
...@@ -925,13 +935,8 @@ static int pcl818_ai_cancel(struct comedi_device *dev, ...@@ -925,13 +935,8 @@ static int pcl818_ai_cancel(struct comedi_device *dev,
disable_dma(devpriv->dma); disable_dma(devpriv->dma);
} }
outb(inb(dev->iobase + PCL818_CONTROL) & 0x73, outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
dev->iobase + PCL818_CONTROL); /* Stop A/D */
udelay(1);
pcl818_start_pacer(dev, false); pcl818_start_pacer(dev, false);
pcl818_ai_soft_trig(dev);
pcl818_ai_get_sample(dev, s, NULL);
outb(0, dev->iobase + PCL818_CONTROL); /* Stop A/D */
pcl818_ai_clear_eoc(dev); pcl818_ai_clear_eoc(dev);
if (devpriv->usefifo) { /* FIFO shutdown */ if (devpriv->usefifo) { /* FIFO shutdown */
...@@ -955,8 +960,7 @@ static int pcl818_ai_insn_read(struct comedi_device *dev, ...@@ -955,8 +960,7 @@ static int pcl818_ai_insn_read(struct comedi_device *dev,
int ret = 0; int ret = 0;
int i; int i;
/* software trigger, DMA and INT off */ outb(PCL818_CTRL_SOFT_TRIG, dev->iobase + PCL818_CTRL_REG);
outb(0, dev->iobase + PCL818_CONTROL);
pcl818_ai_set_chan_range(dev, chan, range); pcl818_ai_set_chan_range(dev, chan, range);
pcl818_ai_set_chan_scan(dev, chan, chan); pcl818_ai_set_chan_scan(dev, chan, chan);
...@@ -1055,7 +1059,7 @@ static void pcl818_reset(struct comedi_device *dev) ...@@ -1055,7 +1059,7 @@ static void pcl818_reset(struct comedi_device *dev)
outb(0, dev->iobase + PCL818_DO_DI_MSB_REG); outb(0, dev->iobase + PCL818_DO_DI_MSB_REG);
outb(0, dev->iobase + PCL818_DO_DI_LSB_REG); outb(0, dev->iobase + PCL818_DO_DI_LSB_REG);
udelay(1); udelay(1);
outb(0, dev->iobase + PCL818_CONTROL); outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
outb(0, dev->iobase + PCL818_CNTENABLE); outb(0, dev->iobase + PCL818_CNTENABLE);
outb(0, dev->iobase + PCL818_MUX_REG); outb(0, dev->iobase + PCL818_MUX_REG);
pcl818_ai_clear_eoc(dev); pcl818_ai_clear_eoc(dev);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment