Commit 5b1f7fe4 authored by Will Deacon's avatar Will Deacon

arm64: entry: Explicitly pass exception level to kernel_ventry macro

We will need to treat exceptions from EL0 differently in kernel_ventry,
so rework the macro to take the exception level as an argument and
construct the branch target using that.
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Tested-by: default avatarLaura Abbott <labbott@redhat.com>
Tested-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 51a0048b
...@@ -71,7 +71,7 @@ ...@@ -71,7 +71,7 @@
#define BAD_FIQ 2 #define BAD_FIQ 2
#define BAD_ERROR 3 #define BAD_ERROR 3
.macro kernel_ventry label .macro kernel_ventry, el, label, regsize = 64
.align 7 .align 7
sub sp, sp, #S_FRAME_SIZE sub sp, sp, #S_FRAME_SIZE
#ifdef CONFIG_VMAP_STACK #ifdef CONFIG_VMAP_STACK
...@@ -84,7 +84,7 @@ ...@@ -84,7 +84,7 @@
tbnz x0, #THREAD_SHIFT, 0f tbnz x0, #THREAD_SHIFT, 0f
sub x0, sp, x0 // x0'' = sp' - x0' = (sp + x0) - sp = x0 sub x0, sp, x0 // x0'' = sp' - x0' = (sp + x0) - sp = x0
sub sp, sp, x0 // sp'' = sp' - x0 = (sp + x0) - x0 = sp sub sp, sp, x0 // sp'' = sp' - x0 = (sp + x0) - x0 = sp
b \label b el\()\el\()_\label
0: 0:
/* /*
...@@ -116,7 +116,7 @@ ...@@ -116,7 +116,7 @@
sub sp, sp, x0 sub sp, sp, x0
mrs x0, tpidrro_el0 mrs x0, tpidrro_el0
#endif #endif
b \label b el\()\el\()_\label
.endm .endm
.macro kernel_entry, el, regsize = 64 .macro kernel_entry, el, regsize = 64
...@@ -369,31 +369,31 @@ tsk .req x28 // current thread_info ...@@ -369,31 +369,31 @@ tsk .req x28 // current thread_info
.align 11 .align 11
ENTRY(vectors) ENTRY(vectors)
kernel_ventry el1_sync_invalid // Synchronous EL1t kernel_ventry 1, sync_invalid // Synchronous EL1t
kernel_ventry el1_irq_invalid // IRQ EL1t kernel_ventry 1, irq_invalid // IRQ EL1t
kernel_ventry el1_fiq_invalid // FIQ EL1t kernel_ventry 1, fiq_invalid // FIQ EL1t
kernel_ventry el1_error_invalid // Error EL1t kernel_ventry 1, error_invalid // Error EL1t
kernel_ventry el1_sync // Synchronous EL1h kernel_ventry 1, sync // Synchronous EL1h
kernel_ventry el1_irq // IRQ EL1h kernel_ventry 1, irq // IRQ EL1h
kernel_ventry el1_fiq_invalid // FIQ EL1h kernel_ventry 1, fiq_invalid // FIQ EL1h
kernel_ventry el1_error // Error EL1h kernel_ventry 1, error // Error EL1h
kernel_ventry el0_sync // Synchronous 64-bit EL0 kernel_ventry 0, sync // Synchronous 64-bit EL0
kernel_ventry el0_irq // IRQ 64-bit EL0 kernel_ventry 0, irq // IRQ 64-bit EL0
kernel_ventry el0_fiq_invalid // FIQ 64-bit EL0 kernel_ventry 0, fiq_invalid // FIQ 64-bit EL0
kernel_ventry el0_error // Error 64-bit EL0 kernel_ventry 0, error // Error 64-bit EL0
#ifdef CONFIG_COMPAT #ifdef CONFIG_COMPAT
kernel_ventry el0_sync_compat // Synchronous 32-bit EL0 kernel_ventry 0, sync_compat, 32 // Synchronous 32-bit EL0
kernel_ventry el0_irq_compat // IRQ 32-bit EL0 kernel_ventry 0, irq_compat, 32 // IRQ 32-bit EL0
kernel_ventry el0_fiq_invalid_compat // FIQ 32-bit EL0 kernel_ventry 0, fiq_invalid_compat, 32 // FIQ 32-bit EL0
kernel_ventry el0_error_compat // Error 32-bit EL0 kernel_ventry 0, error_compat, 32 // Error 32-bit EL0
#else #else
kernel_ventry el0_sync_invalid // Synchronous 32-bit EL0 kernel_ventry 0, sync_invalid, 32 // Synchronous 32-bit EL0
kernel_ventry el0_irq_invalid // IRQ 32-bit EL0 kernel_ventry 0, irq_invalid, 32 // IRQ 32-bit EL0
kernel_ventry el0_fiq_invalid // FIQ 32-bit EL0 kernel_ventry 0, fiq_invalid, 32 // FIQ 32-bit EL0
kernel_ventry el0_error_invalid // Error 32-bit EL0 kernel_ventry 0, error_invalid, 32 // Error 32-bit EL0
#endif #endif
END(vectors) END(vectors)
......
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