Commit 5fd80cf7 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding

memory: tegra: Remove Tegra114 SATA and AFI reset definitions

Tegra114 doesn't have SATA nor PCIe, but TRM seems erroneously document
them.
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 45a81df0
...@@ -948,7 +948,6 @@ static const struct tegra_smmu_soc tegra114_smmu_soc = { ...@@ -948,7 +948,6 @@ static const struct tegra_smmu_soc tegra114_smmu_soc = {
} }
static const struct tegra_mc_reset tegra114_mc_resets[] = { static const struct tegra_mc_reset tegra114_mc_resets[] = {
TEGRA114_MC_RESET(AFI, 0x200, 0x204, 0),
TEGRA114_MC_RESET(AVPC, 0x200, 0x204, 1), TEGRA114_MC_RESET(AVPC, 0x200, 0x204, 1),
TEGRA114_MC_RESET(DC, 0x200, 0x204, 2), TEGRA114_MC_RESET(DC, 0x200, 0x204, 2),
TEGRA114_MC_RESET(DCB, 0x200, 0x204, 3), TEGRA114_MC_RESET(DCB, 0x200, 0x204, 3),
...@@ -963,7 +962,6 @@ static const struct tegra_mc_reset tegra114_mc_resets[] = { ...@@ -963,7 +962,6 @@ static const struct tegra_mc_reset tegra114_mc_resets[] = {
TEGRA114_MC_RESET(3D, 0x200, 0x204, 12), TEGRA114_MC_RESET(3D, 0x200, 0x204, 12),
TEGRA114_MC_RESET(3D2, 0x200, 0x204, 13), TEGRA114_MC_RESET(3D2, 0x200, 0x204, 13),
TEGRA114_MC_RESET(PPCS, 0x200, 0x204, 14), TEGRA114_MC_RESET(PPCS, 0x200, 0x204, 14),
TEGRA114_MC_RESET(SATA, 0x200, 0x204, 15),
TEGRA114_MC_RESET(VDE, 0x200, 0x204, 16), TEGRA114_MC_RESET(VDE, 0x200, 0x204, 16),
TEGRA114_MC_RESET(VI, 0x200, 0x204, 17), TEGRA114_MC_RESET(VI, 0x200, 0x204, 17),
}; };
......
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