Commit 5fdec16b authored by Maxime Ripard's avatar Maxime Ripard

drivers: soc: sunxi: Add support for the C1 SRAM region

This introduces support for the SRAM C1 section, that is controlled by
the system controller. This SRAM area can be muxed either to the CPU
or the Video Engine, that needs this area to store various tables (e.g.
the Huffman VLD decoding tables).

This only supports devices with the same layout as the A10 (which also
includes the A13, A20, A33 and other SoCs).
Reviewed-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 0ec201cf
...@@ -64,6 +64,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = { ...@@ -64,6 +64,12 @@ static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
SUNXI_SRAM_MAP(1, 1, "emac")), SUNXI_SRAM_MAP(1, 1, "emac")),
}; };
static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
.data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
SUNXI_SRAM_MAP(0, 0, "cpu"),
SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
};
static struct sunxi_sram_desc sun4i_a10_sram_d = { static struct sunxi_sram_desc sun4i_a10_sram_d = {
.data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1, .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
SUNXI_SRAM_MAP(0, 0, "cpu"), SUNXI_SRAM_MAP(0, 0, "cpu"),
...@@ -81,6 +87,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = { ...@@ -81,6 +87,10 @@ static const struct of_device_id sunxi_sram_dt_ids[] = {
.compatible = "allwinner,sun4i-a10-sram-a3-a4", .compatible = "allwinner,sun4i-a10-sram-a3-a4",
.data = &sun4i_a10_sram_a3_a4.data, .data = &sun4i_a10_sram_a3_a4.data,
}, },
{
.compatible = "allwinner,sun4i-a10-sram-c1",
.data = &sun4i_a10_sram_c1.data,
},
{ {
.compatible = "allwinner,sun4i-a10-sram-d", .compatible = "allwinner,sun4i-a10-sram-d",
.data = &sun4i_a10_sram_d.data, .data = &sun4i_a10_sram_d.data,
......
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