Commit 64709686 authored by Jordan Crouse's avatar Jordan Crouse Committed by Rob Clark

drm/msm/gpu: Increase the pm runtime autosuspend for 5xx

Experimentation shows that resuming power quickly after suspending
ends up forcing a system hang for unknown reasons on 5xx targets.
To avoid cycling the power too much (especially during init)
turn up the autosuspend time for a5xx to 250ms and use
pm_runtime_put_autosuspend() when applicable.
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 6666e1a6
...@@ -35,6 +35,7 @@ static const struct adreno_info gpulist[] = { ...@@ -35,6 +35,7 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_PFP] = "a300_pfp.fw", [ADRENO_FW_PFP] = "a300_pfp.fw",
}, },
.gmem = SZ_256K, .gmem = SZ_256K,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a3xx_gpu_init, .init = a3xx_gpu_init,
}, { }, {
.rev = ADRENO_REV(3, 0, 6, 0), .rev = ADRENO_REV(3, 0, 6, 0),
...@@ -45,6 +46,7 @@ static const struct adreno_info gpulist[] = { ...@@ -45,6 +46,7 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_PFP] = "a300_pfp.fw", [ADRENO_FW_PFP] = "a300_pfp.fw",
}, },
.gmem = SZ_128K, .gmem = SZ_128K,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a3xx_gpu_init, .init = a3xx_gpu_init,
}, { }, {
.rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID), .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID),
...@@ -55,6 +57,7 @@ static const struct adreno_info gpulist[] = { ...@@ -55,6 +57,7 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_PFP] = "a300_pfp.fw", [ADRENO_FW_PFP] = "a300_pfp.fw",
}, },
.gmem = SZ_512K, .gmem = SZ_512K,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a3xx_gpu_init, .init = a3xx_gpu_init,
}, { }, {
.rev = ADRENO_REV(3, 3, 0, ANY_ID), .rev = ADRENO_REV(3, 3, 0, ANY_ID),
...@@ -65,6 +68,7 @@ static const struct adreno_info gpulist[] = { ...@@ -65,6 +68,7 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_PFP] = "a330_pfp.fw", [ADRENO_FW_PFP] = "a330_pfp.fw",
}, },
.gmem = SZ_1M, .gmem = SZ_1M,
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a3xx_gpu_init, .init = a3xx_gpu_init,
}, { }, {
.rev = ADRENO_REV(4, 2, 0, ANY_ID), .rev = ADRENO_REV(4, 2, 0, ANY_ID),
...@@ -75,6 +79,7 @@ static const struct adreno_info gpulist[] = { ...@@ -75,6 +79,7 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_PFP] = "a420_pfp.fw", [ADRENO_FW_PFP] = "a420_pfp.fw",
}, },
.gmem = (SZ_1M + SZ_512K), .gmem = (SZ_1M + SZ_512K),
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a4xx_gpu_init, .init = a4xx_gpu_init,
}, { }, {
.rev = ADRENO_REV(4, 3, 0, ANY_ID), .rev = ADRENO_REV(4, 3, 0, ANY_ID),
...@@ -85,6 +90,7 @@ static const struct adreno_info gpulist[] = { ...@@ -85,6 +90,7 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_PFP] = "a420_pfp.fw", [ADRENO_FW_PFP] = "a420_pfp.fw",
}, },
.gmem = (SZ_1M + SZ_512K), .gmem = (SZ_1M + SZ_512K),
.inactive_period = DRM_MSM_INACTIVE_PERIOD,
.init = a4xx_gpu_init, .init = a4xx_gpu_init,
}, { }, {
.rev = ADRENO_REV(5, 3, 0, 2), .rev = ADRENO_REV(5, 3, 0, 2),
...@@ -96,6 +102,11 @@ static const struct adreno_info gpulist[] = { ...@@ -96,6 +102,11 @@ static const struct adreno_info gpulist[] = {
[ADRENO_FW_GPMU] = "a530v3_gpmu.fw2", [ADRENO_FW_GPMU] = "a530v3_gpmu.fw2",
}, },
.gmem = SZ_1M, .gmem = SZ_1M,
/*
* Increase inactive period to 250 to avoid bouncing
* the GDSC which appears to make it grumpy
*/
.inactive_period = 250,
.quirks = ADRENO_QUIRK_TWO_PASS_USE_WFI | .quirks = ADRENO_QUIRK_TWO_PASS_USE_WFI |
ADRENO_QUIRK_FAULT_DETECT_MASK, ADRENO_QUIRK_FAULT_DETECT_MASK,
.init = a5xx_gpu_init, .init = a5xx_gpu_init,
...@@ -158,7 +169,7 @@ struct msm_gpu *adreno_load_gpu(struct drm_device *dev) ...@@ -158,7 +169,7 @@ struct msm_gpu *adreno_load_gpu(struct drm_device *dev)
mutex_lock(&dev->struct_mutex); mutex_lock(&dev->struct_mutex);
ret = msm_gpu_hw_init(gpu); ret = msm_gpu_hw_init(gpu);
mutex_unlock(&dev->struct_mutex); mutex_unlock(&dev->struct_mutex);
pm_runtime_put_sync(&pdev->dev); pm_runtime_put_autosuspend(&pdev->dev);
if (ret) { if (ret) {
dev_err(dev->dev, "gpu hw init failed: %d\n", ret); dev_err(dev->dev, "gpu hw init failed: %d\n", ret);
return NULL; return NULL;
......
...@@ -565,7 +565,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, ...@@ -565,7 +565,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
adreno_get_pwrlevels(&pdev->dev, gpu); adreno_get_pwrlevels(&pdev->dev, gpu);
pm_runtime_set_autosuspend_delay(&pdev->dev, DRM_MSM_INACTIVE_PERIOD); pm_runtime_set_autosuspend_delay(&pdev->dev,
adreno_gpu->info->inactive_period);
pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_enable(&pdev->dev); pm_runtime_enable(&pdev->dev);
......
...@@ -84,6 +84,7 @@ struct adreno_info { ...@@ -84,6 +84,7 @@ struct adreno_info {
enum adreno_quirks quirks; enum adreno_quirks quirks;
struct msm_gpu *(*init)(struct drm_device *dev); struct msm_gpu *(*init)(struct drm_device *dev);
const char *zapfw; const char *zapfw;
u32 inactive_period;
}; };
const struct adreno_info *adreno_info(struct adreno_rev rev); const struct adreno_info *adreno_info(struct adreno_rev rev);
......
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