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Commit 65ab0dba authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'ti-k3-soc-for-v5.4' of... 

Merge tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/late

Texas Instruments K3 SoC family changes for 5.4

- Typo fixes for gic-its unit addresses for both am654 and j721e
- HW spinlock nodes added for both am654 and j721e
- GPIO support for j721e
- power-domain cells update for both am654 / j721e for exclusive only
  access

* tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address
  arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address
  arm64: dts: ti: k3-j721e-main: Add hwspinlock node
  arm64: dts: ti: k3-am65-main: Add hwspinlock node
  arm64: dts: k3-j721e: Add gpio-keys on common processor board
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
  arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules
  arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain
  arm64: dts: ti: k3-j721e: Add gpio nodes in main domain
  arm64: dts: ti: k3-j721e: Update the power domain cells
  arm64: dts: ti: k3-am654: Update the power domain cells
  soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
  dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
  firmware: ti_sci: Allow for device shared and exclusive requests

Link: https://lore.kernel.org/r/b838d666-ab3b-7d41-67d4-09d606c732da@ti.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1fb2e59c d6dabd6f
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Showing with 384 additions and 51 deletions
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
View file @ 65ab0dba
......@@ -19,8 +19,15 @@ child of the pmmc node.
Required Properties:
--------------------
- compatible: should be "ti,sci-pm-domain"
- #power-domain-cells: Must be 1 so that an id can be provided in each
device node.
- #power-domain-cells: Can be one of the following:
1: Containing the device id of each node
2: First entry should be device id
Second entry should be one of the floowing:
TI_SCI_PD_EXCLUSIVE: To allow device to be
exclusively controlled by
the requesting hosts.
TI_SCI_PD_SHARED: To allow device to be shared
by multiple hosts.
Example (K2G):
-------------
......
MAINTAINERS
View file @ 65ab0dba
......@@ -15885,6 +15885,7 @@ F: drivers/firmware/ti_sci*
F: include/linux/soc/ti/ti_sci_protocol.h
F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
F: drivers/soc/ti/ti_sci_pm_domains.c
F: include/dt-bindings/soc/ti,sci_pm_domain.h
F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
F: drivers/clk/keystone/sci-clk.c
......
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
View file @ 65ab0dba
......@@ -42,7 +42,7 @@ gic500: interrupt-controller@1800000 {
*/
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
gic_its: gic-its@18200000 {
gic_its: gic-its@1820000 {
compatible = "arm,gic-v3-its";
reg = <0x00 0x01820000 0x00 0x10000>;
socionext,synquacer-pre-its = <0x1000000 0x400000>;
......@@ -67,7 +67,7 @@ serdes0: serdes@900000 {
reg = <0x0 0x900000 0x0 0x2000>;
reg-names = "serdes";
#phy-cells = <2>;
power-domains = <&k3_pds 153>;
power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>;
clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
......@@ -82,7 +82,7 @@ serdes1: serdes@910000 {
reg = <0x0 0x910000 0x0 0x2000>;
reg-names = "serdes";
#phy-cells = <2>;
power-domains = <&k3_pds 154>;
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>;
clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
......@@ -100,7 +100,7 @@ main_uart0: serial@2800000 {
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 146>;
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
};
main_uart1: serial@2810000 {
......@@ -110,7 +110,7 @@ main_uart1: serial@2810000 {
reg-io-width = <4>;
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
power-domains = <&k3_pds 147>;
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
};
main_uart2: serial@2820000 {
......@@ -120,7 +120,7 @@ main_uart2: serial@2820000 {
reg-io-width = <4>;
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
power-domains = <&k3_pds 148>;
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
};
main_pmx0: pinmux@11c000 {
......@@ -147,7 +147,7 @@ main_i2c0: i2c@2000000 {
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 110 1>;
power-domains = <&k3_pds 110>;
power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c1: i2c@2010000 {
......@@ -158,7 +158,7 @@ main_i2c1: i2c@2010000 {
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 111 1>;
power-domains = <&k3_pds 111>;
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c2: i2c@2020000 {
......@@ -169,7 +169,7 @@ main_i2c2: i2c@2020000 {
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 112 1>;
power-domains = <&k3_pds 112>;
power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c3: i2c@2030000 {
......@@ -180,14 +180,14 @@ main_i2c3: i2c@2030000 {
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 113 1>;
power-domains = <&k3_pds 113>;
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
};
ecap0: pwm@3100000 {
compatible = "ti,am654-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x0 0x03100000 0x0 0x60>;
power-domains = <&k3_pds 39>;
power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 39 0>;
clock-names = "fck";
};
......@@ -197,7 +197,7 @@ main_spi0: spi@2100000 {
reg = <0x0 0x2100000 0x0 0x400>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 137 1>;
power-domains = <&k3_pds 137>;
power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......@@ -207,7 +207,7 @@ main_spi1: spi@2110000 {
reg = <0x0 0x2110000 0x0 0x400>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 138 1>;
power-domains = <&k3_pds 138>;
power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
assigned-clocks = <&k3_clks 137 1>;
......@@ -219,7 +219,7 @@ main_spi2: spi@2120000 {
reg = <0x0 0x2120000 0x0 0x400>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 139 1>;
power-domains = <&k3_pds 139>;
power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......@@ -229,7 +229,7 @@ main_spi3: spi@2130000 {
reg = <0x0 0x2130000 0x0 0x400>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 140 1>;
power-domains = <&k3_pds 140>;
power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......@@ -239,7 +239,7 @@ main_spi4: spi@2140000 {
reg = <0x0 0x2140000 0x0 0x400>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 141 1>;
power-domains = <&k3_pds 141>;
power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......@@ -247,7 +247,7 @@ main_spi4: spi@2140000 {
sdhci0: sdhci@4f80000 {
compatible = "ti,am654-sdhci-5.1";
reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
power-domains = <&k3_pds 47>;
power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
clock-names = "clk_ahb", "clk_xin";
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
......@@ -306,7 +306,7 @@ dwc3_0: dwc3@4000000 {
ranges = <0x0 0x0 0x4000000 0x20000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
power-domains = <&k3_pds 151>;
power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
<&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
......@@ -345,7 +345,7 @@ dwc3_1: dwc3@4020000 {
ranges = <0x0 0x0 0x4020000 0x20000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
power-domains = <&k3_pds 152>;
power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 152 2>;
assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
......@@ -413,6 +413,12 @@ inta_main_udmass: interrupt-controller@33d00000 {
ti,sci-rm-range-vint = <0x0>;
ti,sci-rm-range-global-event = <0x1>;
};
hwspinlock: spinlock@30e00000 {
compatible = "ti,am654-hwspinlock";
reg = <0x00 0x30e00000 0x00 0x1000>;
#hwlock-cells = <1>;
};
};
main_gpio0: main_gpio0@600000 {
......@@ -451,7 +457,7 @@ pcie0_rc: pcie@5500000 {
compatible = "ti,am654-pcie-rc";
reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
reg-names = "app", "dbics", "config", "atu";
power-domains = <&k3_pds 120>;
power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000
......@@ -470,7 +476,7 @@ pcie0_ep: pcie-ep@5500000 {
compatible = "ti,am654-pcie-ep";
reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;
reg-names = "app", "dbics", "addr_space", "atu";
power-domains = <&k3_pds 120>;
power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
ti,syscon-pcie-mode = <&pcie0_mode>;
num-ib-windows = <16>;
num-ob-windows = <16>;
......@@ -483,7 +489,7 @@ pcie1_rc: pcie@5600000 {
compatible = "ti,am654-pcie-rc";
reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
reg-names = "app", "dbics", "config", "atu";
power-domains = <&k3_pds 121>;
power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000
......@@ -502,7 +508,7 @@ pcie1_ep: pcie-ep@5600000 {
compatible = "ti,am654-pcie-ep";
reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;
reg-names = "app", "dbics", "addr_space", "atu";
power-domains = <&k3_pds 121>;
power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
ti,syscon-pcie-mode = <&pcie1_mode>;
num-ib-windows = <16>;
num-ob-windows = <16>;
......
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
View file @ 65ab0dba
......@@ -14,7 +14,7 @@ mcu_uart0: serial@40a00000 {
interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <96000000>;
current-speed = <115200>;
power-domains = <&k3_pds 149>;
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
};
mcu_ram: sram@41c00000 {
......@@ -33,7 +33,7 @@ mcu_i2c0: i2c@40b00000 {
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 114 1>;
power-domains = <&k3_pds 114>;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
};
mcu_spi0: spi@40300000 {
......@@ -41,7 +41,7 @@ mcu_spi0: spi@40300000 {
reg = <0x0 0x40300000 0x0 0x400>;
interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 142 1>;
power-domains = <&k3_pds 142>;
power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......@@ -51,7 +51,7 @@ mcu_spi1: spi@40310000 {
reg = <0x0 0x40310000 0x0 0x400>;
interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 143 1>;
power-domains = <&k3_pds 143>;
power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......@@ -61,7 +61,7 @@ mcu_spi2: spi@40320000 {
reg = <0x0 0x40320000 0x0 0x400>;
interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&k3_clks 144 1>;
power-domains = <&k3_pds 144>;
power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
......
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi
View file @ 65ab0dba
......@@ -20,7 +20,7 @@ dmsc: dmsc {
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <1>;
#power-domain-cells = <2>;
};
k3_clks: clocks {
......@@ -50,7 +50,7 @@ wkup_uart0: serial@42300000 {
interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 150>;
power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
};
wkup_i2c0: i2c@42120000 {
......@@ -61,7 +61,7 @@ wkup_i2c0: i2c@42120000 {
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 115 1>;
power-domains = <&k3_pds 115>;
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
};
intr_wkup_gpio: interrupt-controller2 {
......
arch/arm64/boot/dts/ti/k3-am65.dtsi
View file @ 65ab0dba
......@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
/ {
model = "Texas Instruments K3 AM654 SoC";
......
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
View file @ 65ab0dba
......@@ -151,6 +151,7 @@ &wkup_uart0 {
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};
&wkup_i2c0 {
......
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
View file @ 65ab0dba
......@@ -6,12 +6,49 @@
/dts-v1/;
#include "k3-j721e-som-p0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>;
sw10: sw10 {
label = "GPIO Key USER1";
linux,code = <BTN_0>;
gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>;
};
sw11: sw11 {
label = "GPIO Key USER2";
linux,code = <BTN_1>;
gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
};
};
};
&main_pmx0 {
sw10_button_pins_default: sw10_button_pins_default {
pinctrl-single,pins = <
J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */
>;
};
};
&wkup_pmx0 {
sw11_button_pins_default: sw11_button_pins_default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */
>;
};
};
&wkup_uart0 {
......@@ -19,6 +56,10 @@ &wkup_uart0 {
status = "disabled";
};
&main_uart0 {
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};
&main_uart3 {
/* UART not brought out */
status = "disabled";
......@@ -48,3 +89,31 @@ &main_uart9 {
/* UART not brought out */
status = "disabled";
};
&main_gpio2 {
status = "disabled";
};
&main_gpio3 {
status = "disabled";
};
&main_gpio4 {
status = "disabled";
};
&main_gpio5 {
status = "disabled";
};
&main_gpio6 {
status = "disabled";
};
&main_gpio7 {
status = "disabled";
};
&wkup_gpio1 {
status = "disabled";
};
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
View file @ 65ab0dba
......@@ -31,7 +31,7 @@ gic500: interrupt-controller@1800000 {
/* vcpumntirq: virtual CPU interface maintenance interrupt */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
gic_its: gic-its@18200000 {
gic_its: gic-its@1820000 {
compatible = "arm,gic-v3-its";
reg = <0x00 0x01820000 0x00 0x10000>;
socionext,synquacer-pre-its = <0x1000000 0x400000>;
......@@ -89,6 +89,12 @@ main_udmass_inta: interrupt-controller@33d00000 {
ti,sci-rm-range-vint = <0xa>;
ti,sci-rm-range-global-event = <0xd>;
};
hwspinlock: spinlock@30e00000 {
compatible = "ti,am654-hwspinlock";
reg = <0x00 0x30e00000 0x00 0x1000>;
#hwlock-cells = <1>;
};
};
secure_proxy_main: mailbox@32c00000 {
......@@ -119,7 +125,7 @@ main_uart0: serial@2800000 {
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 146>;
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 146 0>;
clock-names = "fclk";
};
......@@ -132,7 +138,7 @@ main_uart1: serial@2810000 {
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 278>;
power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 278 0>;
clock-names = "fclk";
};
......@@ -145,7 +151,7 @@ main_uart2: serial@2820000 {
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 279>;
power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 279 0>;
clock-names = "fclk";
};
......@@ -158,7 +164,7 @@ main_uart3: serial@2830000 {
interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 280>;
power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 280 0>;
clock-names = "fclk";
};
......@@ -171,7 +177,7 @@ main_uart4: serial@2840000 {
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 281>;
power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 281 0>;
clock-names = "fclk";
};
......@@ -184,7 +190,7 @@ main_uart5: serial@2850000 {
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 282>;
power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 282 0>;
clock-names = "fclk";
};
......@@ -197,7 +203,7 @@ main_uart6: serial@2860000 {
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 283>;
power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 283 0>;
clock-names = "fclk";
};
......@@ -210,7 +216,7 @@ main_uart7: serial@2870000 {
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 284>;
power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 284 0>;
clock-names = "fclk";
};
......@@ -223,7 +229,7 @@ main_uart8: serial@2880000 {
interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 285>;
power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 285 0>;
clock-names = "fclk";
};
......@@ -236,8 +242,140 @@ main_uart9: serial@2890000 {
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 286>;
power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 286 0>;
clock-names = "fclk";
};
main_gpio0: gpio@600000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00600000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <105 0>, <105 1>, <105 2>, <105 3>,
<105 4>, <105 5>, <105 6>, <105 7>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <128>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 105 0>;
clock-names = "gpio";
};
main_gpio1: gpio@601000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00601000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <106 0>, <106 1>, <106 2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <36>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 106 0>;
clock-names = "gpio";
};
main_gpio2: gpio@610000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00610000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <107 0>, <107 1>, <107 2>, <107 3>,
<107 4>, <107 5>, <107 6>, <107 7>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <128>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 107 0>;
clock-names = "gpio";
};
main_gpio3: gpio@611000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00611000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <108 0>, <108 1>, <108 2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <36>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 108 0>;
clock-names = "gpio";
};
main_gpio4: gpio@620000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00620000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <109 0>, <109 1>, <109 2>, <109 3>,
<109 4>, <109 5>, <109 6>, <109 7>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <128>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 109 0>;
clock-names = "gpio";
};
main_gpio5: gpio@621000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00621000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <110 0>, <110 1>, <110 2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <36>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 110 0>;
clock-names = "gpio";
};
main_gpio6: gpio@630000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00630000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <111 0>, <111 1>, <111 2>, <111 3>,
<111 4>, <111 5>, <111 6>, <111 7>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <128>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 111 0>;
clock-names = "gpio";
};
main_gpio7: gpio@631000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x00631000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&main_gpio_intr>;
interrupts = <112 0>, <112 1>, <112 2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <36>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 112 0>;
clock-names = "gpio";
};
};
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
View file @ 65ab0dba
......@@ -20,7 +20,7 @@ dmsc: dmsc@44083000 {
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <1>;
#power-domain-cells = <2>;
};
k3_clks: clocks {
......@@ -59,7 +59,7 @@ wkup_uart0: serial@42300000 {
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 287>;
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 287 0>;
clock-names = "fclk";
};
......@@ -72,7 +72,7 @@ mcu_uart0: serial@40a00000 {
interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <96000000>;
current-speed = <115200>;
power-domains = <&k3_pds 149>;
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 149 0>;
clock-names = "fclk";
};
......@@ -87,4 +87,38 @@ wkup_gpio_intr: interrupt-controller2 {
ti,sci-dst-id = <14>;
ti,sci-rm-range-girq = <0x5>;
};
wkup_gpio0: gpio@42110000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x42110000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&wkup_gpio_intr>;
interrupts = <113 0>, <113 1>, <113 2>,
<113 3>, <113 4>, <113 5>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <84>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 113 0>;
clock-names = "gpio";
};
wkup_gpio1: gpio@42100000 {
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
reg = <0x0 0x42100000 0x0 0x100>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&wkup_gpio_intr>;
interrupts = <114 0>, <114 1>, <114 2>,
<114 3>, <114 4>, <114 5>;
interrupt-controller;
#interrupt-cells = <2>;
ti,ngpio = <84>;
ti,davinci-gpio-unbanked = <0>;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "gpio";
};
};
arch/arm64/boot/dts/ti/k3-j721e.dtsi
View file @ 65ab0dba
......@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
/ {
model = "Texas Instruments K3 J721E SoC";
......
drivers/firmware/ti_sci.c
View file @ 65ab0dba
......@@ -635,6 +635,7 @@ static int ti_sci_get_device_state(const struct ti_sci_handle *handle,
/**
* ti_sci_cmd_get_device() - command to request for device managed by TISCI
* that can be shared with other hosts.
* @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
* @id: Device Identifier
*
......@@ -642,11 +643,29 @@ static int ti_sci_get_device_state(const struct ti_sci_handle *handle,
* usage count by balancing get_device with put_device. No refcounting is
* managed by driver for that purpose.
*
* NOTE: The request is for exclusive access for the processor.
*
* Return: 0 if all went fine, else return appropriate error.
*/
static int ti_sci_cmd_get_device(const struct ti_sci_handle *handle, u32 id)
{
return ti_sci_set_device_state(handle, id, 0,
MSG_DEVICE_SW_STATE_ON);
}
/**
* ti_sci_cmd_get_device_exclusive() - command to request for device managed by
* TISCI that is exclusively owned by the
* requesting host.
* @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
* @id: Device Identifier
*
* Request for the device - NOTE: the client MUST maintain integrity of
* usage count by balancing get_device with put_device. No refcounting is
* managed by driver for that purpose.
*
* Return: 0 if all went fine, else return appropriate error.
*/
static int ti_sci_cmd_get_device_exclusive(const struct ti_sci_handle *handle,
u32 id)
{
return ti_sci_set_device_state(handle, id,
MSG_FLAG_DEVICE_EXCLUSIVE,
......@@ -665,6 +684,26 @@ static int ti_sci_cmd_get_device(const struct ti_sci_handle *handle, u32 id)
* Return: 0 if all went fine, else return appropriate error.
*/
static int ti_sci_cmd_idle_device(const struct ti_sci_handle *handle, u32 id)
{
return ti_sci_set_device_state(handle, id, 0,
MSG_DEVICE_SW_STATE_RETENTION);
}
/**
* ti_sci_cmd_idle_device_exclusive() - Command to idle a device managed by
* TISCI that is exclusively owned by
* requesting host.
* @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
* @id: Device Identifier
*
* Request for the device - NOTE: the client MUST maintain integrity of
* usage count by balancing get_device with put_device. No refcounting is
* managed by driver for that purpose.
*
* Return: 0 if all went fine, else return appropriate error.
*/
static int ti_sci_cmd_idle_device_exclusive(const struct ti_sci_handle *handle,
u32 id)
{
return ti_sci_set_device_state(handle, id,
MSG_FLAG_DEVICE_EXCLUSIVE,
......@@ -2894,7 +2933,9 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)
core_ops->reboot_device = ti_sci_cmd_core_reboot;
dops->get_device = ti_sci_cmd_get_device;
dops->get_device_exclusive = ti_sci_cmd_get_device_exclusive;
dops->idle_device = ti_sci_cmd_idle_device;
dops->idle_device_exclusive = ti_sci_cmd_idle_device_exclusive;
dops->put_device = ti_sci_cmd_put_device;
dops->is_valid = ti_sci_cmd_dev_is_valid;
......
drivers/soc/ti/ti_sci_pm_domains.c
View file @ 65ab0dba
......@@ -15,15 +15,19 @@
#include <linux/pm_domain.h>
#include <linux/slab.h>
#include <linux/soc/ti/ti_sci_protocol.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
/**
* struct ti_sci_genpd_dev_data: holds data needed for every device attached
* to this genpd
* @idx: index of the device that identifies it with the system
* control processor.
* @exclusive: Permissions for exclusive request or shared request of the
* device.
*/
struct ti_sci_genpd_dev_data {
int idx;
u8 exclusive;
};
/**
......@@ -55,6 +59,14 @@ static int ti_sci_dev_id(struct device *dev)
return sci_dev_data->idx;
}
static u8 is_ti_sci_dev_exclusive(struct device *dev)
{
struct generic_pm_domain_data *genpd_data = dev_gpd_data(dev);
struct ti_sci_genpd_dev_data *sci_dev_data = genpd_data->data;
return sci_dev_data->exclusive;
}
/**
* ti_sci_dev_to_sci_handle(): get pointer to ti_sci_handle
* @dev: pointer to device associated with this genpd
......@@ -79,7 +91,10 @@ static int ti_sci_dev_start(struct device *dev)
const struct ti_sci_handle *ti_sci = ti_sci_dev_to_sci_handle(dev);
int idx = ti_sci_dev_id(dev);
return ti_sci->ops.dev_ops.get_device(ti_sci, idx);
if (is_ti_sci_dev_exclusive(dev))
return ti_sci->ops.dev_ops.get_device_exclusive(ti_sci, idx);
else
return ti_sci->ops.dev_ops.get_device(ti_sci, idx);
}
/**
......@@ -110,7 +125,7 @@ static int ti_sci_pd_attach_dev(struct generic_pm_domain *domain,
if (ret < 0)
return ret;
if (pd_args.args_count != 1)
if (pd_args.args_count != 1 && pd_args.args_count != 2)
return -EINVAL;
idx = pd_args.args[0];
......@@ -128,6 +143,10 @@ static int ti_sci_pd_attach_dev(struct generic_pm_domain *domain,
return -ENOMEM;
sci_dev_data->idx = idx;
/* Enable the exclusive permissions by default */
sci_dev_data->exclusive = TI_SCI_PD_EXCLUSIVE;
if (pd_args.args_count == 2)
sci_dev_data->exclusive = pd_args.args[1] & 0x1;
genpd_data = dev_gpd_data(dev);
genpd_data->data = sci_dev_data;
......
include/dt-bindings/pinctrl/k3.h
View file @ 65ab0dba
......@@ -32,4 +32,7 @@
#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#endif
include/dt-bindings/soc/ti,sci_pm_domain.h 0 → 100644
View file @ 65ab0dba
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
#define __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
#define TI_SCI_PD_EXCLUSIVE 1
#define TI_SCI_PD_SHARED 0
#endif /* __DT_BINDINGS_TI_SCI_PM_DOMAIN_H */
include/linux/soc/ti/ti_sci_protocol.h
View file @ 65ab0dba
......@@ -97,7 +97,10 @@ struct ti_sci_core_ops {
*/
struct ti_sci_dev_ops {
int (*get_device)(const struct ti_sci_handle *handle, u32 id);
int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
u32 id);
int (*put_device)(const struct ti_sci_handle *handle, u32 id);
int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
int (*get_context_loss_count)(const struct ti_sci_handle *handle,
......
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