Commit 689a318c authored by Linus Walleij's avatar Linus Walleij Committed by Stephen Boyd

clk: ux500: move AB8500 sysclk over to PRCMU clk driver

The AB8500 sysclk is just another PRCMU-controlled clock, there
is no reason why it should be in the ABx500-controlled part of
the clock implementation. Doing this and the corresponding device
tree changes makes USB work on the Ux500 again.
Acked-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 0c744ea4
...@@ -15,7 +15,6 @@ ...@@ -15,7 +15,6 @@
#include <linux/mfd/abx500/ab8500-sysctrl.h> #include <linux/mfd/abx500/ab8500-sysctrl.h>
#include <linux/clkdev.h> #include <linux/clkdev.h>
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#include <linux/mfd/dbx500-prcmu.h>
#include "clk.h" #include "clk.h"
/* Clock definitions for ab8500 */ /* Clock definitions for ab8500 */
...@@ -39,13 +38,6 @@ static int ab8500_reg_clks(struct device *dev) ...@@ -39,13 +38,6 @@ static int ab8500_reg_clks(struct device *dev)
if (ret) if (ret)
return ret; return ret;
/* ab8500_sysclk */
clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK, 0);
clk_register_clkdev(clk, "sysclk", "ab8500-usb.0");
clk_register_clkdev(clk, "sysclk", "ab-iddet.0");
clk_register_clkdev(clk, "sysclk", "snd-soc-mop500.0");
clk_register_clkdev(clk, "sysclk", "shrm_bus");
/* ab8500_sysclk2 */ /* ab8500_sysclk2 */
clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk2", "ab8500_sysclk", clk = clk_reg_sysctrl_gate(dev , "ab8500_sysclk2", "ab8500_sysclk",
AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ, AB8500_SYSULPCLKCTRL1, AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ,
......
...@@ -206,6 +206,9 @@ static void u8500_clk_init(struct device_node *np) ...@@ -206,6 +206,9 @@ static void u8500_clk_init(struct device_node *np)
clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, 0); clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, 0);
prcmu_clk[PRCMU_TIMCLK] = clk; prcmu_clk[PRCMU_TIMCLK] = clk;
clk = clk_reg_prcmu_gate("ab8500_sysclk", NULL, PRCMU_SYSCLK, 0);
prcmu_clk[PRCMU_SYSCLK] = clk;
clk = clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL, PRCMU_SDMMCCLK, clk = clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL, PRCMU_SDMMCCLK,
100000000, CLK_SET_RATE_GATE); 100000000, CLK_SET_RATE_GATE);
prcmu_clk[PRCMU_SDMMCCLK] = clk; prcmu_clk[PRCMU_SDMMCCLK] = clk;
......
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