[ARM PATCH] 2255/1: Add IXDPG425 platform support

Patch from Deepak Saxena

New IXP425 based platform from Intel. This machine is similar to
an ADI Coyote except for the addition of an on-board NEC ECHI
controller. Patch also fixes issue with board setup for Coyote
(and IXDPG425) that would cause the MTD driver to fail.

Signed-off-by: Deepak Saxena
Signed-off-by: Russell King

Documentation/arm/IXP4xx

@@ -122,6 +122,15 @@ http://developer.intel.com/design/network/products/npfamily/ixdp425.htm
    also known as the Richfield board. It contains 4 PCI slots, 16MB
    of flash, two 10/100 ports and one ADSL port.
 
+Intel IXDPG425 Development Platform
+
+   This is basically and ADI Coyote board with a NEC EHCI controller
+   added. One issue with this board is that the mini-PCI slots only
+   have the 3.3v line connected, so you can't use a PCI to mini-PCI
+   adapter with an E100 card. So to NFS root you need to use either
+   the CSR or a WiFi card and a ramdisk that BOOTPs and then does
+   a pivot_root to NFS.
+
 Motorola PrPMC1100 Processor Mezanine Card
 http://www.fountainsys.com/datasheet/PrPMC1100.pdf
 
@@ -152,4 +161,4 @@ Robert E. Ranslam
 
 -------------------------------------------------------------------------
 
-Last Update: 5/13/2004
+Last Update: 11/16/2004

arch/arm/mach-ixp4xx/Kconfig

@@ -29,6 +29,13 @@ config ARCH_IXDP425
 	  IXDP425 Development Platform (Also known as Richfield).  
 	  For more information on this platform, see Documentation/arm/IXP4xx.
 
+config MACH_IXDPG425
+	bool "IXDPG425"
+	help
+	  Say 'Y' here if you want your kernel to support Intel's
+	  IXDPG425 Development Platform (Also known as Montajade).
+	  For more information on this platform, see Documentation/arm/IXP4xx.
+
 #
 # IXCDP1100 is the exact same HW as IXDP425, but with a different machine 
 # number from the bootloader due to marketing monkeys, so we just enable it 

arch/arm/mach-ixp4xx/Makefile

@@ -5,6 +5,7 @@
 obj-y	+= common.o common-pci.o 
 
 obj-$(CONFIG_ARCH_IXDP4XX)	+= ixdp425-pci.o ixdp425-setup.o
+obj-$(CONFIG_MACH_IXDPG425)	+= ixdpg425-pci.o coyote-setup.o
 obj-$(CONFIG_ARCH_ADI_COYOTE)	+= coyote-pci.o coyote-setup.o
 obj-$(CONFIG_ARCH_PRPMC1100)	+= prpmc1100-pci.o prpmc1100-setup.o
 

arch/arm/mach-ixp4xx/coyote-setup.c

 /*
  * arch/arm/mach-ixp4xx/coyote-setup.c
  *
- * ADI Engineering Coyote board-setup 
+ * Board setup for ADI Engineering and IXDGP425 boards
  *
  * Copyright (C) 2003-2004 MontaVista Software, Inc.
  *
@@ -30,7 +30,7 @@
 #endif
 
 /*
- * Only one serial port is connected on the Coyote.
+ * Only one serial port is connected on the Coyote & IXDPG425
  */
 static struct uart_port coyote_serial_port = {
 	.membase	= (char*)(IXP4XX_UART2_BASE_VIRT + REG_OFFSET),
@@ -47,6 +47,13 @@ static struct uart_port coyote_serial_port = {
 
 void __init coyote_map_io(void)
 {
+	if (machine_is_ixdpg425()) {
+		coyote_serial_port.membase =
+			(char*)(IXP4XX_UART1_BASE_VIRT + REG_OFFSET);
+		coyote_serial_port.mapbase = IXP4XX_UART1_BASE_PHYS;
+		coyote_serial_port.irq = IRQ_IXP4XX_UART1;
+	}
+
 	early_serial_setup(&coyote_serial_port);
 
 	ixp4xx_map_io();
@@ -79,10 +86,31 @@ static struct platform_device *coyote_devices[] __initdata = {
 
 static void __init coyote_init(void)
 {
+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
+
 	platform_add_devices(&coyote_devices, ARRAY_SIZE(coyote_devices));
 }
 
-MACHINE_START(ADI_COYOTE, "ADI Engineering IXP4XX Coyote Development Platform")
+#ifdef CONFIG_ARCH_ADI_COYOTE
+MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
+        MAINTAINER("MontaVista Software, Inc.")
+        BOOT_MEM(PHYS_OFFSET, IXP4XX_PERIPHERAL_BASE_PHYS,
+                IXP4XX_PERIPHERAL_BASE_VIRT)
+        MAPIO(coyote_map_io)
+        INITIRQ(ixp4xx_init_irq)
+	.timer		= &ixp4xx_timer,
+        BOOT_PARAMS(0x0100)
+	INIT_MACHINE(coyote_init)
+MACHINE_END
+#endif
+
+/*
+ * IXDPG425 is identical to Coyote except for which serial port
+ * is connected.
+ */
+#ifdef CONFIG_MACH_IXDPG425
+MACHINE_START(IXDPG425, "Intel IXDPG425")
         MAINTAINER("MontaVista Software, Inc.")
         BOOT_MEM(PHYS_OFFSET, IXP4XX_PERIPHERAL_BASE_PHYS,
                 IXP4XX_PERIPHERAL_BASE_VIRT)
@@ -92,4 +120,5 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering IXP4XX Coyote Development Platform")
         BOOT_PARAMS(0x0100)
 	INIT_MACHINE(coyote_init)
 MACHINE_END
+#endif
 

arch/arm/mach-ixp4xx/ixdpg425-pci.c

+/*
+ * arch/arch/mach-ixp4xx/ixdpg425-pci.c
+ *
+ * PCI setup routines for Intel IXDPG425 Platform
+ *
+ * Copyright (C) 2004 MontaVista Softwrae, Inc.
+ *
+ * Maintainer: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/init.h>
+
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+
+#include <asm/mach/pci.h>
+
+extern void ixp4xx_pci_preinit(void);
+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
+
+void __init ixdpg425_pci_preinit(void)
+{
+	gpio_line_config(6, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
+	gpio_line_config(7, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
+
+	gpio_line_isr_clear(6);
+	gpio_line_isr_clear(7);
+
+	ixp4xx_pci_preinit();
+}
+
+static int __init ixdpg425_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+	if (slot == 12 || slot == 13)
+		return IRQ_IXP4XX_GPIO7;
+	else if (slot == 14)
+		return IRQ_IXP4XX_GPIO6;
+	else return -1;
+}
+
+struct hw_pci ixdpg425_pci __initdata = {
+	.nr_controllers = 1,
+	.preinit =        ixdpg425_pci_preinit,
+	.swizzle =        pci_std_swizzle,
+	.setup =          ixp4xx_setup,
+	.scan =           ixp4xx_scan_bus,
+	.map_irq =        ixdpg425_map_irq,
+};
+
+int __init ixdpg425_pci_init(void)
+{
+	if (machine_is_ixdpg425())
+		pci_common_init(&ixdpg425_pci);
+	return 0;
+}
+
+subsys_initcall(ixdpg425_pci_init);