Commit 69bc6def authored by Andres Salomon's avatar Andres Salomon Committed by Samuel Ortiz

misc: Convert cs5535-mfgpt from pci device to platform device

The cs5535-mfd driver now takes care of the PCI BAR handling; this
simplifies the mfgpt driver a bunch.
Signed-off-by: default avatarAndres Salomon <dilinger@queued.net>
Signed-off-by: default avatarSamuel Ortiz <sameo@linux.intel.com>
parent df966694
...@@ -16,12 +16,11 @@ ...@@ -16,12 +16,11 @@
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/pci.h> #include <linux/platform_device.h>
#include <linux/cs5535.h> #include <linux/cs5535.h>
#include <linux/slab.h> #include <linux/slab.h>
#define DRV_NAME "cs5535-mfgpt" #define DRV_NAME "cs5535-mfgpt"
#define MFGPT_BAR 2
static int mfgpt_reset_timers; static int mfgpt_reset_timers;
module_param_named(mfgptfix, mfgpt_reset_timers, int, 0644); module_param_named(mfgptfix, mfgpt_reset_timers, int, 0644);
...@@ -37,7 +36,7 @@ static struct cs5535_mfgpt_chip { ...@@ -37,7 +36,7 @@ static struct cs5535_mfgpt_chip {
DECLARE_BITMAP(avail, MFGPT_MAX_TIMERS); DECLARE_BITMAP(avail, MFGPT_MAX_TIMERS);
resource_size_t base; resource_size_t base;
struct pci_dev *pdev; struct platform_device *pdev;
spinlock_t lock; spinlock_t lock;
int initialized; int initialized;
} cs5535_mfgpt_chip; } cs5535_mfgpt_chip;
...@@ -290,10 +289,10 @@ static int __init scan_timers(struct cs5535_mfgpt_chip *mfgpt) ...@@ -290,10 +289,10 @@ static int __init scan_timers(struct cs5535_mfgpt_chip *mfgpt)
return timers; return timers;
} }
static int __init cs5535_mfgpt_probe(struct pci_dev *pdev, static int __devinit cs5535_mfgpt_probe(struct platform_device *pdev)
const struct pci_device_id *pci_id)
{ {
int err, t; struct resource *res;
int err = -EIO, t;
/* There are two ways to get the MFGPT base address; one is by /* There are two ways to get the MFGPT base address; one is by
* fetching it from MSR_LBAR_MFGPT, the other is by reading the * fetching it from MSR_LBAR_MFGPT, the other is by reading the
...@@ -302,29 +301,28 @@ static int __init cs5535_mfgpt_probe(struct pci_dev *pdev, ...@@ -302,29 +301,28 @@ static int __init cs5535_mfgpt_probe(struct pci_dev *pdev,
* it turns out to be unreliable in the face of crappy BIOSes, we * it turns out to be unreliable in the face of crappy BIOSes, we
* can always go back to using MSRs.. */ * can always go back to using MSRs.. */
err = pci_enable_device_io(pdev); res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (err) { if (!res) {
dev_err(&pdev->dev, "can't enable device IO\n"); dev_err(&pdev->dev, "can't fetch device resource info\n");
goto done; goto done;
} }
err = pci_request_region(pdev, MFGPT_BAR, DRV_NAME); if (!request_region(res->start, resource_size(res), pdev->name)) {
if (err) { dev_err(&pdev->dev, "can't request region\n");
dev_err(&pdev->dev, "can't alloc PCI BAR #%d\n", MFGPT_BAR);
goto done; goto done;
} }
/* set up the driver-specific struct */ /* set up the driver-specific struct */
cs5535_mfgpt_chip.base = pci_resource_start(pdev, MFGPT_BAR); cs5535_mfgpt_chip.base = res->start;
cs5535_mfgpt_chip.pdev = pdev; cs5535_mfgpt_chip.pdev = pdev;
spin_lock_init(&cs5535_mfgpt_chip.lock); spin_lock_init(&cs5535_mfgpt_chip.lock);
dev_info(&pdev->dev, "allocated PCI BAR #%d: base 0x%llx\n", MFGPT_BAR, dev_info(&pdev->dev, "region 0x%x - 0x%x reserved\n", res->start,
(unsigned long long) cs5535_mfgpt_chip.base); res->end);
/* detect the available timers */ /* detect the available timers */
t = scan_timers(&cs5535_mfgpt_chip); t = scan_timers(&cs5535_mfgpt_chip);
dev_info(&pdev->dev, DRV_NAME ": %d MFGPT timers available\n", t); dev_info(&pdev->dev, "%d MFGPT timers available\n", t);
cs5535_mfgpt_chip.initialized = 1; cs5535_mfgpt_chip.initialized = 1;
return 0; return 0;
...@@ -332,47 +330,18 @@ static int __init cs5535_mfgpt_probe(struct pci_dev *pdev, ...@@ -332,47 +330,18 @@ static int __init cs5535_mfgpt_probe(struct pci_dev *pdev,
return err; return err;
} }
static struct pci_device_id cs5535_mfgpt_pci_tbl[] = { static struct platform_driver cs5535_mfgpt_drv = {
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) }, .driver = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) }, .name = DRV_NAME,
{ 0, }, .owner = THIS_MODULE,
},
.probe = cs5535_mfgpt_probe,
}; };
MODULE_DEVICE_TABLE(pci, cs5535_mfgpt_pci_tbl);
/*
* Just like with the cs5535-gpio driver, we can't use the standard PCI driver
* registration stuff. It only allows only one driver to bind to each PCI
* device, and we want the GPIO and MFGPT drivers to be able to share a PCI
* device. Instead, we manually scan for the PCI device, request a single
* region, and keep track of the devices that we're using.
*/
static int __init cs5535_mfgpt_scan_pci(void)
{
struct pci_dev *pdev;
int err = -ENODEV;
int i;
for (i = 0; i < ARRAY_SIZE(cs5535_mfgpt_pci_tbl); i++) {
pdev = pci_get_device(cs5535_mfgpt_pci_tbl[i].vendor,
cs5535_mfgpt_pci_tbl[i].device, NULL);
if (pdev) {
err = cs5535_mfgpt_probe(pdev,
&cs5535_mfgpt_pci_tbl[i]);
if (err)
pci_dev_put(pdev);
/* we only support a single CS5535/6 southbridge */
break;
}
}
return err;
}
static int __init cs5535_mfgpt_init(void) static int __init cs5535_mfgpt_init(void)
{ {
return cs5535_mfgpt_scan_pci(); return platform_driver_register(&cs5535_mfgpt_drv);
} }
module_init(cs5535_mfgpt_init); module_init(cs5535_mfgpt_init);
......
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