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Commit 6d14b5a0 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'vexpress-dt-4.12' of... 

Merge tag 'vexpress-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Pull "ARMv7 VExpress DT fix for v4.12" from Sudeep Holla:

A single fix to remove device tree warnings introduced with recently
added checks in DTC

* tag 'vexpress-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  ARM: dts: vexpress: fix few unit address format warnings
parents 28a59b61 e6a7efad
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Showing with 36 additions and 36 deletions
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
View file @ 6d14b5a0
......@@ -71,7 +71,7 @@ iofpga@3,00000000 {
#size-cells = <1>;
ranges = <0 3 0 0x200000>;
v2m_sysreg: sysreg@010000 {
v2m_sysreg: sysreg@10000 {
compatible = "arm,vexpress-sysreg";
reg = <0x010000 0x1000>;
......@@ -94,7 +94,7 @@ v2m_flash_gpios: sys_flash {
};
};
v2m_sysctl: sysctl@020000 {
v2m_sysctl: sysctl@20000 {
compatible = "arm,sp810", "arm,primecell";
reg = <0x020000 0x1000>;
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
......@@ -106,7 +106,7 @@ v2m_sysctl: sysctl@020000 {
};
/* PCI-E I2C bus */
v2m_i2c_pcie: i2c@030000 {
v2m_i2c_pcie: i2c@30000 {
compatible = "arm,versatile-i2c";
reg = <0x030000 0x1000>;
......@@ -119,7 +119,7 @@ pcie-switch@60 {
};
};
aaci@040000 {
aaci@40000 {
compatible = "arm,pl041", "arm,primecell";
reg = <0x040000 0x1000>;
interrupts = <11>;
......@@ -127,7 +127,7 @@ aaci@040000 {
clock-names = "apb_pclk";
};
mmci@050000 {
mmci@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <9 10>;
......@@ -139,7 +139,7 @@ mmci@050000 {
clock-names = "mclk", "apb_pclk";
};
kmi@060000 {
kmi@60000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x060000 0x1000>;
interrupts = <12>;
......@@ -147,7 +147,7 @@ kmi@060000 {
clock-names = "KMIREFCLK", "apb_pclk";
};
kmi@070000 {
kmi@70000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x070000 0x1000>;
interrupts = <13>;
......@@ -155,7 +155,7 @@ kmi@070000 {
clock-names = "KMIREFCLK", "apb_pclk";
};
v2m_serial0: uart@090000 {
v2m_serial0: uart@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
......@@ -163,7 +163,7 @@ v2m_serial0: uart@090000 {
clock-names = "uartclk", "apb_pclk";
};
v2m_serial1: uart@0a0000 {
v2m_serial1: uart@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
......@@ -171,7 +171,7 @@ v2m_serial1: uart@0a0000 {
clock-names = "uartclk", "apb_pclk";
};
v2m_serial2: uart@0b0000 {
v2m_serial2: uart@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
......@@ -179,7 +179,7 @@ v2m_serial2: uart@0b0000 {
clock-names = "uartclk", "apb_pclk";
};
v2m_serial3: uart@0c0000 {
v2m_serial3: uart@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
......@@ -187,7 +187,7 @@ v2m_serial3: uart@0c0000 {
clock-names = "uartclk", "apb_pclk";
};
wdt@0f0000 {
wdt@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x1000>;
interrupts = <0>;
......
arch/arm/boot/dts/vexpress-v2m.dtsi
View file @ 6d14b5a0
......@@ -70,7 +70,7 @@ iofpga@7,00000000 {
#size-cells = <1>;
ranges = <0 7 0 0x20000>;
v2m_sysreg: sysreg@00000 {
v2m_sysreg: sysreg@0 {
compatible = "arm,vexpress-sysreg";
reg = <0x00000 0x1000>;
......@@ -93,7 +93,7 @@ v2m_flash_gpios: sys_flash {
};
};
v2m_sysctl: sysctl@01000 {
v2m_sysctl: sysctl@1000 {
compatible = "arm,sp810", "arm,primecell";
reg = <0x01000 0x1000>;
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
......@@ -105,7 +105,7 @@ v2m_sysctl: sysctl@01000 {
};
/* PCI-E I2C bus */
v2m_i2c_pcie: i2c@02000 {
v2m_i2c_pcie: i2c@2000 {
compatible = "arm,versatile-i2c";
reg = <0x02000 0x1000>;
......@@ -118,7 +118,7 @@ pcie-switch@60 {
};
};
aaci@04000 {
aaci@4000 {
compatible = "arm,pl041", "arm,primecell";
reg = <0x04000 0x1000>;
interrupts = <11>;
......@@ -126,7 +126,7 @@ aaci@04000 {
clock-names = "apb_pclk";
};
mmci@05000 {
mmci@5000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x05000 0x1000>;
interrupts = <9 10>;
......@@ -138,7 +138,7 @@ mmci@05000 {
clock-names = "mclk", "apb_pclk";
};
kmi@06000 {
kmi@6000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x06000 0x1000>;
interrupts = <12>;
......@@ -146,7 +146,7 @@ kmi@06000 {
clock-names = "KMIREFCLK", "apb_pclk";
};
kmi@07000 {
kmi@7000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x07000 0x1000>;
interrupts = <13>;
......@@ -154,7 +154,7 @@ kmi@07000 {
clock-names = "KMIREFCLK", "apb_pclk";
};
v2m_serial0: uart@09000 {
v2m_serial0: uart@9000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x09000 0x1000>;
interrupts = <5>;
......@@ -162,7 +162,7 @@ v2m_serial0: uart@09000 {
clock-names = "uartclk", "apb_pclk";
};
v2m_serial1: uart@0a000 {
v2m_serial1: uart@a000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a000 0x1000>;
interrupts = <6>;
......@@ -170,7 +170,7 @@ v2m_serial1: uart@0a000 {
clock-names = "uartclk", "apb_pclk";
};
v2m_serial2: uart@0b000 {
v2m_serial2: uart@b000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b000 0x1000>;
interrupts = <7>;
......@@ -178,7 +178,7 @@ v2m_serial2: uart@0b000 {
clock-names = "uartclk", "apb_pclk";
};
v2m_serial3: uart@0c000 {
v2m_serial3: uart@c000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c000 0x1000>;
interrupts = <8>;
......@@ -186,7 +186,7 @@ v2m_serial3: uart@0c000 {
clock-names = "uartclk", "apb_pclk";
};
wdt@0f000 {
wdt@f000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f000 0x1000>;
interrupts = <0>;
......
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
View file @ 6d14b5a0
......@@ -220,7 +220,7 @@ energy {
};
};
smb@08000000 {
smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
......
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
View file @ 6d14b5a0
......@@ -385,7 +385,7 @@ energy-a7 {
};
};
etb@0,20010000 {
etb@20010000 {
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0 0x20010000 0 0x1000>;
......@@ -399,7 +399,7 @@ etb_in_port: endpoint {
};
};
tpiu@0,20030000 {
tpiu@20030000 {
compatible = "arm,coresight-tpiu", "arm,primecell";
reg = <0 0x20030000 0 0x1000>;
......@@ -449,7 +449,7 @@ replicator_in_port0: endpoint {
};
};
funnel@0,20040000 {
funnel@20040000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0 0x20040000 0 0x1000>;
......@@ -513,7 +513,7 @@ funnel_in_port5: endpoint {
};
};
ptm@0,2201c000 {
ptm@2201c000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2201c000 0 0x1000>;
......@@ -527,7 +527,7 @@ ptm0_out_port: endpoint {
};
};
ptm@0,2201d000 {
ptm@2201d000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2201d000 0 0x1000>;
......@@ -541,7 +541,7 @@ ptm1_out_port: endpoint {
};
};
etm@0,2203c000 {
etm@2203c000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2203c000 0 0x1000>;
......@@ -555,7 +555,7 @@ etm0_out_port: endpoint {
};
};
etm@0,2203d000 {
etm@2203d000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2203d000 0 0x1000>;
......@@ -569,7 +569,7 @@ etm1_out_port: endpoint {
};
};
etm@0,2203e000 {
etm@2203e000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0 0x2203e000 0 0x1000>;
......@@ -583,7 +583,7 @@ etm2_out_port: endpoint {
};
};
smb@08000000 {
smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
......
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
View file @ 6d14b5a0
......@@ -190,7 +190,7 @@ temp-dcc {
};
};
smb@08000000 {
smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
......
arch/arm/boot/dts/vexpress-v2p-ca9.dts
View file @ 6d14b5a0
......@@ -300,7 +300,7 @@ power-vd10-s3 {
};
};
smb@04000000 {
smb@4000000 {
compatible = "simple-bus";
#address-cells = <2>;
......
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