ide: initial PCI memory access annotations

drivers/ide/ide-iops.c

@@ -112,57 +112,57 @@ EXPORT_SYMBOL(default_hwif_iops);
 
 static u8 ide_mm_inb (unsigned long port)
 {
-	return (u8) readb(port);
+	return (u8) readb((void __iomem *) port);
 }
 
 static u16 ide_mm_inw (unsigned long port)
 {
-	return (u16) readw(port);
+	return (u16) readw((void __iomem *) port);
 }
 
 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
 {
-	__ide_mm_insw(port, addr, count);
+	__ide_mm_insw((void __iomem *) port, addr, count);
 }
 
 static u32 ide_mm_inl (unsigned long port)
 {
-	return (u32) readl(port);
+	return (u32) readl((void __iomem *) port);
 }
 
 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
 {
-	__ide_mm_insl(port, addr, count);
+	__ide_mm_insl((void __iomem *) port, addr, count);
 }
 
 static void ide_mm_outb (u8 value, unsigned long port)
 {
-	writeb(value, port);
+	writeb(value, (void __iomem *) port);
 }
 
 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
 {
-	writeb(value, port);	
+	writeb(value, (void __iomem *) port);
 }
 
 static void ide_mm_outw (u16 value, unsigned long port)
 {
-	writew(value, port);
+	writew(value, (void __iomem *) port);
 }
 
 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
 {
-	__ide_mm_outsw(port, addr, count);
+	__ide_mm_outsw((void __iomem *) port, addr, count);
 }
 
 static void ide_mm_outl (u32 value, unsigned long port)
 {
-	writel(value, port);
+	writel(value, (void __iomem *) port);
 }
 
 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
 {
-	__ide_mm_outsl(port, addr, count);
+	__ide_mm_outsl((void __iomem *) port, addr, count);
 }
 
 void default_hwif_mmiops (ide_hwif_t *hwif)

drivers/ide/pci/siimage.c

@@ -727,8 +727,7 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
 	unsigned long bar5	= pci_resource_start(dev, 5);
 	unsigned long barsize	= pci_resource_len(dev, 5);
 	u8 tmpbyte	= 0;
-	unsigned long addr;
-	void *ioaddr;
+	void __iomem *ioaddr;
 
 	/*
 	 *	Drop back to PIO if we can't map the mmio. Some
@@ -751,22 +750,21 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
 	}
 
 	pci_set_master(dev);
-	pci_set_drvdata(dev, ioaddr);
-	addr = (unsigned long) ioaddr;
+	pci_set_drvdata(dev, (void *) ioaddr);
 
 	if (pdev_is_sata(dev)) {
-		writel(0, addr + 0x148);
-		writel(0, addr + 0x1C8);
+		writel(0, ioaddr + 0x148);
+		writel(0, ioaddr + 0x1C8);
 	}
 
-	writeb(0, addr + 0xB4);
-	writeb(0, addr + 0xF4);
-	tmpbyte = readb(addr + 0x4A);
+	writeb(0, ioaddr + 0xB4);
+	writeb(0, ioaddr + 0xF4);
+	tmpbyte = readb(ioaddr + 0x4A);
 
 	switch(tmpbyte & 0x30) {
 		case 0x00:
 			/* In 100 MHz clocking, try and switch to 133 */
-			writeb(tmpbyte|0x10, addr + 0x4A);
+			writeb(tmpbyte|0x10, ioaddr + 0x4A);
 			break;
 		case 0x10:
 			/* On 133Mhz clocking */
@@ -777,29 +775,29 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
 		case 0x30:
 			/* Clocking is disabled */
 			/* 133 clock attempt to force it on */
-			writeb(tmpbyte & ~0x20, addr + 0x4A);
+			writeb(tmpbyte & ~0x20, ioaddr + 0x4A);
 			break;
 	}
 	
-	writeb(      0x72, addr + 0xA1);
-	writew(    0x328A, addr + 0xA2);
-	writel(0x62DD62DD, addr + 0xA4);
-	writel(0x43924392, addr + 0xA8);
-	writel(0x40094009, addr + 0xAC);
-	writeb(      0x72, addr + 0xE1);
-	writew(    0x328A, addr + 0xE2);
-	writel(0x62DD62DD, addr + 0xE4);
-	writel(0x43924392, addr + 0xE8);
-	writel(0x40094009, addr + 0xEC);
+	writeb(      0x72, ioaddr + 0xA1);
+	writew(    0x328A, ioaddr + 0xA2);
+	writel(0x62DD62DD, ioaddr + 0xA4);
+	writel(0x43924392, ioaddr + 0xA8);
+	writel(0x40094009, ioaddr + 0xAC);
+	writeb(      0x72, ioaddr + 0xE1);
+	writew(    0x328A, ioaddr + 0xE2);
+	writel(0x62DD62DD, ioaddr + 0xE4);
+	writel(0x43924392, ioaddr + 0xE8);
+	writel(0x40094009, ioaddr + 0xEC);
 
 	if (pdev_is_sata(dev)) {
-		writel(0xFFFF0000, addr + 0x108);
-		writel(0xFFFF0000, addr + 0x188);
-		writel(0x00680000, addr + 0x148);
-		writel(0x00680000, addr + 0x1C8);
+		writel(0xFFFF0000, ioaddr + 0x108);
+		writel(0xFFFF0000, ioaddr + 0x188);
+		writel(0x00680000, ioaddr + 0x148);
+		writel(0x00680000, ioaddr + 0x1C8);
 	}
 
-	tmpbyte = readb(addr + 0x4A);
+	tmpbyte = readb(ioaddr + 0x4A);
 
 	proc_reports_siimage(dev, (tmpbyte>>4), name);
 	return 1;

include/asm-generic/ide_iops.h

@@ -5,7 +5,7 @@
 #define __ide_outsw	outsw
 #define __ide_outsl	outsl
 
-static __inline__ void __ide_mm_insw(unsigned long port, void *addr, u32 count)
+static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
 {
 	while (count--) {
 		*(u16 *)addr = readw(port);
@@ -13,7 +13,7 @@ static __inline__ void __ide_mm_insw(unsigned long port, void *addr, u32 count)
 	}
 }
 
-static __inline__ void __ide_mm_insl(unsigned long port, void *addr, u32 count)
+static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
 {
 	while (count--) {
 		*(u32 *)addr = readl(port);
@@ -21,7 +21,7 @@ static __inline__ void __ide_mm_insl(unsigned long port, void *addr, u32 count)
 	}
 }
 
-static __inline__ void __ide_mm_outsw(unsigned long port, void *addr, u32 count)
+static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
 {
 	while (count--) {
 		writew(*(u16 *)addr, port);
@@ -29,7 +29,7 @@ static __inline__ void __ide_mm_outsw(unsigned long port, void *addr, u32 count)
 	}
 }
 
-static __inline__ void __ide_mm_outsl(unsigned long port, void *addr, u32 count)
+static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
 {
 	while (count--) {
 		writel(*(u32 *)addr, port);