Commit 6f367993 authored by Sakari Ailus's avatar Sakari Ailus Committed by Mauro Carvalho Chehab

[media] smiapp: Round minimum pre_pll up rather than down in ip_clk_freq check

The pre_pll divisor must be such that ext_clk / pre_pll divisor does not
result in a frequency that is greater than pll_ip_clk_freq. Fix this.
Signed-off-by: default avatarSakari Ailus <sakari.ailus@maxwell.research.nokia.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 98add8e8
...@@ -124,8 +124,9 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits, ...@@ -124,8 +124,9 @@ int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
limits->min_pll_ip_freq_hz)); limits->min_pll_ip_freq_hz));
limits->min_pre_pll_clk_div = limits->min_pre_pll_clk_div =
max_t(uint16_t, limits->min_pre_pll_clk_div, max_t(uint16_t, limits->min_pre_pll_clk_div,
clk_div_even(pll->ext_clk_freq_hz / clk_div_even_up(
limits->max_pll_ip_freq_hz)); DIV_ROUND_UP(pll->ext_clk_freq_hz,
limits->max_pll_ip_freq_hz)));
dev_dbg(dev, "pre-pll check: min / max pre_pll_clk_div: %d / %d\n", dev_dbg(dev, "pre-pll check: min / max pre_pll_clk_div: %d / %d\n",
limits->min_pre_pll_clk_div, limits->max_pre_pll_clk_div); limits->min_pre_pll_clk_div, limits->max_pre_pll_clk_div);
......
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