Commit 7104e162 authored by David S. Miller's avatar David S. Miller

Merge branch 'sparc32-SRMMU-fixes-for-SMP'

Will Deacon says:

====================
sparc32 SRMMU fixes for SMP

Enabling SMP for sparc32 uncovered some issues in the SRMMU page-table
allocation code. One of these was introduced by me, but the other two
seem to have been there a while and are probably just exposed more
easily by my recent changes.

Tested on QEMU. I'm assuming these will go via David's tree.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents ee7c7953 1996d47a
......@@ -364,10 +364,13 @@ pgtable_t pte_alloc_one(struct mm_struct *mm)
if ((ptep = pte_alloc_one_kernel(mm)) == 0)
return NULL;
page = pfn_to_page(__nocache_pa((unsigned long)ptep) >> PAGE_SHIFT);
if (!pgtable_pte_page_ctor(page)) {
__free_page(page);
return NULL;
spin_lock(&mm->page_table_lock);
if (page_ref_inc_return(page) == 2 && !pgtable_pte_page_ctor(page)) {
page_ref_dec(page);
ptep = NULL;
}
spin_unlock(&mm->page_table_lock);
return ptep;
}
......@@ -376,7 +379,11 @@ void pte_free(struct mm_struct *mm, pgtable_t ptep)
struct page *page;
page = pfn_to_page(__nocache_pa((unsigned long)ptep) >> PAGE_SHIFT);
spin_lock(&mm->page_table_lock);
if (page_ref_dec_return(page) == 1)
pgtable_pte_page_dtor(page);
spin_unlock(&mm->page_table_lock);
srmmu_free_nocache(ptep, SRMMU_PTE_TABLE_SIZE);
}
......
......@@ -192,6 +192,9 @@ config MEMORY_HOTREMOVE
# Default to 4 for wider testing, though 8 might be more appropriate.
# ARM's adjust_pte (unused if VIPT) depends on mm-wide page_table_lock.
# PA-RISC 7xxx's spinlock_t would enlarge struct page from 32 to 44 bytes.
# SPARC32 allocates multiple pte tables within a single page, and therefore
# a per-page lock leads to problems when multiple tables need to be locked
# at the same time (e.g. copy_page_range()).
# DEBUG_SPINLOCK and DEBUG_LOCK_ALLOC spinlock_t also enlarge struct page.
#
config SPLIT_PTLOCK_CPUS
......@@ -199,6 +202,7 @@ config SPLIT_PTLOCK_CPUS
default "999999" if !MMU
default "999999" if ARM && !CPU_CACHE_VIPT
default "999999" if PARISC && !PA20
default "999999" if SPARC32
default "4"
config ARCH_ENABLE_SPLIT_PMD_PTLOCK
......
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