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Commit 71b720c0 authored by rajesh.shah@intel.com's avatar rajesh.shah@intel.com Committed by Greg Kroah-Hartman
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[PATCH] patch 1/8] pciehp: use the PCI core for hotplug resource management 

This patch converts the pci express hotplug controller driver
to use the PCI core for resource management. This eliminates a
lot of duplicated code and integrates pciehp with the system's
normal PCI handling code.
Signed-off-by: default avatarRajesh Shah <rajesh.shah@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 24a4e377
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Showing with 85 additions and 3237 deletions
drivers/pci/hotplug/pciehp.h
View file @ 71b720c0
......@@ -59,14 +59,8 @@ struct pci_func {
u8 configured;
u8 switch_save;
u8 presence_save;
u32 base_length[0x06];
u8 base_type[0x06];
u16 reserved2;
u32 config_space[0x20];
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
struct pci_dev* pci_dev;
};
......@@ -90,12 +84,6 @@ struct slot {
struct list_head slot_list;
};
struct pci_resource {
struct pci_resource * next;
u32 base;
u32 length;
};
struct event_info {
u32 event_type;
u8 hp_slot;
......@@ -107,10 +95,6 @@ struct controller {
void *hpc_ctlr_handle; /* HPC controller handle */
int num_slots; /* Number of slots on ctlr */
int slot_num_inc; /* 1 or -1 */
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
struct pci_dev *pci_dev;
struct pci_bus *pci_bus;
struct event_info event_queue[10];
......@@ -133,20 +117,6 @@ struct controller {
u8 cap_base;
};
struct irq_mapping {
u8 barber_pole;
u8 valid_INT;
u8 interrupt[4];
};
struct resource_lists {
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
struct irq_mapping *irqs;
};
#define INT_BUTTON_IGNORE 0
#define INT_PRESENCE_ON 1
#define INT_PRESENCE_OFF 2
......@@ -203,14 +173,12 @@ struct resource_lists {
#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
#define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
/* controller functions */
extern int pciehprm_find_available_resources (struct controller *ctrl);
extern int pciehp_event_start_thread (void);
extern void pciehp_event_stop_thread (void);
extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
......@@ -224,19 +192,12 @@ extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
/* extern void long_delay (int delay); */
/* resource functions */
extern int pciehp_resource_sort_and_combine (struct pci_resource **head);
/* pci functions */
extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
/*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
extern int pciehp_save_used_resources (struct controller *ctrl, struct pci_func * func, int flag);
extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
extern void pciehp_destroy_board_resources (struct pci_func * func);
extern int pciehp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
extern void pciehp_destroy_resource_list (struct resource_lists * resources);
extern int pciehp_configure_device (struct controller* ctrl, struct pci_func* func);
extern int pciehp_configure_device (struct slot *ctrl);
extern int pciehp_unconfigure_device (struct pci_func* func);
......@@ -289,15 +250,6 @@ static inline int wait_for_ctrl_irq(struct controller *ctrl)
return retval;
}
/* Puts node back in the resource list pointed to by head */
static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
{
if (!node || !head)
return;
node->next = *head;
*head = node;
}
#define SLOT_NAME_SIZE 10
static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
......
drivers/pci/hotplug/pciehp_core.c
View file @ 71b720c0
......@@ -433,16 +433,8 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
goto err_out_free_ctrl_bus;
}
/* Get IO, memory, and IRQ resources for new devices */
rc = pciehprm_find_available_resources(ctrl);
ctrl->add_support = !rc;
ctrl->add_support = 1;
if (rc) {
dbg("pciehprm_find_available_resources = %#x\n", rc);
err("unable to locate PCI configuration resources for hot plug add.\n");
goto err_out_free_ctrl_bus;
}
/* Setup the slot information structures */
rc = init_slots(ctrl);
if (rc) {
......@@ -521,18 +513,6 @@ static int pcie_start_thread(void)
return retval;
}
static inline void __exit
free_pciehp_res(struct pci_resource *res)
{
struct pci_resource *tres;
while (res) {
tres = res;
res = res->next;
kfree(tres);
}
}
static void __exit unload_pciehpd(void)
{
struct pci_func *next;
......@@ -546,11 +526,6 @@ static void __exit unload_pciehpd(void)
while (ctrl) {
cleanup_slots(ctrl);
free_pciehp_res(ctrl->io_head);
free_pciehp_res(ctrl->mem_head);
free_pciehp_res(ctrl->p_mem_head);
free_pciehp_res(ctrl->bus_head);
kfree (ctrl->pci_bus);
ctrl->hpc_ops->release_ctlr(ctrl);
......@@ -564,11 +539,6 @@ static void __exit unload_pciehpd(void)
for (loop = 0; loop < 256; loop++) {
next = pciehp_slot_list[loop];
while (next != NULL) {
free_pciehp_res(next->io_head);
free_pciehp_res(next->mem_head);
free_pciehp_res(next->p_mem_head);
free_pciehp_res(next->bus_head);
TempSlot = next;
next = next->next;
kfree(TempSlot);
......@@ -652,8 +622,7 @@ static int __init pcied_init(void)
if (retval) {
pciehprm_cleanup();
pciehp_event_stop_thread();
} else
pciehprm_print_pirt();
};
return retval;
}
......
drivers/pci/hotplug/pciehp_ctrl.c
View file @ 71b720c0
......@@ -42,10 +42,6 @@
#include "pciehp.h"
#include "pciehprm.h"
static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
static int configure_new_function( struct controller *ctrl, struct pci_func *func,
u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
static void interrupt_event_handler(struct controller *ctrl);
static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
......@@ -252,627 +248,6 @@ u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
return rc;
}
/**
* sort_by_size: sort nodes by their length, smallest first.
*
* @head: list to sort
*/
static int sort_by_size(struct pci_resource **head)
{
struct pci_resource *current_res;
struct pci_resource *next_res;
int out_of_order = 1;
if (!(*head))
return 1;
if (!((*head)->next))
return 0;
while (out_of_order) {
out_of_order = 0;
/* Special case for swapping list head */
if (((*head)->next) &&
((*head)->length > (*head)->next->length)) {
out_of_order++;
current_res = *head;
*head = (*head)->next;
current_res->next = (*head)->next;
(*head)->next = current_res;
}
current_res = *head;
while (current_res->next && current_res->next->next) {
if (current_res->next->length > current_res->next->next->length) {
out_of_order++;
next_res = current_res->next;
current_res->next = current_res->next->next;
current_res = current_res->next;
next_res->next = current_res->next;
current_res->next = next_res;
} else
current_res = current_res->next;
}
} /* End of out_of_order loop */
return 0;
}
/*
* sort_by_max_size
*
* Sorts nodes on the list by their length.
* Largest first.
*
*/
static int sort_by_max_size(struct pci_resource **head)
{
struct pci_resource *current_res;
struct pci_resource *next_res;
int out_of_order = 1;
if (!(*head))
return 1;
if (!((*head)->next))
return 0;
while (out_of_order) {
out_of_order = 0;
/* Special case for swapping list head */
if (((*head)->next) &&
((*head)->length < (*head)->next->length)) {
out_of_order++;
current_res = *head;
*head = (*head)->next;
current_res->next = (*head)->next;
(*head)->next = current_res;
}
current_res = *head;
while (current_res->next && current_res->next->next) {
if (current_res->next->length < current_res->next->next->length) {
out_of_order++;
next_res = current_res->next;
current_res->next = current_res->next->next;
current_res = current_res->next;
next_res->next = current_res->next;
current_res->next = next_res;
} else
current_res = current_res->next;
}
} /* End of out_of_order loop */
return 0;
}
/**
* do_pre_bridge_resource_split: return one unused resource node
* @head: list to scan
*
*/
static struct pci_resource *
do_pre_bridge_resource_split(struct pci_resource **head,
struct pci_resource **orig_head, u32 alignment)
{
struct pci_resource *prevnode = NULL;
struct pci_resource *node;
struct pci_resource *split_node;
u32 rc;
u32 temp_dword;
dbg("do_pre_bridge_resource_split\n");
if (!(*head) || !(*orig_head))
return NULL;
rc = pciehp_resource_sort_and_combine(head);
if (rc)
return NULL;
if ((*head)->base != (*orig_head)->base)
return NULL;
if ((*head)->length == (*orig_head)->length)
return NULL;
/* If we got here, there the bridge requires some of the resource, but
* we may be able to split some off of the front
*/
node = *head;
if (node->length & (alignment -1)) {
/* this one isn't an aligned length, so we'll make a new entry
* and split it up.
*/
split_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return NULL;
temp_dword = (node->length | (alignment-1)) + 1 - alignment;
split_node->base = node->base;
split_node->length = temp_dword;
node->length -= temp_dword;
node->base += split_node->length;
/* Put it in the list */
*head = split_node;
split_node->next = node;
}
if (node->length < alignment)
return NULL;
/* Now unlink it */
if (*head == node) {
*head = node->next;
} else {
prevnode = *head;
while (prevnode->next != node)
prevnode = prevnode->next;
prevnode->next = node->next;
}
node->next = NULL;
return node;
}
/**
* do_bridge_resource_split: return one unused resource node
* @head: list to scan
*
*/
static struct pci_resource *
do_bridge_resource_split(struct pci_resource **head, u32 alignment)
{
struct pci_resource *prevnode = NULL;
struct pci_resource *node;
u32 rc;
u32 temp_dword;
if (!(*head))
return NULL;
rc = pciehp_resource_sort_and_combine(head);
if (rc)
return NULL;
node = *head;
while (node->next) {
prevnode = node;
node = node->next;
kfree(prevnode);
}
if (node->length < alignment) {
kfree(node);
return NULL;
}
if (node->base & (alignment - 1)) {
/* Short circuit if adjusted size is too small */
temp_dword = (node->base | (alignment-1)) + 1;
if ((node->length - (temp_dword - node->base)) < alignment) {
kfree(node);
return NULL;
}
node->length -= (temp_dword - node->base);
node->base = temp_dword;
}
if (node->length & (alignment - 1)) {
/* There's stuff in use after this node */
kfree(node);
return NULL;
}
return node;
}
/*
* get_io_resource
*
* this function sorts the resource list by size and then
* returns the first node of "size" length that is not in the
* ISA aliasing window. If it finds a node larger than "size"
* it will split it up.
*
* size must be a power of two.
*/
static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
{
struct pci_resource *prevnode;
struct pci_resource *node;
struct pci_resource *split_node = NULL;
u32 temp_dword;
if (!(*head))
return NULL;
if ( pciehp_resource_sort_and_combine(head) )
return NULL;
if ( sort_by_size(head) )
return NULL;
for (node = *head; node; node = node->next) {
if (node->length < size)
continue;
if (node->base & (size - 1)) {
/* this one isn't base aligned properly
so we'll make a new entry and split it up */
temp_dword = (node->base | (size-1)) + 1;
/*/ Short circuit if adjusted size is too small */
if ((node->length - (temp_dword - node->base)) < size)
continue;
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
return NULL;
split_node->base = node->base;
split_node->length = temp_dword - node->base;
node->base = temp_dword;
node->length -= split_node->length;
/* Put it in the list */
split_node->next = node->next;
node->next = split_node;
} /* End of non-aligned base */
/* Don't need to check if too small since we already did */
if (node->length > size) {
/* this one is longer than we need
so we'll make a new entry and split it up */
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
return NULL;
split_node->base = node->base + size;
split_node->length = node->length - size;
node->length = size;
/* Put it in the list */
split_node->next = node->next;
node->next = split_node;
} /* End of too big on top end */
/* For IO make sure it's not in the ISA aliasing space */
if (node->base & 0x300L)
continue;
/* If we got here, then it is the right size
Now take it out of the list */
if (*head == node) {
*head = node->next;
} else {
prevnode = *head;
while (prevnode->next != node)
prevnode = prevnode->next;
prevnode->next = node->next;
}
node->next = NULL;
/* Stop looping */
break;
}
return node;
}
/*
* get_max_resource
*
* Gets the largest node that is at least "size" big from the
* list pointed to by head. It aligns the node on top and bottom
* to "size" alignment before returning it.
* J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
* This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
*/
static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
{
struct pci_resource *max;
struct pci_resource *temp;
struct pci_resource *split_node;
u32 temp_dword;
u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
int i;
if (!(*head))
return NULL;
if (pciehp_resource_sort_and_combine(head))
return NULL;
if (sort_by_max_size(head))
return NULL;
for (max = *head;max; max = max->next) {
/* If not big enough we could probably just bail,
instead we'll continue to the next. */
if (max->length < size)
continue;
if (max->base & (size - 1)) {
/* this one isn't base aligned properly
so we'll make a new entry and split it up */
temp_dword = (max->base | (size-1)) + 1;
/* Short circuit if adjusted size is too small */
if ((max->length - (temp_dword - max->base)) < size)
continue;
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
return NULL;
split_node->base = max->base;
split_node->length = temp_dword - max->base;
max->base = temp_dword;
max->length -= split_node->length;
/* Put it next in the list */
split_node->next = max->next;
max->next = split_node;
}
if ((max->base + max->length) & (size - 1)) {
/* this one isn't end aligned properly at the top
so we'll make a new entry and split it up */
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
return NULL;
temp_dword = ((max->base + max->length) & ~(size - 1));
split_node->base = temp_dword;
split_node->length = max->length + max->base
- split_node->base;
max->length -= split_node->length;
/* Put it in the list */
split_node->next = max->next;
max->next = split_node;
}
/* Make sure it didn't shrink too much when we aligned it */
if (max->length < size)
continue;
for ( i = 0; max_size[i] > size; i++) {
if (max->length > max_size[i]) {
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
break; /* return NULL; */
split_node->base = max->base + max_size[i];
split_node->length = max->length - max_size[i];
max->length = max_size[i];
/* Put it next in the list */
split_node->next = max->next;
max->next = split_node;
break;
}
}
/* Now take it out of the list */
temp = (struct pci_resource*) *head;
if (temp == max) {
*head = max->next;
} else {
while (temp && temp->next != max) {
temp = temp->next;
}
temp->next = max->next;
}
max->next = NULL;
return max;
}
/* If we get here, we couldn't find one */
return NULL;
}
/*
* get_resource
*
* this function sorts the resource list by size and then
* returns the first node of "size" length. If it finds a node
* larger than "size" it will split it up.
*
* size must be a power of two.
*/
static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
{
struct pci_resource *prevnode;
struct pci_resource *node;
struct pci_resource *split_node;
u32 temp_dword;
if (!(*head))
return NULL;
if ( pciehp_resource_sort_and_combine(head) )
return NULL;
if ( sort_by_size(head) )
return NULL;
for (node = *head; node; node = node->next) {
dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
__FUNCTION__, size, node, node->base, node->length);
if (node->length < size)
continue;
if (node->base & (size - 1)) {
dbg("%s: not aligned\n", __FUNCTION__);
/* this one isn't base aligned properly
so we'll make a new entry and split it up */
temp_dword = (node->base | (size-1)) + 1;
/* Short circuit if adjusted size is too small */
if ((node->length - (temp_dword - node->base)) < size)
continue;
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
return NULL;
split_node->base = node->base;
split_node->length = temp_dword - node->base;
node->base = temp_dword;
node->length -= split_node->length;
/* Put it in the list */
split_node->next = node->next;
node->next = split_node;
} /* End of non-aligned base */
/* Don't need to check if too small since we already did */
if (node->length > size) {
dbg("%s: too big\n", __FUNCTION__);
/* this one is longer than we need
so we'll make a new entry and split it up */
split_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!split_node)
return NULL;
split_node->base = node->base + size;
split_node->length = node->length - size;
node->length = size;
/* Put it in the list */
split_node->next = node->next;
node->next = split_node;
} /* End of too big on top end */
dbg("%s: got one!!!\n", __FUNCTION__);
/* If we got here, then it is the right size
Now take it out of the list */
if (*head == node) {
*head = node->next;
} else {
prevnode = *head;
while (prevnode->next != node)
prevnode = prevnode->next;
prevnode->next = node->next;
}
node->next = NULL;
/* Stop looping */
break;
}
return node;
}
/*
* pciehp_resource_sort_and_combine
*
* Sorts all of the nodes in the list in ascending order by
* their base addresses. Also does garbage collection by
* combining adjacent nodes.
*
* returns 0 if success
*/
int pciehp_resource_sort_and_combine(struct pci_resource **head)
{
struct pci_resource *node1;
struct pci_resource *node2;
int out_of_order = 1;
dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
if (!(*head))
return 1;
dbg("*head->next = %p\n",(*head)->next);
if (!(*head)->next)
return 0; /* only one item on the list, already sorted! */
dbg("*head->base = 0x%x\n",(*head)->base);
dbg("*head->next->base = 0x%x\n",(*head)->next->base);
while (out_of_order) {
out_of_order = 0;
/* Special case for swapping list head */
if (((*head)->next) &&
((*head)->base > (*head)->next->base)) {
node1 = *head;
(*head) = (*head)->next;
node1->next = (*head)->next;
(*head)->next = node1;
out_of_order++;
}
node1 = (*head);
while (node1->next && node1->next->next) {
if (node1->next->base > node1->next->next->base) {
out_of_order++;
node2 = node1->next;
node1->next = node1->next->next;
node1 = node1->next;
node2->next = node1->next;
node1->next = node2;
} else
node1 = node1->next;
}
} /* End of out_of_order loop */
node1 = *head;
while (node1 && node1->next) {
if ((node1->base + node1->length) == node1->next->base) {
/* Combine */
dbg("8..\n");
node1->length += node1->next->length;
node2 = node1->next;
node1->next = node1->next->next;
kfree(node2);
} else
node1 = node1->next;
}
return 0;
}
/**
* pciehp_slot_create - Creates a node and adds it to the proper bus.
* @busnumber - bus where new node is to be located
......@@ -926,7 +301,6 @@ static int slot_remove(struct pci_func * old_slot)
if (next == old_slot) {
pciehp_slot_list[old_slot->bus] = old_slot->next;
pciehp_destroy_board_resources(old_slot);
kfree(old_slot);
return 0;
}
......@@ -937,7 +311,6 @@ static int slot_remove(struct pci_func * old_slot)
if (next->next == old_slot) {
next->next = old_slot->next;
pciehp_destroy_board_resources(old_slot);
kfree(old_slot);
return 0;
} else
......@@ -1103,12 +476,9 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot)
static u32 board_added(struct pci_func * func, struct controller * ctrl)
{
u8 hp_slot;
int index;
u32 temp_register = 0xFFFFFFFF;
u32 rc = 0;
struct pci_func *new_func = NULL;
struct slot *p_slot;
struct resource_lists res_lists;
p_slot = pciehp_find_slot(ctrl, func->device);
hp_slot = func->device - ctrl->slot_device_offset;
......@@ -1162,89 +532,43 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
dbg("%s: temp register set to %x by power fault\n", __FUNCTION__, temp_register);
rc = POWER_FAILURE;
func->status = 0;
} else {
/* Get vendor/device ID u32 */
rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function),
PCI_VENDOR_ID, &temp_register);
dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
if (rc != 0) {
/* Something's wrong here */
temp_register = 0xFFFFFFFF;
dbg("%s: temp register set to %x by error\n", __FUNCTION__, temp_register);
}
/* Preset return code. It will be changed later if things go okay. */
rc = NO_ADAPTER_PRESENT;
goto err_exit;
}
/* All F's is an empty slot or an invalid board */
if (temp_register != 0xFFFFFFFF) { /* Check for a board in the slot */
res_lists.io_head = ctrl->io_head;
res_lists.mem_head = ctrl->mem_head;
res_lists.p_mem_head = ctrl->p_mem_head;
res_lists.bus_head = ctrl->bus_head;
res_lists.irqs = NULL;
rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
dbg("%s: back from configure_new_device\n", __FUNCTION__);
ctrl->io_head = res_lists.io_head;
ctrl->mem_head = res_lists.mem_head;
ctrl->p_mem_head = res_lists.p_mem_head;
ctrl->bus_head = res_lists.bus_head;
pciehp_resource_sort_and_combine(&(ctrl->mem_head));
pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
pciehp_resource_sort_and_combine(&(ctrl->io_head));
pciehp_resource_sort_and_combine(&(ctrl->bus_head));
rc = pciehp_configure_device(p_slot);
if (rc) {
err("Cannot add device 0x%x:%x\n", p_slot->bus,
p_slot->device);
goto err_exit;
}
if (rc) {
set_slot_off(ctrl, p_slot);
return rc;
}
pciehp_save_slot_config(ctrl, func);
pciehp_save_slot_config(ctrl, func);
func->status = 0;
func->switch_save = 0x10;
func->is_a_board = 0x01;
func->status = 0;
func->switch_save = 0x10;
func->is_a_board = 0x01;
/*
* Some PCI Express root ports require fixup after hot-plug operation.
*/
if (pcie_mch_quirk)
pci_fixup_device(pci_fixup_final, ctrl->pci_dev);
if (PWR_LED(ctrl->ctrlcap)) {
/* Wait for exclusive access to hardware */
down(&ctrl->crit_sect);
/* next, we will instantiate the linux pci_dev structures
* (with appropriate driver notification, if already present)
*/
index = 0;
do {
new_func = pciehp_slot_find(ctrl->slot_bus, func->device, index++);
if (new_func && !new_func->pci_dev) {
dbg("%s:call pci_hp_configure_dev, func %x\n",
__FUNCTION__, index);
pciehp_configure_device(ctrl, new_func);
}
} while (new_func);
/*
* Some PCI Express root ports require fixup after hot-plug operation.
*/
if (pcie_mch_quirk)
pci_fixup_device(pci_fixup_final, ctrl->pci_dev);
if (PWR_LED(ctrl->ctrlcap)) {
/* Wait for exclusive access to hardware */
down(&ctrl->crit_sect);
p_slot->hpc_ops->green_led_on(p_slot);
p_slot->hpc_ops->green_led_on(p_slot);
/* Wait for the command to complete */
wait_for_ctrl_irq (ctrl);
/* Wait for the command to complete */
wait_for_ctrl_irq (ctrl);
/* Done with exclusive hardware access */
up(&ctrl->crit_sect);
}
} else {
set_slot_off(ctrl, p_slot);
return -1;
}
/* Done with exclusive hardware access */
up(&ctrl->crit_sect);
}
return 0;
err_exit:
set_slot_off(ctrl, p_slot);
return -1;
}
......@@ -1254,13 +578,9 @@ static u32 board_added(struct pci_func * func, struct controller * ctrl)
*/
static u32 remove_board(struct pci_func *func, struct controller *ctrl)
{
int index;
u8 skip = 0;
u8 device;
u8 hp_slot;
u32 rc;
struct resource_lists res_lists;
struct pci_func *temp_func;
struct slot *p_slot;
if (func == NULL)
......@@ -1276,27 +596,6 @@ static u32 remove_board(struct pci_func *func, struct controller *ctrl)
dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
if ((ctrl->add_support) &&
!(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
/* Here we check to see if we've saved any of the board's
* resources already. If so, we'll skip the attempt to
* determine what's being used.
*/
index = 0;
temp_func = func;
while ((temp_func = pciehp_slot_find(temp_func->bus, temp_func->device, index++))) {
if (temp_func->bus_head || temp_func->mem_head
|| temp_func->p_mem_head || temp_func->io_head) {
skip = 1;
break;
}
}
if (!skip)
rc = pciehp_save_used_resources(ctrl, func, DISABLE_CARD);
}
/* Change status to shutdown */
if (func->is_a_board)
func->status = 0x01;
......@@ -1330,26 +629,6 @@ static u32 remove_board(struct pci_func *func, struct controller *ctrl)
if (ctrl->add_support) {
while (func) {
res_lists.io_head = ctrl->io_head;
res_lists.mem_head = ctrl->mem_head;
res_lists.p_mem_head = ctrl->p_mem_head;
res_lists.bus_head = ctrl->bus_head;
dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n",
func->bus, func->device, func->function);
pciehp_return_board_resources(func, &res_lists);
ctrl->io_head = res_lists.io_head;
ctrl->mem_head = res_lists.mem_head;
ctrl->p_mem_head = res_lists.p_mem_head;
ctrl->bus_head = res_lists.bus_head;
pciehp_resource_sort_and_combine(&(ctrl->mem_head));
pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
pciehp_resource_sort_and_combine(&(ctrl->io_head));
pciehp_resource_sort_and_combine(&(ctrl->bus_head));
if (is_bridge(func)) {
dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
ctrl->seg, func->bus, func->device, func->function);
......@@ -1918,787 +1197,3 @@ int pciehp_disable_slot(struct slot *p_slot)
return rc;
}
/**
* configure_new_device - Configures the PCI header information of one board.
*
* @ctrl: pointer to controller structure
* @func: pointer to function structure
* @behind_bridge: 1 if this is a recursive call, 0 if not
* @resources: pointer to set of resource lists
*
* Returns 0 if success
*
*/
static u32 configure_new_device(struct controller * ctrl, struct pci_func * func,
u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
{
u8 temp_byte, function, max_functions, stop_it;
int rc;
u32 ID;
struct pci_func *new_slot;
struct pci_bus lpci_bus, *pci_bus;
int index;
new_slot = func;
dbg("%s\n", __FUNCTION__);
memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = func->bus;
/* Check for Multi-function device */
rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
if (rc) {
dbg("%s: rc = %d\n", __FUNCTION__, rc);
return rc;
}
if (temp_byte & 0x80) /* Multi-function device */
max_functions = 8;
else
max_functions = 1;
function = 0;
do {
rc = configure_new_function(ctrl, new_slot, behind_bridge,
resources, bridge_bus, bridge_dev);
if (rc) {
dbg("configure_new_function failed: %d\n", rc);
index = 0;
while (new_slot) {
new_slot = pciehp_slot_find(new_slot->bus,
new_slot->device, index++);
if (new_slot)
pciehp_return_board_resources(new_slot,
resources);
}
return rc;
}
function++;
stop_it = 0;
/* The following loop skips to the next present function
* and creates a board structure
*/
while ((function < max_functions) && (!stop_it)) {
pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
if (ID == 0xFFFFFFFF) { /* There's nothing there. */
function++;
} else { /* There's something there */
/* Setup slot structure. */
new_slot = pciehp_slot_create(func->bus);
if (new_slot == NULL) {
/* Out of memory */
return 1;
}
new_slot->bus = func->bus;
new_slot->device = func->device;
new_slot->function = function;
new_slot->is_a_board = 1;
new_slot->status = 0;
stop_it++;
}
}
} while (function < max_functions);
dbg("returning from %s\n", __FUNCTION__);
return 0;
}
/*
* Configuration logic that involves the hotplug data structures and
* their bookkeeping
*/
/**
* configure_bridge: fill bridge's registers, either configure or disable it.
*/
static int
configure_bridge(struct pci_bus *pci_bus, unsigned int devfn,
struct pci_resource *mem_node,
struct pci_resource **hold_mem_node,
int base_addr, int limit_addr)
{
u16 temp_word;
u32 rc;
if (mem_node) {
memcpy(*hold_mem_node, mem_node, sizeof(struct pci_resource));
mem_node->next = NULL;
/* set Mem base and Limit registers */
RES_CHECK(mem_node->base, 16);
temp_word = (u16)(mem_node->base >> 16);
rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
RES_CHECK(mem_node->base + mem_node->length - 1, 16);
temp_word = (u16)((mem_node->base + mem_node->length - 1) >> 16);
rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
} else {
temp_word = 0xFFFF;
rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
temp_word = 0x0000;
rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
kfree(*hold_mem_node);
*hold_mem_node = NULL;
}
return rc;
}
static int
configure_new_bridge(struct controller *ctrl, struct pci_func *func,
u8 behind_bridge, struct resource_lists *resources,
struct pci_bus *pci_bus)
{
int cloop;
u8 temp_byte;
u8 device;
u16 temp_word;
u32 rc;
u32 ID;
unsigned int devfn;
struct pci_resource *mem_node;
struct pci_resource *p_mem_node;
struct pci_resource *io_node;
struct pci_resource *bus_node;
struct pci_resource *hold_mem_node;
struct pci_resource *hold_p_mem_node;
struct pci_resource *hold_IO_node;
struct pci_resource *hold_bus_node;
struct irq_mapping irqs;
struct pci_func *new_slot;
struct resource_lists temp_resources;
devfn = PCI_DEVFN(func->device, func->function);
/* set Primary bus */
dbg("set Primary bus = 0x%x\n", func->bus);
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
if (rc)
return rc;
/* find range of busses to use */
bus_node = get_max_resource(&resources->bus_head, 1L);
/* If we don't have any busses to allocate, we can't continue */
if (!bus_node) {
err("Got NO bus resource to use\n");
return -ENOMEM;
}
dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
/* set Secondary bus */
temp_byte = (u8)bus_node->base;
dbg("set Secondary bus = 0x%x\n", temp_byte);
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
if (rc)
return rc;
/* set subordinate bus */
temp_byte = (u8)(bus_node->base + bus_node->length - 1);
dbg("set subordinate bus = 0x%x\n", temp_byte);
rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
if (rc)
return rc;
/* Set HP parameters (Cache Line Size, Latency Timer) */
rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
if (rc)
return rc;
/* Setup the IO, memory, and prefetchable windows */
io_node = get_max_resource(&(resources->io_head), 0x1000L);
if (io_node) {
dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base,
io_node->length, io_node->next);
}
mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
if (mem_node) {
dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base,
mem_node->length, mem_node->next);
}
if (resources->p_mem_head)
p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
else {
/*
* In some platform implementation, MEM and PMEM are not
* distinguished, and hence ACPI _CRS has only MEM entries
* for both MEM and PMEM.
*/
dbg("using MEM for PMEM\n");
p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
}
if (p_mem_node) {
dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
p_mem_node->length, p_mem_node->next);
}
/* set up the IRQ info */
if (!resources->irqs) {
irqs.barber_pole = 0;
irqs.interrupt[0] = 0;
irqs.interrupt[1] = 0;
irqs.interrupt[2] = 0;
irqs.interrupt[3] = 0;
irqs.valid_INT = 0;
} else {
irqs.barber_pole = resources->irqs->barber_pole;
irqs.interrupt[0] = resources->irqs->interrupt[0];
irqs.interrupt[1] = resources->irqs->interrupt[1];
irqs.interrupt[2] = resources->irqs->interrupt[2];
irqs.interrupt[3] = resources->irqs->interrupt[3];
irqs.valid_INT = resources->irqs->valid_INT;
}
/* set up resource lists that are now aligned on top and bottom
* for anything behind the bridge.
*/
temp_resources.bus_head = bus_node;
temp_resources.io_head = io_node;
temp_resources.mem_head = mem_node;
temp_resources.p_mem_head = p_mem_node;
temp_resources.irqs = &irqs;
/* Make copies of the nodes we are going to pass down so that
* if there is a problem,we can just use these to free resources
*/
hold_bus_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
hold_IO_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
hold_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
hold_p_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
kfree(hold_bus_node);
kfree(hold_IO_node);
kfree(hold_mem_node);
kfree(hold_p_mem_node);
return 1;
}
memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
bus_node->base += 1;
bus_node->length -= 1;
bus_node->next = NULL;
/* If we have IO resources copy them and fill in the bridge's
* IO range registers
*/
if (io_node) {
memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
io_node->next = NULL;
/* set IO base and Limit registers */
RES_CHECK(io_node->base, 8);
temp_byte = (u8)(io_node->base >> 8);
rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
RES_CHECK(io_node->base + io_node->length - 1, 8);
temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
} else {
kfree(hold_IO_node);
hold_IO_node = NULL;
}
/* If we have memory resources copy them and fill in the bridge's
* memory range registers. Otherwise, fill in the range
* registers with values that disable them.
*/
rc = configure_bridge(pci_bus, devfn, mem_node, &hold_mem_node,
PCI_MEMORY_BASE, PCI_MEMORY_LIMIT);
/* If we have prefetchable memory resources copy them and
* fill in the bridge's memory range registers. Otherwise,
* fill in the range registers with values that disable them.
*/
rc = configure_bridge(pci_bus, devfn, p_mem_node, &hold_p_mem_node,
PCI_PREF_MEMORY_BASE, PCI_PREF_MEMORY_LIMIT);
/* Adjust this to compensate for extra adjustment in first loop */
irqs.barber_pole--;
rc = 0;
/* Here we actually find the devices and configure them */
for (device = 0; (device <= 0x1F) && !rc; device++) {
irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
ID = 0xFFFFFFFF;
pci_bus->number = hold_bus_node->base;
pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
pci_bus->number = func->bus;
if (ID != 0xFFFFFFFF) { /* device Present */
/* Setup slot structure. */
new_slot = pciehp_slot_create(hold_bus_node->base);
if (new_slot == NULL) {
/* Out of memory */
rc = -ENOMEM;
continue;
}
new_slot->bus = hold_bus_node->base;
new_slot->device = device;
new_slot->function = 0;
new_slot->is_a_board = 1;
new_slot->status = 0;
rc = configure_new_device(ctrl, new_slot, 1,
&temp_resources, func->bus,
func->device);
dbg("configure_new_device rc=0x%x\n",rc);
} /* End of IF (device in slot?) */
} /* End of FOR loop */
if (rc) {
pciehp_destroy_resource_list(&temp_resources);
return_resource(&(resources->bus_head), hold_bus_node);
return_resource(&(resources->io_head), hold_IO_node);
return_resource(&(resources->mem_head), hold_mem_node);
return_resource(&(resources->p_mem_head), hold_p_mem_node);
return(rc);
}
/* save the interrupt routing information */
if (resources->irqs) {
resources->irqs->interrupt[0] = irqs.interrupt[0];
resources->irqs->interrupt[1] = irqs.interrupt[1];
resources->irqs->interrupt[2] = irqs.interrupt[2];
resources->irqs->interrupt[3] = irqs.interrupt[3];
resources->irqs->valid_INT = irqs.valid_INT;
} else if (!behind_bridge) {
/* We need to hook up the interrupts here */
for (cloop = 0; cloop < 4; cloop++) {
if (irqs.valid_INT & (0x01 << cloop)) {
rc = pciehp_set_irq(func->bus, func->device,
0x0A + cloop, irqs.interrupt[cloop]);
if (rc) {
pciehp_destroy_resource_list (&temp_resources);
return_resource(&(resources->bus_head), hold_bus_node);
return_resource(&(resources->io_head), hold_IO_node);
return_resource(&(resources->mem_head), hold_mem_node);
return_resource(&(resources->p_mem_head), hold_p_mem_node);
return rc;
}
}
} /* end of for loop */
}
/* Return unused bus resources
* First use the temporary node to store information for the board
*/
if (hold_bus_node && bus_node && temp_resources.bus_head) {
hold_bus_node->length = bus_node->base - hold_bus_node->base;
hold_bus_node->next = func->bus_head;
func->bus_head = hold_bus_node;
temp_byte = (u8)(temp_resources.bus_head->base - 1);
/* set subordinate bus */
dbg("re-set subordinate bus = 0x%x\n", temp_byte);
rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
if (temp_resources.bus_head->length == 0) {
kfree(temp_resources.bus_head);
temp_resources.bus_head = NULL;
} else {
dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
return_resource(&(resources->bus_head), temp_resources.bus_head);
}
}
/* If we have IO space available and there is some left,
* return the unused portion
*/
if (hold_IO_node && temp_resources.io_head) {
io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
&hold_IO_node, 0x1000);
/* Check if we were able to split something off */
if (io_node) {
hold_IO_node->base = io_node->base + io_node->length;
RES_CHECK(hold_IO_node->base, 8);
temp_byte = (u8)((hold_IO_node->base) >> 8);
rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
return_resource(&(resources->io_head), io_node);
}
io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
/* Check if we were able to split something off */
if (io_node) {
/* First use the temporary node to store information for the board */
hold_IO_node->length = io_node->base - hold_IO_node->base;
/* If we used any, add it to the board's list */
if (hold_IO_node->length) {
hold_IO_node->next = func->io_head;
func->io_head = hold_IO_node;
RES_CHECK(io_node->base - 1, 8);
temp_byte = (u8)((io_node->base - 1) >> 8);
rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
return_resource(&(resources->io_head), io_node);
} else {
/* it doesn't need any IO */
temp_byte = 0x00;
rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
return_resource(&(resources->io_head), io_node);
kfree(hold_IO_node);
}
} else {
/* it used most of the range */
hold_IO_node->next = func->io_head;
func->io_head = hold_IO_node;
}
} else if (hold_IO_node) {
/* it used the whole range */
hold_IO_node->next = func->io_head;
func->io_head = hold_IO_node;
}
/* If we have memory space available and there is some left,
* return the unused portion
*/
if (hold_mem_node && temp_resources.mem_head) {
mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
/* Check if we were able to split something off */
if (mem_node) {
hold_mem_node->base = mem_node->base + mem_node->length;
RES_CHECK(hold_mem_node->base, 16);
temp_word = (u16)((hold_mem_node->base) >> 16);
rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
return_resource(&(resources->mem_head), mem_node);
}
mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
/* Check if we were able to split something off */
if (mem_node) {
/* First use the temporary node to store information for the board */
hold_mem_node->length = mem_node->base - hold_mem_node->base;
if (hold_mem_node->length) {
hold_mem_node->next = func->mem_head;
func->mem_head = hold_mem_node;
/* configure end address */
RES_CHECK(mem_node->base - 1, 16);
temp_word = (u16)((mem_node->base - 1) >> 16);
rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
/* Return unused resources to the pool */
return_resource(&(resources->mem_head), mem_node);
} else {
/* it doesn't need any Mem */
temp_word = 0x0000;
rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
return_resource(&(resources->mem_head), mem_node);
kfree(hold_mem_node);
}
} else {
/* it used most of the range */
hold_mem_node->next = func->mem_head;
func->mem_head = hold_mem_node;
}
} else if (hold_mem_node) {
/* it used the whole range */
hold_mem_node->next = func->mem_head;
func->mem_head = hold_mem_node;
}
/* If we have prefetchable memory space available and there is some
* left at the end, return the unused portion
*/
if (hold_p_mem_node && temp_resources.p_mem_head) {
p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
&hold_p_mem_node, 0x100000L);
/* Check if we were able to split something off */
if (p_mem_node) {
hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
RES_CHECK(hold_p_mem_node->base, 16);
temp_word = (u16)((hold_p_mem_node->base) >> 16);
rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
return_resource(&(resources->p_mem_head), p_mem_node);
}
p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
/* Check if we were able to split something off */
if (p_mem_node) {
/* First use the temporary node to store information for the board */
hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
/* If we used any, add it to the board's list */
if (hold_p_mem_node->length) {
hold_p_mem_node->next = func->p_mem_head;
func->p_mem_head = hold_p_mem_node;
RES_CHECK(p_mem_node->base - 1, 16);
temp_word = (u16)((p_mem_node->base - 1) >> 16);
rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
return_resource(&(resources->p_mem_head), p_mem_node);
} else {
/* it doesn't need any PMem */
temp_word = 0x0000;
rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
return_resource(&(resources->p_mem_head), p_mem_node);
kfree(hold_p_mem_node);
}
} else {
/* it used the most of the range */
hold_p_mem_node->next = func->p_mem_head;
func->p_mem_head = hold_p_mem_node;
}
} else if (hold_p_mem_node) {
/* it used the whole range */
hold_p_mem_node->next = func->p_mem_head;
func->p_mem_head = hold_p_mem_node;
}
/* We should be configuring an IRQ and the bridge's base address
* registers if it needs them. Although we have never seen such
* a device
*/
pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
return rc;
}
/**
* configure_new_function - Configures the PCI header information of one device
*
* @ctrl: pointer to controller structure
* @func: pointer to function structure
* @behind_bridge: 1 if this is a recursive call, 0 if not
* @resources: pointer to set of resource lists
*
* Calls itself recursively for bridged devices.
* Returns 0 if success
*
*/
static int
configure_new_function(struct controller *ctrl, struct pci_func *func,
u8 behind_bridge, struct resource_lists *resources,
u8 bridge_bus, u8 bridge_dev)
{
int cloop;
u8 temp_byte;
u8 class_code;
u32 rc;
u32 temp_register;
u32 base;
unsigned int devfn;
struct pci_resource *mem_node;
struct pci_resource *io_node;
struct pci_bus lpci_bus, *pci_bus;
memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
/* Check for Bridge */
rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
if (rc)
return rc;
dbg("%s: bus %x dev %x func %x temp_byte = %x\n", __FUNCTION__,
func->bus, func->device, func->function, temp_byte);
if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
rc = configure_new_bridge(ctrl, func, behind_bridge, resources,
pci_bus);
if (rc)
return rc;
} else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
/* Standard device */
u64 base64;
rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
if (class_code == PCI_BASE_CLASS_DISPLAY)
return DEVICE_TYPE_NOT_SUPPORTED;
/* Figure out IO and memory needs */
for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
temp_register = 0xFFFFFFFF;
rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register,
func->bus, func->device, func->function);
if (!temp_register)
continue;
base64 = 0L;
if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
/* Map IO */
/* set base = amount of IO space */
base = temp_register & 0xFFFFFFFC;
base = ~base + 1;
dbg("NEED IO length(0x%x)\n", base);
io_node = get_io_resource(&(resources->io_head),(ulong)base);
/* allocate the resource to the board */
if (io_node) {
dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
base = (u32)io_node->base;
io_node->next = func->io_head;
func->io_head = io_node;
} else {
err("Got NO IO resource(length=0x%x)\n", base);
return -ENOMEM;
}
} else { /* map MEM */
int prefetchable = 1;
struct pci_resource **res_node = &func->p_mem_head;
char *res_type_str = "PMEM";
u32 temp_register2;
if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
prefetchable = 0;
res_node = &func->mem_head;
res_type_str++;
}
base = temp_register & 0xFFFFFFF0;
base = ~base + 1;
switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
case PCI_BASE_ADDRESS_MEM_TYPE_32:
dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
if (prefetchable && resources->p_mem_head)
mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
else {
if (prefetchable)
dbg("using MEM for PMEM\n");
mem_node = get_resource(&(resources->mem_head), (ulong)base);
}
/* allocate the resource to the board */
if (mem_node) {
base = (u32)mem_node->base;
mem_node->next = *res_node;
*res_node = mem_node;
dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base,
mem_node->length);
} else {
err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
return -ENOMEM;
}
break;
case PCI_BASE_ADDRESS_MEM_TYPE_64:
rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2,
temp_register, base);
if (prefetchable && resources->p_mem_head)
mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
else {
if (prefetchable)
dbg("using MEM for PMEM\n");
mem_node = get_resource(&(resources->mem_head), (ulong)base);
}
/* allocate the resource to the board */
if (mem_node) {
base64 = mem_node->base;
mem_node->next = *res_node;
*res_node = mem_node;
dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32),
(u32)base64, mem_node->length);
} else {
err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
return -ENOMEM;
}
break;
default:
dbg("reserved BAR type=0x%x\n", temp_register);
break;
}
}
if (base64) {
rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
cloop += 4;
base64 >>= 32;
if (base64) {
dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
base64 = 0x0L;
}
rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
} else {
rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
}
} /* End of base register loop */
/* disable ROM base Address */
rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00);
/* Set HP parameters (Cache Line Size, Latency Timer) */
rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
if (rc)
return rc;
pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device,
func->function);
} /* End of Not-A-Bridge else */
else {
/* It's some strange type of PCI adapter (Cardbus?) */
return DEVICE_TYPE_NOT_SUPPORTED;
}
func->configured = 1;
return 0;
}
drivers/pci/hotplug/pciehp_pci.c
View file @ 71b720c0
......@@ -37,47 +37,70 @@
#include <linux/pci.h>
#include "../pci.h"
#include "pciehp.h"
#ifndef CONFIG_IA64
#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
#endif
int pciehp_configure_device (struct controller* ctrl, struct pci_func* func)
int pciehp_configure_device(struct slot *p_slot)
{
unsigned char bus;
struct pci_bus *child;
int num;
if (func->pci_dev == NULL)
func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
/* Still NULL ? Well then scan for it ! */
if (func->pci_dev == NULL) {
dbg("%s: pci_dev still null. do pci_scan_slot\n", __FUNCTION__);
num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function));
if (num)
pci_bus_add_devices(ctrl->pci_dev->subordinate);
func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
if (func->pci_dev == NULL) {
dbg("ERROR: pci_dev still null\n");
return 0;
}
struct pci_dev *dev;
struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
int num, fn;
dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));
if (dev) {
err("Device %s already exists at %x:%x, cannot hot-add\n",
pci_name(dev), p_slot->bus, p_slot->device);
return -EINVAL;
}
if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
pci_do_scan_bus(child);
num = pci_scan_slot(parent, PCI_DEVFN(p_slot->device, 0));
if (num == 0) {
err("No new device found\n");
return -ENODEV;
}
for (fn = 0; fn < 8; fn++) {
if (!(dev = pci_find_slot(p_slot->bus,
PCI_DEVFN(p_slot->device, fn))))
continue;
if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
err("Cannot hot-add display device %s\n",
pci_name(dev));
continue;
}
if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
(dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
/* Find an unused bus number for the new bridge */
struct pci_bus *child;
unsigned char busnr, start = parent->secondary;
unsigned char end = parent->subordinate;
for (busnr = start; busnr <= end; busnr++) {
if (!pci_find_bus(pci_domain_nr(parent),
busnr))
break;
}
if (busnr >= end) {
err("No free bus for hot-added bridge\n");
continue;
}
child = pci_add_new_bus(parent, dev, busnr);
if (!child) {
err("Cannot add new bus for %s\n",
pci_name(dev));
continue;
}
child->subordinate = pci_do_scan_bus(child);
pci_bus_size_bridges(child);
}
/* TBD: program firmware provided _HPP values */
/* program_fw_provided_values(dev); */
}
pci_bus_assign_resources(parent);
pci_bus_add_devices(parent);
pci_enable_bridges(parent);
return 0;
}
int pciehp_unconfigure_device(struct pci_func* func)
{
int rc = 0;
......@@ -104,47 +127,6 @@ int pciehp_unconfigure_device(struct pci_func* func)
return rc;
}
/*
* pciehp_set_irq
*
* @bus_num: bus number of PCI device
* @dev_num: device number of PCI device
* @slot: pointer to u8 where slot number will be returned
*/
int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
{
#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_IO_APIC)
int rc;
u16 temp_word;
struct pci_dev fakedev;
struct pci_bus fakebus;
fakedev.devfn = dev_num << 3;
fakedev.bus = &fakebus;
fakebus.number = bus_num;
dbg("%s: dev %d, bus %d, pin %d, num %d\n",
__FUNCTION__, dev_num, bus_num, int_pin, irq_num);
rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
dbg("%s: rc %d\n", __FUNCTION__, rc);
if (!rc)
return !rc;
/* set the Edge Level Control Register (ELCR) */
temp_word = inb(0x4d0);
temp_word |= inb(0x4d1) << 8;
temp_word |= 0x01 << irq_num;
/* This should only be for x86 as it sets the Edge Level Control Register */
outb((u8) (temp_word & 0xFF), 0x4d0);
outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
#endif
return 0;
}
/* More PCI configuration routines; this time centered around hotplug controller */
/*
* pciehp_save_config
*
......@@ -462,366 +444,3 @@ int pciehp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
return 0;
}
/*
* pciehp_save_used_resources
*
* Stores used resource information for existing boards. this is
* for boards that were in the system when this driver was loaded.
* this function is for hot plug ADD
*
* returns 0 if success
* if disable == 1(DISABLE_CARD),
* it loops for all functions of the slot and disables them.
* else, it just get resources of the function and return.
*/
int pciehp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
{
u8 cloop;
u8 header_type;
u8 secondary_bus;
u8 temp_byte;
u16 command;
u16 save_command;
u16 w_base, w_length;
u32 temp_register;
u32 save_base;
u32 base, length;
u64 base64 = 0;
int index = 0;
unsigned int devfn;
struct pci_resource *mem_node = NULL;
struct pci_resource *p_mem_node = NULL;
struct pci_resource *t_mem_node;
struct pci_resource *io_node;
struct pci_resource *bus_node;
struct pci_bus lpci_bus, *pci_bus;
memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
pci_bus = &lpci_bus;
if (disable)
func = pciehp_slot_find(func->bus, func->device, index++);
while ((func != NULL) && func->is_a_board) {
pci_bus->number = func->bus;
devfn = PCI_DEVFN(func->device, func->function);
/* Save the command register */
pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
if (disable) {
/* disable card */
command = 0x00;
pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
}
/* Check for Bridge */
pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n",
func->bus, func->device, save_command);
if (disable) {
/* Clear Bridge Control Register */
command = 0x00;
pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
}
pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
bus_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!bus_node)
return -ENOMEM;
bus_node->base = (ulong)secondary_bus;
bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
bus_node->next = func->bus_head;
func->bus_head = bus_node;
/* Save IO base and Limit registers */
pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
base = temp_byte;
pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
length = temp_byte;
if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
io_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!io_node)
return -ENOMEM;
io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
io_node->length = (ulong)(length - base + 0x10) << 8;
io_node->next = func->io_head;
func->io_head = io_node;
}
/* Save memory base and Limit registers */
pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
mem_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!mem_node)
return -ENOMEM;
mem_node->base = (ulong)w_base << 16;
mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
mem_node->next = func->mem_head;
func->mem_head = mem_node;
}
/* Save prefetchable memory base and Limit registers */
pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
p_mem_node = kmalloc(sizeof(struct pci_resource),
GFP_KERNEL);
if (!p_mem_node)
return -ENOMEM;
p_mem_node->base = (ulong)w_base << 16;
p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
p_mem_node->next = func->p_mem_head;
func->p_mem_head = p_mem_node;
}
} else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
func->bus, func->device, save_command);
/* Figure out IO and memory base lengths */
for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
temp_register = 0xFFFFFFFF;
pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
if (!disable)
pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
if (!temp_register)
continue;
base = temp_register;
if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
(!disable || (save_command & PCI_COMMAND_IO))) {
/* IO base */
/* set temp_register = amount of IO space requested */
base = base & 0xFFFFFFFCL;
base = (~base) + 1;
io_node = kmalloc(sizeof (struct pci_resource),
GFP_KERNEL);
if (!io_node)
return -ENOMEM;
io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
io_node->length = (ulong)base;
dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
io_node->base, io_node->length);
io_node->next = func->io_head;
func->io_head = io_node;
} else { /* map Memory */
int prefetchable = 1;
/* struct pci_resources **res_node; */
char *res_type_str = "PMEM";
u32 temp_register2;
t_mem_node = kmalloc(sizeof (struct pci_resource),
GFP_KERNEL);
if (!t_mem_node)
return -ENOMEM;
if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
(!disable || (save_command & PCI_COMMAND_MEMORY))) {
prefetchable = 0;
mem_node = t_mem_node;
res_type_str++;
} else
p_mem_node = t_mem_node;
base = base & 0xFFFFFFF0L;
base = (~base) + 1;
switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
case PCI_BASE_ADDRESS_MEM_TYPE_32:
if (prefetchable) {
p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
p_mem_node->length = (ulong)base;
dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
res_type_str,
p_mem_node->base,
p_mem_node->length);
p_mem_node->next = func->p_mem_head;
func->p_mem_head = p_mem_node;
} else {
mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
mem_node->length = (ulong)base;
dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
res_type_str,
mem_node->base,
mem_node->length);
mem_node->next = func->mem_head;
func->mem_head = mem_node;
}
break;
case PCI_BASE_ADDRESS_MEM_TYPE_64:
pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
base64 = temp_register2;
base64 = (base64 << 32) | save_base;
if (temp_register2) {
dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
res_type_str, temp_register2, (u32)base64);
base64 &= 0x00000000FFFFFFFFL;
}
if (prefetchable) {
p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
p_mem_node->length = base;
dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
res_type_str,
p_mem_node->base,
p_mem_node->length);
p_mem_node->next = func->p_mem_head;
func->p_mem_head = p_mem_node;
} else {
mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
mem_node->length = base;
dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
res_type_str,
mem_node->base,
mem_node->length);
mem_node->next = func->mem_head;
func->mem_head = mem_node;
}
cloop += 4;
break;
default:
dbg("asur: reserved BAR type=0x%x\n",
temp_register);
break;
}
}
} /* End of base register loop */
} else { /* Some other unknown header type */
dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
func->bus, func->device);
}
/* find the next device in this slot */
if (!disable)
break;
func = pciehp_slot_find(func->bus, func->device, index++);
}
return 0;
}
/**
* kfree_resource_list: release memory of all list members
* @res: resource list to free
*/
static inline void
return_resource_list(struct pci_resource **func, struct pci_resource **res)
{
struct pci_resource *node;
struct pci_resource *t_node;
node = *func;
*func = NULL;
while (node) {
t_node = node->next;
return_resource(res, node);
node = t_node;
}
}
/*
* pciehp_return_board_resources
*
* this routine returns all resources allocated to a board to
* the available pool.
*
* returns 0 if success
*/
int pciehp_return_board_resources(struct pci_func * func,
struct resource_lists * resources)
{
int rc;
dbg("%s\n", __FUNCTION__);
if (!func)
return 1;
return_resource_list(&(func->io_head),&(resources->io_head));
return_resource_list(&(func->mem_head),&(resources->mem_head));
return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
return_resource_list(&(func->bus_head),&(resources->bus_head));
rc = pciehp_resource_sort_and_combine(&(resources->mem_head));
rc |= pciehp_resource_sort_and_combine(&(resources->p_mem_head));
rc |= pciehp_resource_sort_and_combine(&(resources->io_head));
rc |= pciehp_resource_sort_and_combine(&(resources->bus_head));
return rc;
}
/**
* kfree_resource_list: release memory of all list members
* @res: resource list to free
*/
static inline void
kfree_resource_list(struct pci_resource **r)
{
struct pci_resource *res, *tres;
res = *r;
*r = NULL;
while (res) {
tres = res;
res = res->next;
kfree(tres);
}
}
/**
* pciehp_destroy_resource_list: put node back in the resource list
* @resources: list to put nodes back
*/
void pciehp_destroy_resource_list(struct resource_lists * resources)
{
kfree_resource_list(&(resources->io_head));
kfree_resource_list(&(resources->mem_head));
kfree_resource_list(&(resources->p_mem_head));
kfree_resource_list(&(resources->bus_head));
}
/**
* pciehp_destroy_board_resources: put node back in the resource list
* @resources: list to put nodes back
*/
void pciehp_destroy_board_resources(struct pci_func * func)
{
kfree_resource_list(&(func->io_head));
kfree_resource_list(&(func->mem_head));
kfree_resource_list(&(func->p_mem_head));
kfree_resource_list(&(func->bus_head));
}
drivers/pci/hotplug/pciehprm_acpi.c
View file @ 71b720c0
......@@ -35,9 +35,6 @@
#include <linux/pci-acpi.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif
#include <acpi/acpi.h>
#include <acpi/acpi_bus.h>
#include <acpi/actypes.h>
......@@ -84,10 +81,6 @@ struct acpi_php_slot {
int dev;
int fun;
u32 sun;
struct pci_resource *mem_head;
struct pci_resource *p_mem_head;
struct pci_resource *io_head;
struct pci_resource *bus_head;
void *slot_ops; /* _STA, _EJx, etc */
struct slot *slot;
}; /* per func */
......@@ -104,14 +97,6 @@ struct acpi_bridge {
int bus; /* pdev->subordinate->number */
struct acpi__hpp *_hpp;
struct acpi_php_slot *slots;
struct pci_resource *tmem_head; /* total from crs */
struct pci_resource *tp_mem_head; /* total from crs */
struct pci_resource *tio_head; /* total from crs */
struct pci_resource *tbus_head; /* total from crs */
struct pci_resource *mem_head; /* available */
struct pci_resource *p_mem_head; /* available */
struct pci_resource *io_head; /* available */
struct pci_resource *bus_head; /* available */
int scanned;
int type;
};
......@@ -268,485 +253,6 @@ static int acpi_run_oshp ( struct acpi_bridge *ab)
return oshp_run_status;
}
static acpi_status acpi_evaluate_crs(
acpi_handle handle,
struct acpi_resource **retbuf
)
{
acpi_status status;
struct acpi_buffer crsbuf;
u8 *path_name = acpi_path_name(handle);
crsbuf.length = 0;
crsbuf.pointer = NULL;
status = acpi_get_current_resources (handle, &crsbuf);
switch (status) {
case AE_BUFFER_OVERFLOW:
break; /* found */
case AE_NOT_FOUND:
dbg("acpi_pciehprm:%s _CRS not found\n", path_name);
return status;
default:
err ("acpi_pciehprm:%s _CRS fail=0x%x\n", path_name, status);
return status;
}
crsbuf.pointer = kmalloc (crsbuf.length, GFP_KERNEL);
if (!crsbuf.pointer) {
err ("acpi_pciehprm: alloc %ld bytes for %s _CRS fail\n", (ulong)crsbuf.length, path_name);
return AE_NO_MEMORY;
}
status = acpi_get_current_resources (handle, &crsbuf);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm: %s _CRS fail=0x%x.\n", path_name, status);
kfree(crsbuf.pointer);
return status;
}
*retbuf = crsbuf.pointer;
return status;
}
static void free_pci_resource ( struct pci_resource *aprh)
{
struct pci_resource *res, *next;
for (res = aprh; res; res = next) {
next = res->next;
kfree(res);
}
}
static void print_pci_resource ( struct pci_resource *aprh)
{
struct pci_resource *res;
for (res = aprh; res; res = res->next)
dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
}
static void print_slot_resources( struct acpi_php_slot *aps)
{
if (aps->bus_head) {
dbg(" BUS Resources:\n");
print_pci_resource (aps->bus_head);
}
if (aps->io_head) {
dbg(" IO Resources:\n");
print_pci_resource (aps->io_head);
}
if (aps->mem_head) {
dbg(" MEM Resources:\n");
print_pci_resource (aps->mem_head);
}
if (aps->p_mem_head) {
dbg(" PMEM Resources:\n");
print_pci_resource (aps->p_mem_head);
}
}
static void print_pci_resources( struct acpi_bridge *ab)
{
if (ab->tbus_head) {
dbg(" Total BUS Resources:\n");
print_pci_resource (ab->tbus_head);
}
if (ab->bus_head) {
dbg(" BUS Resources:\n");
print_pci_resource (ab->bus_head);
}
if (ab->tio_head) {
dbg(" Total IO Resources:\n");
print_pci_resource (ab->tio_head);
}
if (ab->io_head) {
dbg(" IO Resources:\n");
print_pci_resource (ab->io_head);
}
if (ab->tmem_head) {
dbg(" Total MEM Resources:\n");
print_pci_resource (ab->tmem_head);
}
if (ab->mem_head) {
dbg(" MEM Resources:\n");
print_pci_resource (ab->mem_head);
}
if (ab->tp_mem_head) {
dbg(" Total PMEM Resources:\n");
print_pci_resource (ab->tp_mem_head);
}
if (ab->p_mem_head) {
dbg(" PMEM Resources:\n");
print_pci_resource (ab->p_mem_head);
}
if (ab->_hpp) {
dbg(" _HPP: cache_line_size=0x%x\n", ab->_hpp->cache_line_size);
dbg(" _HPP: latency timer =0x%x\n", ab->_hpp->latency_timer);
dbg(" _HPP: enable SERR =0x%x\n", ab->_hpp->enable_serr);
dbg(" _HPP: enable PERR =0x%x\n", ab->_hpp->enable_perr);
}
}
static int pciehprm_delete_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
struct pci_resource *prevnode;
struct pci_resource *split_node;
ulong tbase;
pciehp_resource_sort_and_combine(aprh);
for (res = *aprh; res; res = res->next) {
if (res->base > base)
continue;
if ((res->base + res->length) < (base + size))
continue;
if (res->base < base) {
tbase = base;
if ((res->length - (tbase - res->base)) < size)
continue;
split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base;
split_node->length = tbase - res->base;
res->base = tbase;
res->length -= split_node->length;
split_node->next = res->next;
res->next = split_node;
}
if (res->length >= size) {
split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base + size;
split_node->length = res->length - size;
res->length = size;
split_node->next = res->next;
res->next = split_node;
}
if (*aprh == res) {
*aprh = res->next;
} else {
prevnode = *aprh;
while (prevnode->next != res)
prevnode = prevnode->next;
prevnode->next = res->next;
}
res->next = NULL;
kfree(res);
break;
}
return 0;
}
static int pciehprm_delete_resources(
struct pci_resource **aprh,
struct pci_resource *this
)
{
struct pci_resource *res;
for (res = this; res; res = res->next)
pciehprm_delete_resource(aprh, res->base, res->length);
return 0;
}
static int pciehprm_add_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
for (res = *aprh; res; res = res->next) {
if ((res->base + res->length) == base) {
res->length += size;
size = 0L;
break;
}
if (res->next == *aprh)
break;
}
if (size) {
res = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!res) {
err ("acpi_pciehprm: alloc for res fail\n");
return -ENOMEM;
}
memset(res, 0, sizeof (struct pci_resource));
res->base = base;
res->length = size;
res->next = *aprh;
*aprh = res;
}
return 0;
}
static int pciehprm_add_resources(
struct pci_resource **aprh,
struct pci_resource *this
)
{
struct pci_resource *res;
int rc = 0;
for (res = this; res && !rc; res = res->next)
rc = pciehprm_add_resource(aprh, res->base, res->length);
return rc;
}
static void acpi_parse_io (
struct acpi_bridge *ab,
union acpi_resource_data *data
)
{
struct acpi_resource_io *dataio;
dataio = (struct acpi_resource_io *) data;
dbg("Io Resource\n");
dbg(" %d bit decode\n", ACPI_DECODE_16 == dataio->io_decode ? 16:10);
dbg(" Range minimum base: %08X\n", dataio->min_base_address);
dbg(" Range maximum base: %08X\n", dataio->max_base_address);
dbg(" Alignment: %08X\n", dataio->alignment);
dbg(" Range Length: %08X\n", dataio->range_length);
}
static void acpi_parse_fixed_io (
struct acpi_bridge *ab,
union acpi_resource_data *data
)
{
struct acpi_resource_fixed_io *datafio;
datafio = (struct acpi_resource_fixed_io *) data;
dbg("Fixed Io Resource\n");
dbg(" Range base address: %08X", datafio->base_address);
dbg(" Range length: %08X", datafio->range_length);
}
static void acpi_parse_address16_32 (
struct acpi_bridge *ab,
union acpi_resource_data *data,
acpi_resource_type id
)
{
/*
* acpi_resource_address16 == acpi_resource_address32
* acpi_resource_address16 *data16 = (acpi_resource_address16 *) data;
*/
struct acpi_resource_address32 *data32 = (struct acpi_resource_address32 *) data;
struct pci_resource **aprh, **tprh;
if (id == ACPI_RSTYPE_ADDRESS16)
dbg("acpi_pciehprm:16-Bit Address Space Resource\n");
else
dbg("acpi_pciehprm:32-Bit Address Space Resource\n");
switch (data32->resource_type) {
case ACPI_MEMORY_RANGE:
dbg(" Resource Type: Memory Range\n");
aprh = &ab->mem_head;
tprh = &ab->tmem_head;
switch (data32->attribute.memory.cache_attribute) {
case ACPI_NON_CACHEABLE_MEMORY:
dbg(" Type Specific: Noncacheable memory\n");
break;
case ACPI_CACHABLE_MEMORY:
dbg(" Type Specific: Cacheable memory\n");
break;
case ACPI_WRITE_COMBINING_MEMORY:
dbg(" Type Specific: Write-combining memory\n");
break;
case ACPI_PREFETCHABLE_MEMORY:
aprh = &ab->p_mem_head;
dbg(" Type Specific: Prefetchable memory\n");
break;
default:
dbg(" Type Specific: Invalid cache attribute\n");
break;
}
dbg(" Type Specific: Read%s\n", ACPI_READ_WRITE_MEMORY == data32->attribute.memory.read_write_attribute ? "/Write":" Only");
break;
case ACPI_IO_RANGE:
dbg(" Resource Type: I/O Range\n");
aprh = &ab->io_head;
tprh = &ab->tio_head;
switch (data32->attribute.io.range_attribute) {
case ACPI_NON_ISA_ONLY_RANGES:
dbg(" Type Specific: Non-ISA Io Addresses\n");
break;
case ACPI_ISA_ONLY_RANGES:
dbg(" Type Specific: ISA Io Addresses\n");
break;
case ACPI_ENTIRE_RANGE:
dbg(" Type Specific: ISA and non-ISA Io Addresses\n");
break;
default:
dbg(" Type Specific: Invalid range attribute\n");
break;
}
break;
case ACPI_BUS_NUMBER_RANGE:
dbg(" Resource Type: Bus Number Range(fixed)\n");
/* fixup to be compatible with the rest of php driver */
data32->min_address_range++;
data32->address_length--;
aprh = &ab->bus_head;
tprh = &ab->tbus_head;
break;
default:
dbg(" Resource Type: Invalid resource type. Exiting.\n");
return;
}
dbg(" Resource %s\n", ACPI_CONSUMER == data32->producer_consumer ? "Consumer":"Producer");
dbg(" %s decode\n", ACPI_SUB_DECODE == data32->decode ? "Subtractive":"Positive");
dbg(" Min address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->min_address_fixed ? "":"not");
dbg(" Max address is %s fixed\n", ACPI_ADDRESS_FIXED == data32->max_address_fixed ? "":"not");
dbg(" Granularity: %08X\n", data32->granularity);
dbg(" Address range min: %08X\n", data32->min_address_range);
dbg(" Address range max: %08X\n", data32->max_address_range);
dbg(" Address translation offset: %08X\n", data32->address_translation_offset);
dbg(" Address Length: %08X\n", data32->address_length);
if (0xFF != data32->resource_source.index) {
dbg(" Resource Source Index: %X\n", data32->resource_source.index);
/* dbg(" Resource Source: %s\n", data32->resource_source.string_ptr); */
}
pciehprm_add_resource(aprh, data32->min_address_range, data32->address_length);
}
static acpi_status acpi_parse_crs(
struct acpi_bridge *ab,
struct acpi_resource *crsbuf
)
{
acpi_status status = AE_OK;
struct acpi_resource *resource = crsbuf;
u8 count = 0;
u8 done = 0;
while (!done) {
dbg("acpi_pciehprm: PCI bus 0x%x Resource structure %x.\n", ab->bus, count++);
switch (resource->id) {
case ACPI_RSTYPE_IRQ:
dbg("Irq -------- Resource\n");
break;
case ACPI_RSTYPE_DMA:
dbg("DMA -------- Resource\n");
break;
case ACPI_RSTYPE_START_DPF:
dbg("Start DPF -------- Resource\n");
break;
case ACPI_RSTYPE_END_DPF:
dbg("End DPF -------- Resource\n");
break;
case ACPI_RSTYPE_IO:
acpi_parse_io (ab, &resource->data);
break;
case ACPI_RSTYPE_FIXED_IO:
acpi_parse_fixed_io (ab, &resource->data);
break;
case ACPI_RSTYPE_VENDOR:
dbg("Vendor -------- Resource\n");
break;
case ACPI_RSTYPE_END_TAG:
dbg("End_tag -------- Resource\n");
done = 1;
break;
case ACPI_RSTYPE_MEM24:
dbg("Mem24 -------- Resource\n");
break;
case ACPI_RSTYPE_MEM32:
dbg("Mem32 -------- Resource\n");
break;
case ACPI_RSTYPE_FIXED_MEM32:
dbg("Fixed Mem32 -------- Resource\n");
break;
case ACPI_RSTYPE_ADDRESS16:
acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS16);
break;
case ACPI_RSTYPE_ADDRESS32:
acpi_parse_address16_32(ab, &resource->data, ACPI_RSTYPE_ADDRESS32);
break;
case ACPI_RSTYPE_ADDRESS64:
info("Address64 -------- Resource unparsed\n");
break;
case ACPI_RSTYPE_EXT_IRQ:
dbg("Ext Irq -------- Resource\n");
break;
default:
dbg("Invalid -------- resource type 0x%x\n", resource->id);
break;
}
resource = (struct acpi_resource *) ((char *)resource + resource->length);
}
return status;
}
static acpi_status acpi_get_crs( struct acpi_bridge *ab)
{
acpi_status status;
struct acpi_resource *crsbuf;
status = acpi_evaluate_crs(ab->handle, &crsbuf);
if (ACPI_SUCCESS(status)) {
status = acpi_parse_crs(ab, crsbuf);
kfree(crsbuf);
pciehp_resource_sort_and_combine(&ab->bus_head);
pciehp_resource_sort_and_combine(&ab->io_head);
pciehp_resource_sort_and_combine(&ab->mem_head);
pciehp_resource_sort_and_combine(&ab->p_mem_head);
pciehprm_add_resources (&ab->tbus_head, ab->bus_head);
pciehprm_add_resources (&ab->tio_head, ab->io_head);
pciehprm_add_resources (&ab->tmem_head, ab->mem_head);
pciehprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
}
return status;
}
/* find acpi_bridge downword from ab. */
static struct acpi_bridge *
find_acpi_bridge_by_bus(
......@@ -1064,14 +570,6 @@ static struct acpi_bridge * add_host_bridge(
ab->scanned = 0;
ab->type = BRIDGE_TYPE_HOST;
/* get root pci bridge's current resources */
status = acpi_get_crs(ab);
if (ACPI_FAILURE(status)) {
err("acpi_pciehprm:%s evaluate _CRS fail=0x%x\n", path_name, status);
kfree(ab);
return NULL;
}
status = pci_osc_control_set (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
if (ACPI_FAILURE(status)) {
err("%s: status %x\n", __FUNCTION__, status);
......@@ -1179,11 +677,6 @@ static void free_a_slot(struct acpi_php_slot *aps)
{
dbg(" free a php func of slot(0x%02x) on PCI b:d:f=0x%02x:%02x:%02x\n", aps->sun, aps->bus, aps->dev, aps->fun);
free_pci_resource (aps->io_head);
free_pci_resource (aps->bus_head);
free_pci_resource (aps->mem_head);
free_pci_resource (aps->p_mem_head);
kfree(aps);
}
......@@ -1208,15 +701,6 @@ static void free_a_bridge( struct acpi_bridge *ab)
free_a_slot(aps);
}
free_pci_resource (ab->io_head);
free_pci_resource (ab->tio_head);
free_pci_resource (ab->bus_head);
free_pci_resource (ab->tbus_head);
free_pci_resource (ab->mem_head);
free_pci_resource (ab->tmem_head);
free_pci_resource (ab->p_mem_head);
free_pci_resource (ab->tp_mem_head);
kfree(ab);
}
......@@ -1266,48 +750,6 @@ static int get_number_of_slots (
return slot_num;
}
static int print_acpi_resources (struct acpi_bridge *ab)
{
struct acpi_php_slot *aps;
int i;
switch (ab->type) {
case BRIDGE_TYPE_HOST:
dbg("PCI HOST Bridge (%x) [%s]\n", ab->bus, acpi_path_name(ab->handle));
break;
case BRIDGE_TYPE_P2P:
dbg("PCI P2P Bridge (%x-%x) [%s]\n", ab->pbus, ab->bus, acpi_path_name(ab->handle));
break;
};
print_pci_resources (ab);
for ( i = -1, aps = ab->slots; aps; aps = aps->next) {
if (aps->dev == i)
continue;
dbg(" Slot sun(%x) s:b:d:f(%02x:%02x:%02x:%02x)\n", aps->sun, aps->seg, aps->bus, aps->dev, aps->fun);
print_slot_resources(aps);
i = aps->dev;
}
if (ab->child)
print_acpi_resources (ab->child);
if (ab->next)
print_acpi_resources (ab->next);
return 0;
}
int pciehprm_print_pirt(void)
{
dbg("PCIEHPRM ACPI Slots\n");
if (acpi_bridges_head)
print_acpi_resources (acpi_bridges_head);
return 0;
}
static struct acpi_php_slot * get_acpi_slot (
struct acpi_bridge *ab,
u32 sun
......@@ -1349,288 +791,6 @@ void * pciehprm_get_slot(struct slot *slot)
}
#endif
static void pciehprm_dump_func_res( struct pci_func *fun)
{
struct pci_func *func = fun;
if (func->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (func->bus_head);
}
if (func->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (func->io_head);
}
if (func->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (func->mem_head);
}
if (func->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (func->p_mem_head);
}
}
static void pciehprm_dump_ctrl_res( struct controller *ctlr)
{
struct controller *ctrl = ctlr;
if (ctrl->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (ctrl->bus_head);
}
if (ctrl->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (ctrl->io_head);
}
if (ctrl->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (ctrl->mem_head);
}
if (ctrl->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (ctrl->p_mem_head);
}
}
static int pciehprm_get_used_resources (
struct controller *ctrl,
struct pci_func *func
)
{
return pciehp_save_used_resources (ctrl, func, !DISABLE_CARD);
}
static int configure_existing_function(
struct controller *ctrl,
struct pci_func *func
)
{
int rc;
/* see how much resources the func has used. */
rc = pciehprm_get_used_resources (ctrl, func);
if (!rc) {
/* subtract the resources used by the func from ctrl resources */
rc = pciehprm_delete_resources (&ctrl->bus_head, func->bus_head);
rc |= pciehprm_delete_resources (&ctrl->io_head, func->io_head);
rc |= pciehprm_delete_resources (&ctrl->mem_head, func->mem_head);
rc |= pciehprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
if (rc)
warn("aCEF: cannot del used resources\n");
} else
err("aCEF: cannot get used resources\n");
return rc;
}
static int bind_pci_resources_to_slots ( struct controller *ctrl)
{
struct pci_func *func, new_func;
int busn = ctrl->slot_bus;
int devn, funn;
u32 vid;
for (devn = 0; devn < 32; devn++) {
for (funn = 0; funn < 8; funn++) {
/*
if (devn == ctrl->device && funn == ctrl->function)
continue;
*/
/* find out if this entry is for an occupied slot */
vid = 0xFFFFFFFF;
pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
if (vid != 0xFFFFFFFF) {
dbg("%s: vid = %x\n", __FUNCTION__, vid);
func = pciehp_slot_find(busn, devn, funn);
if (!func) {
memset(&new_func, 0, sizeof(struct pci_func));
new_func.bus = busn;
new_func.device = devn;
new_func.function = funn;
new_func.is_a_board = 1;
configure_existing_function(ctrl, &new_func);
pciehprm_dump_func_res(&new_func);
} else {
configure_existing_function(ctrl, func);
pciehprm_dump_func_res(func);
}
dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
}
}
}
return 0;
}
static int bind_pci_resources(
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int status = 0;
if (ab->bus_head) {
dbg("bapr: BUS Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->bus_head, ab->bus_head);
if (pciehprm_delete_resources (&ab->bus_head, ctrl->bus_head))
warn("bapr: cannot sub BUS Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: BUS Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No BUS Resource on PCI 0x%x.\n", ab->bus);
if (ab->io_head) {
dbg("bapr: IO Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->io_head, ab->io_head);
if (pciehprm_delete_resources (&ab->io_head, ctrl->io_head))
warn("bapr: cannot sub IO Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: IO Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No IO Resource on PCI 0x%x.\n", ab->bus);
if (ab->mem_head) {
dbg("bapr: MEM Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->mem_head, ab->mem_head);
if (pciehprm_delete_resources (&ab->mem_head, ctrl->mem_head))
warn("bapr: cannot sub MEM Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: MEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No MEM Resource on PCI 0x%x.\n", ab->bus);
if (ab->p_mem_head) {
dbg("bapr: PMEM Resources add on PCI 0x%x\n", ab->bus);
status = pciehprm_add_resources (&ctrl->p_mem_head, ab->p_mem_head);
if (pciehprm_delete_resources (&ab->p_mem_head, ctrl->p_mem_head))
warn("bapr: cannot sub PMEM Resource on PCI 0x%x\n", ab->bus);
if (status) {
err("bapr: PMEM Resource add on PCI 0x%x: fail=0x%x\n", ab->bus, status);
return status;
}
} else
info("bapr: No PMEM Resource on PCI 0x%x.\n", ab->bus);
return status;
}
static int no_pci_resources( struct acpi_bridge *ab)
{
return !(ab->p_mem_head || ab->mem_head || ab->io_head || ab->bus_head);
}
static int find_pci_bridge_resources (
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int rc = 0;
struct pci_func func;
memset(&func, 0, sizeof(struct pci_func));
func.bus = ab->pbus;
func.device = ab->pdevice;
func.function = ab->pfunction;
func.is_a_board = 1;
/* Get used resources for this PCI bridge */
rc = pciehp_save_used_resources (ctrl, &func, !DISABLE_CARD);
ab->io_head = func.io_head;
ab->mem_head = func.mem_head;
ab->p_mem_head = func.p_mem_head;
ab->bus_head = func.bus_head;
if (ab->bus_head)
pciehprm_delete_resource(&ab->bus_head, ctrl->pci_dev->subordinate->number, 1);
return rc;
}
static int get_pci_resources_from_bridge(
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int rc = 0;
dbg("grfb: Get Resources for PCI 0x%x from actual PCI bridge 0x%x.\n", ctrl->bus, ab->bus);
rc = find_pci_bridge_resources (ctrl, ab);
pciehp_resource_sort_and_combine(&ab->bus_head);
pciehp_resource_sort_and_combine(&ab->io_head);
pciehp_resource_sort_and_combine(&ab->mem_head);
pciehp_resource_sort_and_combine(&ab->p_mem_head);
pciehprm_add_resources (&ab->tbus_head, ab->bus_head);
pciehprm_add_resources (&ab->tio_head, ab->io_head);
pciehprm_add_resources (&ab->tmem_head, ab->mem_head);
pciehprm_add_resources (&ab->tp_mem_head, ab->p_mem_head);
return rc;
}
static int get_pci_resources(
struct controller *ctrl,
struct acpi_bridge *ab
)
{
int rc = 0;
if (no_pci_resources(ab)) {
dbg("spbr:PCI 0x%x has no resources. Get parent resources.\n", ab->bus);
rc = get_pci_resources_from_bridge(ctrl, ab);
}
return rc;
}
/*
* Get resources for this ctrl.
* 1. get total resources from ACPI _CRS or bridge (this ctrl)
* 2. find used resources of existing adapters
* 3. subtract used resources from total resources
*/
int pciehprm_find_available_resources( struct controller *ctrl)
{
int rc = 0;
struct acpi_bridge *ab;
ab = find_acpi_bridge_by_bus(acpi_bridges_head, ctrl->seg, ctrl->pci_dev->subordinate->number);
if (!ab) {
err("pfar:cannot locate acpi bridge of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number);
return -1;
}
if (no_pci_resources(ab)) {
rc = get_pci_resources(ctrl, ab);
if (rc) {
err("pfar:cannot get pci resources of PCI 0x%x.\n", ctrl->pci_dev->subordinate->number);
return -1;
}
}
rc = bind_pci_resources(ctrl, ab);
dbg("pfar:pre-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
pciehprm_dump_ctrl_res(ctrl);
bind_pci_resources_to_slots (ctrl);
dbg("pfar:post-Bind PCI 0x%x Ctrl Resource Dump\n", ctrl->pci_dev->subordinate->number);
pciehprm_dump_ctrl_res(ctrl);
return rc;
}
int pciehprm_set_hpp(
struct controller *ctrl,
struct pci_func *func,
......
drivers/pci/hotplug/pciehprm_nonacpi.c
View file @ 71b720c0
......@@ -35,12 +35,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <asm/uaccess.h>
#ifdef CONFIG_IA64
#include <asm/iosapic.h>
#endif
#include "pciehp.h"
#include "pciehprm.h"
#include "pciehprm_nonacpi.h"
......@@ -51,11 +46,6 @@ void pciehprm_cleanup(void)
return;
}
int pciehprm_print_pirt(void)
{
return 0;
}
int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
{
......@@ -63,343 +53,6 @@ int pciehprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busn
return 0;
}
static void print_pci_resource ( struct pci_resource *aprh)
{
struct pci_resource *res;
for (res = aprh; res; res = res->next)
dbg(" base= 0x%x length= 0x%x\n", res->base, res->length);
}
static void phprm_dump_func_res( struct pci_func *fun)
{
struct pci_func *func = fun;
if (func->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (func->bus_head);
}
if (func->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (func->io_head);
}
if (func->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (func->mem_head);
}
if (func->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (func->p_mem_head);
}
}
static int phprm_get_used_resources (
struct controller *ctrl,
struct pci_func *func
)
{
return pciehp_save_used_resources (ctrl, func, !DISABLE_CARD);
}
static int phprm_delete_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
struct pci_resource *prevnode;
struct pci_resource *split_node;
ulong tbase;
pciehp_resource_sort_and_combine(aprh);
for (res = *aprh; res; res = res->next) {
if (res->base > base)
continue;
if ((res->base + res->length) < (base + size))
continue;
if (res->base < base) {
tbase = base;
if ((res->length - (tbase - res->base)) < size)
continue;
split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base;
split_node->length = tbase - res->base;
res->base = tbase;
res->length -= split_node->length;
split_node->next = res->next;
res->next = split_node;
}
if (res->length >= size) {
split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base + size;
split_node->length = res->length - size;
res->length = size;
split_node->next = res->next;
res->next = split_node;
}
if (*aprh == res) {
*aprh = res->next;
} else {
prevnode = *aprh;
while (prevnode->next != res)
prevnode = prevnode->next;
prevnode->next = res->next;
}
res->next = NULL;
kfree(res);
break;
}
return 0;
}
static int phprm_delete_resources(
struct pci_resource **aprh,
struct pci_resource *this
)
{
struct pci_resource *res;
for (res = this; res; res = res->next)
phprm_delete_resource(aprh, res->base, res->length);
return 0;
}
static int configure_existing_function(
struct controller *ctrl,
struct pci_func *func
)
{
int rc;
/* see how much resources the func has used. */
rc = phprm_get_used_resources (ctrl, func);
if (!rc) {
/* subtract the resources used by the func from ctrl resources */
rc = phprm_delete_resources (&ctrl->bus_head, func->bus_head);
rc |= phprm_delete_resources (&ctrl->io_head, func->io_head);
rc |= phprm_delete_resources (&ctrl->mem_head, func->mem_head);
rc |= phprm_delete_resources (&ctrl->p_mem_head, func->p_mem_head);
if (rc)
warn("aCEF: cannot del used resources\n");
} else
err("aCEF: cannot get used resources\n");
return rc;
}
static int pciehprm_delete_resource(
struct pci_resource **aprh,
ulong base,
ulong size)
{
struct pci_resource *res;
struct pci_resource *prevnode;
struct pci_resource *split_node;
ulong tbase;
pciehp_resource_sort_and_combine(aprh);
for (res = *aprh; res; res = res->next) {
if (res->base > base)
continue;
if ((res->base + res->length) < (base + size))
continue;
if (res->base < base) {
tbase = base;
if ((res->length - (tbase - res->base)) < size)
continue;
split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base;
split_node->length = tbase - res->base;
res->base = tbase;
res->length -= split_node->length;
split_node->next = res->next;
res->next = split_node;
}
if (res->length >= size) {
split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
if (!split_node)
return -ENOMEM;
split_node->base = res->base + size;
split_node->length = res->length - size;
res->length = size;
split_node->next = res->next;
res->next = split_node;
}
if (*aprh == res) {
*aprh = res->next;
} else {
prevnode = *aprh;
while (prevnode->next != res)
prevnode = prevnode->next;
prevnode->next = res->next;
}
res->next = NULL;
kfree(res);
break;
}
return 0;
}
static int bind_pci_resources_to_slots ( struct controller *ctrl)
{
struct pci_func *func, new_func;
int busn = ctrl->slot_bus;
int devn, funn;
u32 vid;
for (devn = 0; devn < 32; devn++) {
for (funn = 0; funn < 8; funn++) {
/*
if (devn == ctrl->device && funn == ctrl->function)
continue;
*/
/* find out if this entry is for an occupied slot */
vid = 0xFFFFFFFF;
pci_bus_read_config_dword(ctrl->pci_dev->subordinate, PCI_DEVFN(devn, funn), PCI_VENDOR_ID, &vid);
if (vid != 0xFFFFFFFF) {
dbg("%s: vid = %x bus %x dev %x fun %x\n", __FUNCTION__,
vid, busn, devn, funn);
func = pciehp_slot_find(busn, devn, funn);
dbg("%s: func = %p\n", __FUNCTION__,func);
if (!func) {
memset(&new_func, 0, sizeof(struct pci_func));
new_func.bus = busn;
new_func.device = devn;
new_func.function = funn;
new_func.is_a_board = 1;
configure_existing_function(ctrl, &new_func);
phprm_dump_func_res(&new_func);
} else {
configure_existing_function(ctrl, func);
phprm_dump_func_res(func);
}
dbg("aCCF:existing PCI 0x%x Func ResourceDump\n", ctrl->bus);
}
}
}
return 0;
}
static void phprm_dump_ctrl_res( struct controller *ctlr)
{
struct controller *ctrl = ctlr;
if (ctrl->bus_head) {
dbg(": BUS Resources:\n");
print_pci_resource (ctrl->bus_head);
}
if (ctrl->io_head) {
dbg(": IO Resources:\n");
print_pci_resource (ctrl->io_head);
}
if (ctrl->mem_head) {
dbg(": MEM Resources:\n");
print_pci_resource (ctrl->mem_head);
}
if (ctrl->p_mem_head) {
dbg(": PMEM Resources:\n");
print_pci_resource (ctrl->p_mem_head);
}
}
/*
* phprm_find_available_resources
*
* Finds available memory, IO, and IRQ resources for programming
* devices which may be added to the system
* this function is for hot plug ADD!
*
* returns 0 if success
*/
int pciehprm_find_available_resources(struct controller *ctrl)
{
struct pci_func func;
u32 rc;
memset(&func, 0, sizeof(struct pci_func));
func.bus = ctrl->bus;
func.device = ctrl->device;
func.function = ctrl->function;
func.is_a_board = 1;
/* Get resources for this PCI bridge */
rc = pciehp_save_used_resources (ctrl, &func, !DISABLE_CARD);
dbg("%s: pciehp_save_used_resources rc = %d\n", __FUNCTION__, rc);
if (func.mem_head)
func.mem_head->next = ctrl->mem_head;
ctrl->mem_head = func.mem_head;
if (func.p_mem_head)
func.p_mem_head->next = ctrl->p_mem_head;
ctrl->p_mem_head = func.p_mem_head;
if (func.io_head)
func.io_head->next = ctrl->io_head;
ctrl->io_head = func.io_head;
if(func.bus_head)
func.bus_head->next = ctrl->bus_head;
ctrl->bus_head = func.bus_head;
if (ctrl->bus_head)
pciehprm_delete_resource(&ctrl->bus_head, ctrl->pci_dev->subordinate->number, 1);
dbg("%s:pre-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
phprm_dump_ctrl_res(ctrl);
dbg("%s: before bind_pci_resources_to slots\n", __FUNCTION__);
bind_pci_resources_to_slots (ctrl);
dbg("%s:post-Bind PCI 0x%x Ctrl Resource Dump\n", __FUNCTION__, ctrl->bus);
phprm_dump_ctrl_res(ctrl);
return (rc);
}
int pciehprm_set_hpp(
struct controller *ctrl,
struct pci_func *func,
......
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