Commit 749cf486 authored by Paul Mundt's avatar Paul Mundt

sh: Add flag for MMU PTEA capability.

Add CPU_HAS_PTEA, refactor some of the cpu flag settings.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 94c0fa52
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
* *
* CPU Subtype Probing for SH-4. * CPU Subtype Probing for SH-4.
* *
* Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt * Copyright (C) 2001 - 2005 Paul Mundt
* Copyright (C) 2003 Richard Curnow * Copyright (C) 2003 Richard Curnow
* *
* This file is subject to the terms and conditions of the GNU General Public * This file is subject to the terms and conditions of the GNU General Public
...@@ -53,9 +53,6 @@ int __init detect_cpu_and_cache_system(void) ...@@ -53,9 +53,6 @@ int __init detect_cpu_and_cache_system(void)
cpu_data->dcache.ways = 1; cpu_data->dcache.ways = 1;
cpu_data->dcache.linesz = L1_CACHE_BYTES; cpu_data->dcache.linesz = L1_CACHE_BYTES;
/* Set the FPU flag, virtually all SH-4's have one */
cpu_data->flags |= CPU_HAS_FPU;
/* /*
* Probe the underlying processor version/revision and * Probe the underlying processor version/revision and
* adjust cpu_data setup accordingly. * adjust cpu_data setup accordingly.
...@@ -63,26 +60,37 @@ int __init detect_cpu_and_cache_system(void) ...@@ -63,26 +60,37 @@ int __init detect_cpu_and_cache_system(void)
switch (pvr) { switch (pvr) {
case 0x205: case 0x205:
cpu_data->type = CPU_SH7750; cpu_data->type = CPU_SH7750;
cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_PERF_COUNTER; cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
CPU_HAS_PERF_COUNTER | CPU_HAS_PTEA;
break; break;
case 0x206: case 0x206:
cpu_data->type = CPU_SH7750S; cpu_data->type = CPU_SH7750S;
cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_PERF_COUNTER; cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
CPU_HAS_PERF_COUNTER | CPU_HAS_PTEA;
break; break;
case 0x1100: case 0x1100:
cpu_data->type = CPU_SH7751; cpu_data->type = CPU_SH7751;
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
break; break;
case 0x2000: case 0x2000:
cpu_data->type = CPU_SH73180; cpu_data->type = CPU_SH73180;
cpu_data->icache.ways = 4; cpu_data->icache.ways = 4;
cpu_data->dcache.ways = 4; cpu_data->dcache.ways = 4;
cpu_data->flags &= ~CPU_HAS_FPU;
/*
* XXX: Double check this, none of the SH-4A/SH-4AL processors
* should have this, as it's essentially a legacy thing.
*/
cpu_data->flags |= CPU_HAS_PTEA;
break; break;
case 0x2001: case 0x2001:
case 0x2004: case 0x2004:
cpu_data->type = CPU_SH7770; cpu_data->type = CPU_SH7770;
cpu_data->icache.ways = 4; cpu_data->icache.ways = 4;
cpu_data->dcache.ways = 4; cpu_data->dcache.ways = 4;
/* Same note as above applies here for PTEA */
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
break; break;
case 0x2006: case 0x2006:
case 0x200A: case 0x200A:
...@@ -90,27 +98,31 @@ int __init detect_cpu_and_cache_system(void) ...@@ -90,27 +98,31 @@ int __init detect_cpu_and_cache_system(void)
cpu_data->type = CPU_SH7781; cpu_data->type = CPU_SH7781;
else else
cpu_data->type = CPU_SH7780; cpu_data->type = CPU_SH7780;
cpu_data->icache.ways = 4; cpu_data->icache.ways = 4;
cpu_data->dcache.ways = 4; cpu_data->dcache.ways = 4;
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER;
break; break;
case 0x8000: case 0x8000:
cpu_data->type = CPU_ST40RA; cpu_data->type = CPU_ST40RA;
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
break; break;
case 0x8100: case 0x8100:
cpu_data->type = CPU_ST40GX1; cpu_data->type = CPU_ST40GX1;
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
break; break;
case 0x700: case 0x700:
cpu_data->type = CPU_SH4_501; cpu_data->type = CPU_SH4_501;
cpu_data->icache.ways = 2; cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2; cpu_data->dcache.ways = 2;
cpu_data->flags |= CPU_HAS_PTEA;
/* No FPU on the SH4-500 series.. */
cpu_data->flags &= ~CPU_HAS_FPU;
break; break;
case 0x600: case 0x600:
cpu_data->type = CPU_SH4_202; cpu_data->type = CPU_SH4_202;
cpu_data->icache.ways = 2; cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2; cpu_data->dcache.ways = 2;
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
break; break;
case 0x500 ... 0x501: case 0x500 ... 0x501:
switch (prr) { switch (prr) {
...@@ -128,6 +140,8 @@ int __init detect_cpu_and_cache_system(void) ...@@ -128,6 +140,8 @@ int __init detect_cpu_and_cache_system(void)
cpu_data->icache.ways = 2; cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2; cpu_data->dcache.ways = 2;
cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PTEA;
break; break;
default: default:
cpu_data->type = CPU_SH_NONE; cpu_data->type = CPU_SH_NONE;
......
...@@ -166,9 +166,9 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map) ...@@ -166,9 +166,9 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH); ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH);
ptel = map->addr & PAGE_MASK; ptel = map->addr & PAGE_MASK;
#ifndef CONFIG_CPU_SUBTYPE_SH7780
if (cpu_data->flags & CPU_HAS_PTEA)
ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA);
#endif
pgprot = pgprot_noncached(PAGE_KERNEL); pgprot = pgprot_noncached(PAGE_KERNEL);
......
...@@ -36,9 +36,6 @@ void update_mmu_cache(struct vm_area_struct * vma, ...@@ -36,9 +36,6 @@ void update_mmu_cache(struct vm_area_struct * vma,
unsigned long vpn; unsigned long vpn;
struct page *page; struct page *page;
unsigned long pfn; unsigned long pfn;
#ifndef CONFIG_CPU_SUBTYPE_SH7780
unsigned long ptea;
#endif
/* Ptrace may call this routine. */ /* Ptrace may call this routine. */
if (vma && current->active_mm != vma->vm_mm) if (vma && current->active_mm != vma->vm_mm)
...@@ -61,12 +58,11 @@ void update_mmu_cache(struct vm_area_struct * vma, ...@@ -61,12 +58,11 @@ void update_mmu_cache(struct vm_area_struct * vma,
ctrl_outl(vpn, MMU_PTEH); ctrl_outl(vpn, MMU_PTEH);
pteval = pte_val(pte); pteval = pte_val(pte);
#ifndef CONFIG_CPU_SUBTYPE_SH7780
/* Set PTEA register */ /* Set PTEA register */
if (cpu_data->flags & CPU_HAS_PTEA)
/* TODO: make this look less hacky */ /* TODO: make this look less hacky */
ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1); ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
ctrl_outl(ptea, MMU_PTEA);
#endif
/* Set PTEL register */ /* Set PTEL register */
pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
......
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